Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7083 |
1 |
|
|
T3 |
9 |
|
T5 |
27 |
|
T40 |
7 |
auto[1] |
19839 |
1 |
|
|
T1 |
50 |
|
T2 |
1 |
|
T3 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12032 |
1 |
|
|
T1 |
25 |
|
T3 |
7 |
|
T5 |
54 |
auto[1] |
14890 |
1 |
|
|
T1 |
25 |
|
T2 |
1 |
|
T3 |
9 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12686 |
1 |
|
|
T1 |
27 |
|
T3 |
13 |
|
T5 |
53 |
auto[1] |
14236 |
1 |
|
|
T1 |
23 |
|
T2 |
1 |
|
T3 |
3 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1584 |
1 |
|
|
T3 |
5 |
|
T5 |
10 |
|
T40 |
2 |
auto[0] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T5 |
5 |
|
T40 |
2 |
|
T13 |
10 |
auto[0] |
auto[1] |
auto[0] |
4508 |
1 |
|
|
T1 |
16 |
|
T3 |
2 |
|
T5 |
19 |
auto[0] |
auto[1] |
auto[1] |
4282 |
1 |
|
|
T1 |
9 |
|
T5 |
20 |
|
T8 |
1 |
auto[1] |
auto[0] |
auto[0] |
1688 |
1 |
|
|
T3 |
3 |
|
T5 |
5 |
|
T40 |
2 |
auto[1] |
auto[0] |
auto[1] |
2153 |
1 |
|
|
T3 |
1 |
|
T5 |
7 |
|
T40 |
1 |
auto[1] |
auto[1] |
auto[0] |
4906 |
1 |
|
|
T1 |
11 |
|
T3 |
3 |
|
T5 |
19 |
auto[1] |
auto[1] |
auto[1] |
6143 |
1 |
|
|
T1 |
14 |
|
T2 |
1 |
|
T3 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7083 |
1 |
|
|
T3 |
9 |
|
T5 |
27 |
|
T40 |
7 |
auto[1] |
19839 |
1 |
|
|
T1 |
50 |
|
T2 |
1 |
|
T3 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12166 |
1 |
|
|
T1 |
20 |
|
T3 |
8 |
|
T5 |
48 |
auto[1] |
14756 |
1 |
|
|
T1 |
30 |
|
T2 |
1 |
|
T3 |
8 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12730 |
1 |
|
|
T1 |
25 |
|
T2 |
1 |
|
T3 |
10 |
auto[1] |
14192 |
1 |
|
|
T1 |
25 |
|
T3 |
6 |
|
T5 |
57 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1608 |
1 |
|
|
T3 |
3 |
|
T5 |
7 |
|
T40 |
2 |
auto[0] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T5 |
4 |
|
T40 |
3 |
|
T13 |
8 |
auto[0] |
auto[1] |
auto[0] |
4679 |
1 |
|
|
T1 |
9 |
|
T3 |
2 |
|
T5 |
18 |
auto[0] |
auto[1] |
auto[1] |
4283 |
1 |
|
|
T1 |
11 |
|
T3 |
3 |
|
T5 |
19 |
auto[1] |
auto[0] |
auto[0] |
1648 |
1 |
|
|
T3 |
3 |
|
T5 |
4 |
|
T13 |
10 |
auto[1] |
auto[0] |
auto[1] |
2231 |
1 |
|
|
T3 |
3 |
|
T5 |
12 |
|
T40 |
2 |
auto[1] |
auto[1] |
auto[0] |
4795 |
1 |
|
|
T1 |
16 |
|
T2 |
1 |
|
T3 |
2 |
auto[1] |
auto[1] |
auto[1] |
6082 |
1 |
|
|
T1 |
14 |
|
T5 |
22 |
|
T40 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7083 |
1 |
|
|
T3 |
9 |
|
T5 |
27 |
|
T40 |
7 |
auto[1] |
19839 |
1 |
|
|
T1 |
50 |
|
T2 |
1 |
|
T3 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12073 |
1 |
|
|
T1 |
15 |
|
T2 |
1 |
|
T3 |
8 |
auto[1] |
14849 |
1 |
|
|
T1 |
35 |
|
T3 |
8 |
|
T5 |
62 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12875 |
1 |
|
|
T1 |
20 |
|
T2 |
1 |
|
T3 |
8 |
auto[1] |
14047 |
1 |
|
|
T1 |
30 |
|
T3 |
8 |
|
T5 |
59 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1689 |
1 |
|
|
T3 |
2 |
|
T5 |
6 |
|
T40 |
3 |
auto[0] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T3 |
3 |
|
T5 |
8 |
|
T40 |
1 |
auto[0] |
auto[1] |
auto[0] |
4637 |
1 |
|
|
T1 |
6 |
|
T2 |
1 |
|
T3 |
3 |
auto[0] |
auto[1] |
auto[1] |
4136 |
1 |
|
|
T1 |
9 |
|
T5 |
15 |
|
T8 |
1 |
auto[1] |
auto[0] |
auto[0] |
1605 |
1 |
|
|
T3 |
2 |
|
T5 |
8 |
|
T40 |
1 |
auto[1] |
auto[0] |
auto[1] |
2178 |
1 |
|
|
T3 |
2 |
|
T5 |
5 |
|
T40 |
2 |
auto[1] |
auto[1] |
auto[0] |
4944 |
1 |
|
|
T1 |
14 |
|
T3 |
1 |
|
T5 |
18 |
auto[1] |
auto[1] |
auto[1] |
6122 |
1 |
|
|
T1 |
21 |
|
T3 |
3 |
|
T5 |
31 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7083 |
1 |
|
|
T3 |
9 |
|
T5 |
27 |
|
T40 |
7 |
auto[1] |
19839 |
1 |
|
|
T1 |
50 |
|
T2 |
1 |
|
T3 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12062 |
1 |
|
|
T1 |
19 |
|
T2 |
1 |
|
T3 |
8 |
auto[1] |
14860 |
1 |
|
|
T1 |
31 |
|
T3 |
8 |
|
T5 |
64 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12798 |
1 |
|
|
T1 |
24 |
|
T3 |
10 |
|
T5 |
51 |
auto[1] |
14124 |
1 |
|
|
T1 |
26 |
|
T2 |
1 |
|
T3 |
6 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1644 |
1 |
|
|
T3 |
4 |
|
T5 |
8 |
|
T40 |
2 |
auto[0] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T3 |
2 |
|
T5 |
6 |
|
T40 |
2 |
auto[0] |
auto[1] |
auto[0] |
4557 |
1 |
|
|
T1 |
12 |
|
T3 |
1 |
|
T5 |
14 |
auto[0] |
auto[1] |
auto[1] |
4225 |
1 |
|
|
T1 |
7 |
|
T2 |
1 |
|
T3 |
1 |
auto[1] |
auto[0] |
auto[0] |
1591 |
1 |
|
|
T3 |
2 |
|
T5 |
8 |
|
T40 |
2 |
auto[1] |
auto[0] |
auto[1] |
2212 |
1 |
|
|
T3 |
1 |
|
T5 |
5 |
|
T40 |
1 |
auto[1] |
auto[1] |
auto[0] |
5006 |
1 |
|
|
T1 |
12 |
|
T3 |
3 |
|
T5 |
21 |
auto[1] |
auto[1] |
auto[1] |
6051 |
1 |
|
|
T1 |
19 |
|
T3 |
2 |
|
T5 |
30 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7083 |
1 |
|
|
T3 |
9 |
|
T5 |
27 |
|
T40 |
7 |
auto[1] |
19839 |
1 |
|
|
T1 |
50 |
|
T2 |
1 |
|
T3 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11954 |
1 |
|
|
T1 |
26 |
|
T2 |
1 |
|
T3 |
9 |
auto[1] |
14968 |
1 |
|
|
T1 |
24 |
|
T3 |
7 |
|
T5 |
59 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12809 |
1 |
|
|
T1 |
19 |
|
T2 |
1 |
|
T3 |
8 |
auto[1] |
14113 |
1 |
|
|
T1 |
31 |
|
T3 |
8 |
|
T5 |
58 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1560 |
1 |
|
|
T3 |
3 |
|
T5 |
8 |
|
T13 |
12 |
auto[0] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T3 |
2 |
|
T5 |
5 |
|
T40 |
3 |
auto[0] |
auto[1] |
auto[0] |
4566 |
1 |
|
|
T1 |
11 |
|
T2 |
1 |
|
T3 |
3 |
auto[0] |
auto[1] |
auto[1] |
4195 |
1 |
|
|
T1 |
15 |
|
T3 |
1 |
|
T5 |
23 |
auto[1] |
auto[0] |
auto[0] |
1639 |
1 |
|
|
T3 |
1 |
|
T5 |
8 |
|
T13 |
8 |
auto[1] |
auto[0] |
auto[1] |
2251 |
1 |
|
|
T3 |
3 |
|
T5 |
6 |
|
T40 |
4 |
auto[1] |
auto[1] |
auto[0] |
5044 |
1 |
|
|
T1 |
8 |
|
T3 |
1 |
|
T5 |
21 |
auto[1] |
auto[1] |
auto[1] |
6034 |
1 |
|
|
T1 |
16 |
|
T3 |
2 |
|
T5 |
24 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7083 |
1 |
|
|
T3 |
9 |
|
T5 |
27 |
|
T40 |
7 |
auto[1] |
19839 |
1 |
|
|
T1 |
50 |
|
T2 |
1 |
|
T3 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12151 |
1 |
|
|
T1 |
23 |
|
T2 |
1 |
|
T3 |
9 |
auto[1] |
14771 |
1 |
|
|
T1 |
27 |
|
T3 |
7 |
|
T5 |
57 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12781 |
1 |
|
|
T1 |
32 |
|
T2 |
1 |
|
T3 |
12 |
auto[1] |
14141 |
1 |
|
|
T1 |
18 |
|
T3 |
4 |
|
T5 |
66 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1677 |
1 |
|
|
T3 |
4 |
|
T5 |
8 |
|
T40 |
1 |
auto[0] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T3 |
1 |
|
T5 |
7 |
|
T40 |
2 |
auto[0] |
auto[1] |
auto[0] |
4587 |
1 |
|
|
T1 |
14 |
|
T2 |
1 |
|
T3 |
4 |
auto[0] |
auto[1] |
auto[1] |
4249 |
1 |
|
|
T1 |
9 |
|
T5 |
26 |
|
T9 |
1 |
auto[1] |
auto[0] |
auto[0] |
1581 |
1 |
|
|
T3 |
2 |
|
T5 |
5 |
|
T40 |
3 |
auto[1] |
auto[0] |
auto[1] |
2187 |
1 |
|
|
T3 |
2 |
|
T5 |
7 |
|
T40 |
1 |
auto[1] |
auto[1] |
auto[0] |
4936 |
1 |
|
|
T1 |
18 |
|
T3 |
2 |
|
T5 |
19 |
auto[1] |
auto[1] |
auto[1] |
6067 |
1 |
|
|
T1 |
9 |
|
T3 |
1 |
|
T5 |
26 |