Unified Coverage Report :: Group :: pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg

Group : pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_pwrmgr_env_0.1/pwrmgr_env_cov.sv

6 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
WakeupAonTimer_ctrl_cg	100.00	1	100	1	64	64
WakeupDbgCable_ctrl_cg	100.00	1	100	1	64	64
WakeupPin_ctrl_cg	100.00	1	100	1	64	64
WakeupSensorCtrl_ctrl_cg	100.00	1	100	1	64	64
WakeupSysrst_ctrl_cg	100.00	1	100	1	64	64
WakeupUsb_ctrl_cg	100.00	1	100	1	64	64

---

Group Instance : WakeupAonTimer_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupAonTimer_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupAonTimer_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupAonTimer_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupDbgCable_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupDbgCable_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupDbgCable_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupDbgCable_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupPin_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupPin_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupPin_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupPin_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupSensorCtrl_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupSensorCtrl_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupSensorCtrl_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupSensorCtrl_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupSysrst_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupSysrst_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupSysrst_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupSysrst_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupUsb_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupUsb_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupUsb_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupUsb_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

8077

1

T2

164

T4

4

T12

58

auto[1]

21815

1

T2

321

T4

4

T8

50

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13423

1

T2

235

T4

7

T8

24

auto[1]

16469

1

T2

250

T4

1

T8

26

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14168

1

T2

220

T4

4

T8

26

auto[1]

15724

1

T2

265

T4

4

T8

24

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1893	1			T2	44		T4	2		T12	11
auto[0]	auto[0]	auto[1]	1829	1			T2	41		T4	1		T12	18
auto[0]	auto[1]	auto[0]	5037	1			T2	82		T4	2		T8	12
auto[0]	auto[1]	auto[1]	4664	1			T2	68		T4	2		T8	12
auto[1]	auto[0]	auto[0]	1809	1			T2	31		T12	14		T80	1
auto[1]	auto[0]	auto[1]	2546	1			T2	48		T4	1		T12	15
auto[1]	auto[1]	auto[0]	5429	1			T2	63		T8	14		T9	12
auto[1]	auto[1]	auto[1]	6685	1			T2	108		T8	12		T9	17

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

8077

1

T2

164

T4

4

T12

58

auto[1]

21815

1

T2

321

T4

4

T8

50

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13643

1

T2

231

T4

4

T8

25

auto[1]

16249

1

T2

254

T4

4

T8

25

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14132

1

T2

223

T4

4

T8

22

auto[1]

15760

1

T2

262

T4

4

T8

28

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1842	1			T2	42		T12	9		T80	1
auto[0]	auto[0]	auto[1]	1856	1			T2	38		T4	1		T12	19
auto[0]	auto[1]	auto[0]	5121	1			T2	76		T4	2		T8	12
auto[0]	auto[1]	auto[1]	4824	1			T2	75		T4	1		T8	13
auto[1]	auto[0]	auto[0]	1841	1			T2	37		T4	2		T12	13
auto[1]	auto[0]	auto[1]	2538	1			T2	47		T4	1		T12	17
auto[1]	auto[1]	auto[0]	5328	1			T2	68		T8	10		T9	11
auto[1]	auto[1]	auto[1]	6542	1			T2	102		T4	1		T8	15

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

8077

1

T2

164

T4

4

T12

58

auto[1]

21815

1

T2

321

T4

4

T8

50

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13345

1

T2

203

T4

2

T8

16

auto[1]

16547

1

T2

282

T4

6

T8

34

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14155

1

T2

235

T4

2

T8

21

auto[1]

15737

1

T2

250

T4

6

T8

29

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1868	1			T2	35		T12	24		T80	2
auto[0]	auto[0]	auto[1]	1853	1			T2	35		T12	16		T80	2
auto[0]	auto[1]	auto[0]	4998	1			T2	70		T4	1		T8	8
auto[0]	auto[1]	auto[1]	4626	1			T2	63		T4	1		T8	8
auto[1]	auto[0]	auto[0]	1872	1			T2	38		T4	1		T12	7
auto[1]	auto[0]	auto[1]	2484	1			T2	56		T4	3		T12	11
auto[1]	auto[1]	auto[0]	5417	1			T2	92		T8	13		T9	12
auto[1]	auto[1]	auto[1]	6774	1			T2	96		T4	2		T8	21

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

8077

1

T2

164

T4

4

T12

58

auto[1]

21815

1

T2

321

T4

4

T8

50

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13430

1

T2

206

T4

4

T8

27

auto[1]

16462

1

T2

279

T4

4

T8

23

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14166

1

T2

222

T4

5

T8

22

auto[1]

15726

1

T2

263

T4

3

T8

28

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1855	1			T2	30		T4	1		T12	16
auto[0]	auto[0]	auto[1]	1878	1			T2	34		T12	11		T19	38
auto[0]	auto[1]	auto[0]	4996	1			T2	74		T4	2		T8	12
auto[0]	auto[1]	auto[1]	4701	1			T2	68		T4	1		T8	15
auto[1]	auto[0]	auto[0]	1868	1			T2	38		T4	1		T12	15
auto[1]	auto[0]	auto[1]	2476	1			T2	62		T4	2		T12	16
auto[1]	auto[1]	auto[0]	5447	1			T2	80		T4	1		T8	10
auto[1]	auto[1]	auto[1]	6671	1			T2	99		T8	13		T9	14

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

8077

1

T2

164

T4

4

T12

58

auto[1]

21815

1

T2

321

T4

4

T8

50

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13657

1

T2

222

T4

1

T8

19

auto[1]

16235

1

T2

263

T4

7

T8

31

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14240

1

T2

223

T4

4

T8

26

auto[1]

15652

1

T2

262

T4

4

T8

24

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1921	1			T2	34		T12	18		T80	2
auto[0]	auto[0]	auto[1]	1873	1			T2	40		T4	1		T12	11
auto[0]	auto[1]	auto[0]	5098	1			T2	80		T8	9		T9	12
auto[0]	auto[1]	auto[1]	4765	1			T2	68		T8	10		T9	11
auto[1]	auto[0]	auto[0]	1772	1			T2	32		T4	2		T12	11
auto[1]	auto[0]	auto[1]	2511	1			T2	58		T4	1		T12	18
auto[1]	auto[1]	auto[0]	5449	1			T2	77		T4	2		T8	17
auto[1]	auto[1]	auto[1]	6503	1			T2	96		T4	2		T8	14

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

8077

1

T2

164

T4

4

T12

58

auto[1]

21815

1

T2

321

T4

4

T8

50

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13459

1

T2

214

T4

5

T8

23

auto[1]

16433

1

T2

271

T4

3

T8

27

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14216

1

T2

228

T4

6

T8

29

auto[1]

15676

1

T2

257

T4

2

T8

21

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1826	1			T2	33		T4	2		T12	12
auto[0]	auto[0]	auto[1]	1916	1			T2	46		T12	13		T19	42
auto[0]	auto[1]	auto[0]	5084	1			T2	76		T4	1		T8	11
auto[0]	auto[1]	auto[1]	4633	1			T2	59		T4	2		T8	12
auto[1]	auto[0]	auto[0]	1862	1			T2	37		T4	2		T12	13
auto[1]	auto[0]	auto[1]	2473	1			T2	48		T12	20		T80	2
auto[1]	auto[1]	auto[0]	5444	1			T2	82		T4	1		T8	18
auto[1]	auto[1]	auto[1]	6654	1			T2	104		T8	9		T9	17