Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
17 |
1 |
|
|
T10 |
3 |
|
T29 |
2 |
|
T54 |
2 |
auto[1] |
114 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
60 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T10 |
1 |
auto[1] |
71 |
1 |
|
|
T8 |
1 |
|
T10 |
2 |
|
T15 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
64 |
1 |
|
|
T6 |
1 |
|
T10 |
1 |
|
T48 |
1 |
auto[1] |
67 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T10 |
2 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
3 |
1 |
|
|
T54 |
1 |
|
T57 |
1 |
|
T203 |
1 |
auto[0] |
auto[0] |
auto[1] |
4 |
1 |
|
|
T10 |
1 |
|
T54 |
1 |
|
T58 |
2 |
auto[0] |
auto[1] |
auto[0] |
25 |
1 |
|
|
T6 |
1 |
|
T48 |
1 |
|
T68 |
1 |
auto[0] |
auto[1] |
auto[1] |
28 |
1 |
|
|
T5 |
1 |
|
T50 |
1 |
|
T88 |
1 |
auto[1] |
auto[0] |
auto[0] |
4 |
1 |
|
|
T10 |
1 |
|
T29 |
2 |
|
T188 |
1 |
auto[1] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T10 |
1 |
|
T145 |
1 |
|
T58 |
1 |
auto[1] |
auto[1] |
auto[0] |
32 |
1 |
|
|
T15 |
1 |
|
T24 |
1 |
|
T67 |
1 |
auto[1] |
auto[1] |
auto[1] |
29 |
1 |
|
|
T8 |
1 |
|
T144 |
1 |
|
T147 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
17 |
1 |
|
|
T10 |
3 |
|
T29 |
2 |
|
T54 |
2 |
auto[1] |
114 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
59 |
1 |
|
|
T5 |
1 |
|
T10 |
2 |
|
T48 |
1 |
auto[1] |
72 |
1 |
|
|
T6 |
1 |
|
T8 |
1 |
|
T10 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
60 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T10 |
2 |
auto[1] |
71 |
1 |
|
|
T6 |
1 |
|
T10 |
1 |
|
T48 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
6 |
1 |
|
|
T10 |
2 |
|
T29 |
1 |
|
T57 |
1 |
auto[0] |
auto[0] |
auto[1] |
2 |
1 |
|
|
T145 |
1 |
|
T189 |
1 |
|
- |
- |
auto[0] |
auto[1] |
auto[0] |
20 |
1 |
|
|
T5 |
1 |
|
T50 |
1 |
|
T88 |
1 |
auto[0] |
auto[1] |
auto[1] |
31 |
1 |
|
|
T48 |
1 |
|
T68 |
1 |
|
T183 |
1 |
auto[1] |
auto[0] |
auto[0] |
3 |
1 |
|
|
T54 |
1 |
|
T58 |
1 |
|
T146 |
1 |
auto[1] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T10 |
1 |
|
T29 |
1 |
|
T54 |
1 |
auto[1] |
auto[1] |
auto[0] |
31 |
1 |
|
|
T8 |
1 |
|
T24 |
1 |
|
T71 |
1 |
auto[1] |
auto[1] |
auto[1] |
32 |
1 |
|
|
T6 |
1 |
|
T15 |
1 |
|
T67 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
17 |
1 |
|
|
T10 |
3 |
|
T29 |
2 |
|
T54 |
2 |
auto[1] |
114 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
66 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T48 |
1 |
auto[1] |
65 |
1 |
|
|
T8 |
1 |
|
T10 |
3 |
|
T15 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
55 |
1 |
|
|
T6 |
1 |
|
T50 |
1 |
|
T88 |
1 |
auto[1] |
76 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T10 |
3 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
5 |
1 |
|
|
T29 |
1 |
|
T58 |
3 |
|
T146 |
1 |
auto[0] |
auto[0] |
auto[1] |
5 |
1 |
|
|
T29 |
1 |
|
T188 |
1 |
|
T57 |
1 |
auto[0] |
auto[1] |
auto[0] |
22 |
1 |
|
|
T6 |
1 |
|
T50 |
1 |
|
T88 |
1 |
auto[0] |
auto[1] |
auto[1] |
34 |
1 |
|
|
T5 |
1 |
|
T48 |
1 |
|
T68 |
1 |
auto[1] |
auto[0] |
auto[0] |
1 |
1 |
|
|
T203 |
1 |
|
- |
- |
|
- |
- |
auto[1] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T10 |
3 |
|
T54 |
2 |
|
T145 |
1 |
auto[1] |
auto[1] |
auto[0] |
27 |
1 |
|
|
T67 |
1 |
|
T89 |
1 |
|
T144 |
1 |
auto[1] |
auto[1] |
auto[1] |
31 |
1 |
|
|
T8 |
1 |
|
T15 |
1 |
|
T24 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
17 |
1 |
|
|
T10 |
3 |
|
T29 |
2 |
|
T54 |
2 |
auto[1] |
114 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
64 |
1 |
|
|
T5 |
1 |
|
T10 |
3 |
|
T48 |
1 |
auto[1] |
67 |
1 |
|
|
T6 |
1 |
|
T8 |
1 |
|
T15 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
67 |
1 |
|
|
T5 |
1 |
|
T10 |
3 |
|
T50 |
1 |
auto[1] |
64 |
1 |
|
|
T6 |
1 |
|
T8 |
1 |
|
T48 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
8 |
1 |
|
|
T10 |
3 |
|
T188 |
1 |
|
T57 |
1 |
auto[0] |
auto[0] |
auto[1] |
3 |
1 |
|
|
T29 |
1 |
|
T54 |
2 |
|
- |
- |
auto[0] |
auto[1] |
auto[0] |
26 |
1 |
|
|
T5 |
1 |
|
T50 |
1 |
|
T88 |
1 |
auto[0] |
auto[1] |
auto[1] |
27 |
1 |
|
|
T48 |
1 |
|
T92 |
1 |
|
T198 |
1 |
auto[1] |
auto[0] |
auto[0] |
3 |
1 |
|
|
T29 |
1 |
|
T58 |
1 |
|
T146 |
1 |
auto[1] |
auto[0] |
auto[1] |
3 |
1 |
|
|
T145 |
1 |
|
T148 |
1 |
|
T189 |
1 |
auto[1] |
auto[1] |
auto[0] |
30 |
1 |
|
|
T15 |
1 |
|
T69 |
1 |
|
T90 |
1 |
auto[1] |
auto[1] |
auto[1] |
31 |
1 |
|
|
T6 |
1 |
|
T8 |
1 |
|
T24 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
17 |
1 |
|
|
T10 |
3 |
|
T29 |
2 |
|
T54 |
2 |
auto[1] |
114 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
56 |
1 |
|
|
T5 |
1 |
|
T10 |
2 |
|
T48 |
1 |
auto[1] |
75 |
1 |
|
|
T6 |
1 |
|
T8 |
1 |
|
T10 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
59 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T10 |
1 |
auto[1] |
72 |
1 |
|
|
T6 |
1 |
|
T10 |
2 |
|
T48 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
2 |
1 |
|
|
T188 |
1 |
|
T58 |
1 |
|
- |
- |
auto[0] |
auto[0] |
auto[1] |
4 |
1 |
|
|
T10 |
2 |
|
T145 |
1 |
|
T189 |
1 |
auto[0] |
auto[1] |
auto[0] |
23 |
1 |
|
|
T5 |
1 |
|
T88 |
1 |
|
T68 |
1 |
auto[0] |
auto[1] |
auto[1] |
27 |
1 |
|
|
T48 |
1 |
|
T50 |
1 |
|
T71 |
1 |
auto[1] |
auto[0] |
auto[0] |
4 |
1 |
|
|
T10 |
1 |
|
T54 |
2 |
|
T58 |
1 |
auto[1] |
auto[0] |
auto[1] |
7 |
1 |
|
|
T29 |
2 |
|
T57 |
1 |
|
T58 |
1 |
auto[1] |
auto[1] |
auto[0] |
30 |
1 |
|
|
T8 |
1 |
|
T15 |
1 |
|
T90 |
1 |
auto[1] |
auto[1] |
auto[1] |
34 |
1 |
|
|
T6 |
1 |
|
T24 |
1 |
|
T67 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
17 |
1 |
|
|
T10 |
3 |
|
T29 |
2 |
|
T54 |
2 |
auto[1] |
114 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
61 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T10 |
2 |
auto[1] |
70 |
1 |
|
|
T8 |
1 |
|
T10 |
1 |
|
T15 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
70 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T10 |
1 |
auto[1] |
61 |
1 |
|
|
T8 |
1 |
|
T10 |
2 |
|
T48 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
3 |
1 |
|
|
T29 |
2 |
|
T203 |
1 |
|
- |
- |
auto[0] |
auto[0] |
auto[1] |
4 |
1 |
|
|
T10 |
2 |
|
T57 |
1 |
|
T58 |
1 |
auto[0] |
auto[1] |
auto[0] |
33 |
1 |
|
|
T5 |
1 |
|
T6 |
1 |
|
T88 |
1 |
auto[0] |
auto[1] |
auto[1] |
21 |
1 |
|
|
T48 |
1 |
|
T50 |
1 |
|
T68 |
1 |
auto[1] |
auto[0] |
auto[0] |
2 |
1 |
|
|
T10 |
1 |
|
T188 |
1 |
|
- |
- |
auto[1] |
auto[0] |
auto[1] |
8 |
1 |
|
|
T54 |
2 |
|
T145 |
1 |
|
T58 |
2 |
auto[1] |
auto[1] |
auto[0] |
32 |
1 |
|
|
T15 |
1 |
|
T67 |
1 |
|
T147 |
1 |
auto[1] |
auto[1] |
auto[1] |
28 |
1 |
|
|
T8 |
1 |
|
T24 |
1 |
|
T69 |
1 |