Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
21 |
1 |
|
|
T12 |
1 |
|
T58 |
1 |
|
T64 |
5 |
auto[1] |
127 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
63 |
1 |
|
|
T2 |
1 |
|
T8 |
1 |
|
T35 |
1 |
auto[1] |
85 |
1 |
|
|
T6 |
1 |
|
T59 |
1 |
|
T60 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
64 |
1 |
|
|
T60 |
1 |
|
T35 |
1 |
|
T12 |
3 |
auto[1] |
84 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
2 |
1 |
|
|
T58 |
1 |
|
T64 |
1 |
|
- |
- |
auto[0] |
auto[0] |
auto[1] |
8 |
1 |
|
|
T64 |
2 |
|
T142 |
1 |
|
T197 |
1 |
auto[0] |
auto[1] |
auto[0] |
21 |
1 |
|
|
T35 |
1 |
|
T91 |
1 |
|
T27 |
1 |
auto[0] |
auto[1] |
auto[1] |
32 |
1 |
|
|
T2 |
1 |
|
T8 |
1 |
|
T34 |
1 |
auto[1] |
auto[0] |
auto[0] |
4 |
1 |
|
|
T64 |
2 |
|
T143 |
1 |
|
T140 |
1 |
auto[1] |
auto[0] |
auto[1] |
7 |
1 |
|
|
T12 |
1 |
|
T142 |
1 |
|
T197 |
1 |
auto[1] |
auto[1] |
auto[0] |
37 |
1 |
|
|
T60 |
1 |
|
T12 |
3 |
|
T88 |
1 |
auto[1] |
auto[1] |
auto[1] |
37 |
1 |
|
|
T6 |
1 |
|
T59 |
1 |
|
T90 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
21 |
1 |
|
|
T12 |
1 |
|
T58 |
1 |
|
T64 |
5 |
auto[1] |
127 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
59 |
1 |
|
|
T8 |
1 |
|
T35 |
1 |
|
T12 |
4 |
auto[1] |
89 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T59 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
73 |
1 |
|
|
T2 |
1 |
|
T60 |
1 |
|
T12 |
1 |
auto[1] |
75 |
1 |
|
|
T6 |
1 |
|
T8 |
1 |
|
T59 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
3 |
1 |
|
|
T64 |
1 |
|
T142 |
1 |
|
T68 |
1 |
auto[0] |
auto[0] |
auto[1] |
5 |
1 |
|
|
T12 |
1 |
|
T64 |
1 |
|
T142 |
1 |
auto[0] |
auto[1] |
auto[0] |
23 |
1 |
|
|
T12 |
1 |
|
T34 |
1 |
|
T91 |
1 |
auto[0] |
auto[1] |
auto[1] |
28 |
1 |
|
|
T8 |
1 |
|
T35 |
1 |
|
T12 |
2 |
auto[1] |
auto[0] |
auto[0] |
5 |
1 |
|
|
T58 |
1 |
|
T64 |
2 |
|
T143 |
1 |
auto[1] |
auto[0] |
auto[1] |
8 |
1 |
|
|
T64 |
1 |
|
T197 |
2 |
|
T67 |
1 |
auto[1] |
auto[1] |
auto[0] |
42 |
1 |
|
|
T2 |
1 |
|
T60 |
1 |
|
T89 |
1 |
auto[1] |
auto[1] |
auto[1] |
34 |
1 |
|
|
T6 |
1 |
|
T59 |
1 |
|
T88 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
21 |
1 |
|
|
T12 |
1 |
|
T58 |
1 |
|
T64 |
5 |
auto[1] |
127 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
68 |
1 |
|
|
T8 |
1 |
|
T35 |
1 |
|
T12 |
2 |
auto[1] |
80 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T59 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
68 |
1 |
|
|
T2 |
1 |
|
T35 |
1 |
|
T12 |
3 |
auto[1] |
80 |
1 |
|
|
T6 |
1 |
|
T8 |
1 |
|
T59 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
7 |
1 |
|
|
T58 |
1 |
|
T64 |
3 |
|
T143 |
1 |
auto[0] |
auto[0] |
auto[1] |
4 |
1 |
|
|
T64 |
2 |
|
T197 |
1 |
|
T68 |
1 |
auto[0] |
auto[1] |
auto[0] |
30 |
1 |
|
|
T35 |
1 |
|
T12 |
1 |
|
T27 |
2 |
auto[0] |
auto[1] |
auto[1] |
27 |
1 |
|
|
T8 |
1 |
|
T12 |
1 |
|
T87 |
1 |
auto[1] |
auto[0] |
auto[0] |
4 |
1 |
|
|
T12 |
1 |
|
T67 |
1 |
|
T140 |
2 |
auto[1] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T142 |
1 |
|
T197 |
1 |
|
T144 |
1 |
auto[1] |
auto[1] |
auto[0] |
27 |
1 |
|
|
T2 |
1 |
|
T12 |
1 |
|
T28 |
1 |
auto[1] |
auto[1] |
auto[1] |
43 |
1 |
|
|
T6 |
1 |
|
T59 |
1 |
|
T60 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
21 |
1 |
|
|
T12 |
1 |
|
T58 |
1 |
|
T64 |
5 |
auto[1] |
127 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
70 |
1 |
|
|
T8 |
1 |
|
T35 |
1 |
|
T12 |
4 |
auto[1] |
78 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T59 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
61 |
1 |
|
|
T8 |
1 |
|
T59 |
1 |
|
T12 |
2 |
auto[1] |
87 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T60 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
5 |
1 |
|
|
T64 |
3 |
|
T142 |
1 |
|
T140 |
1 |
auto[0] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T12 |
1 |
|
T197 |
2 |
|
T144 |
2 |
auto[0] |
auto[1] |
auto[0] |
25 |
1 |
|
|
T8 |
1 |
|
T12 |
2 |
|
T91 |
1 |
auto[0] |
auto[1] |
auto[1] |
34 |
1 |
|
|
T35 |
1 |
|
T12 |
1 |
|
T87 |
1 |
auto[1] |
auto[0] |
auto[0] |
3 |
1 |
|
|
T142 |
1 |
|
T67 |
1 |
|
T68 |
1 |
auto[1] |
auto[0] |
auto[1] |
7 |
1 |
|
|
T58 |
1 |
|
T64 |
2 |
|
T143 |
1 |
auto[1] |
auto[1] |
auto[0] |
28 |
1 |
|
|
T59 |
1 |
|
T88 |
1 |
|
T90 |
1 |
auto[1] |
auto[1] |
auto[1] |
40 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T60 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
21 |
1 |
|
|
T12 |
1 |
|
T58 |
1 |
|
T64 |
5 |
auto[1] |
127 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
63 |
1 |
|
|
T8 |
1 |
|
T35 |
1 |
|
T12 |
2 |
auto[1] |
85 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T59 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
71 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T8 |
1 |
auto[1] |
77 |
1 |
|
|
T12 |
4 |
|
T89 |
1 |
|
T90 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
4 |
1 |
|
|
T64 |
2 |
|
T142 |
1 |
|
T140 |
1 |
auto[0] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T12 |
1 |
|
T58 |
1 |
|
T64 |
1 |
auto[0] |
auto[1] |
auto[0] |
30 |
1 |
|
|
T8 |
1 |
|
T35 |
1 |
|
T34 |
1 |
auto[0] |
auto[1] |
auto[1] |
23 |
1 |
|
|
T12 |
1 |
|
T91 |
1 |
|
T94 |
1 |
auto[1] |
auto[0] |
auto[0] |
5 |
1 |
|
|
T64 |
1 |
|
T140 |
2 |
|
T68 |
2 |
auto[1] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T64 |
1 |
|
T143 |
1 |
|
T142 |
1 |
auto[1] |
auto[1] |
auto[0] |
32 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T59 |
1 |
auto[1] |
auto[1] |
auto[1] |
42 |
1 |
|
|
T12 |
2 |
|
T89 |
1 |
|
T90 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
21 |
1 |
|
|
T12 |
1 |
|
T58 |
1 |
|
T64 |
5 |
auto[1] |
127 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T8 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
62 |
1 |
|
|
T2 |
1 |
|
T8 |
1 |
|
T35 |
1 |
auto[1] |
86 |
1 |
|
|
T6 |
1 |
|
T59 |
1 |
|
T60 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
76 |
1 |
|
|
T2 |
1 |
|
T59 |
1 |
|
T60 |
1 |
auto[1] |
72 |
1 |
|
|
T6 |
1 |
|
T8 |
1 |
|
T12 |
3 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
8 |
1 |
|
|
T12 |
1 |
|
T58 |
1 |
|
T64 |
2 |
auto[0] |
auto[0] |
auto[1] |
5 |
1 |
|
|
T142 |
1 |
|
T197 |
1 |
|
T144 |
1 |
auto[0] |
auto[1] |
auto[0] |
27 |
1 |
|
|
T2 |
1 |
|
T35 |
1 |
|
T194 |
1 |
auto[0] |
auto[1] |
auto[1] |
22 |
1 |
|
|
T8 |
1 |
|
T12 |
1 |
|
T34 |
1 |
auto[1] |
auto[0] |
auto[0] |
2 |
1 |
|
|
T64 |
1 |
|
T140 |
1 |
|
- |
- |
auto[1] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T64 |
2 |
|
T197 |
1 |
|
T190 |
1 |
auto[1] |
auto[1] |
auto[0] |
39 |
1 |
|
|
T59 |
1 |
|
T60 |
1 |
|
T26 |
1 |
auto[1] |
auto[1] |
auto[1] |
39 |
1 |
|
|
T6 |
1 |
|
T12 |
2 |
|
T88 |
1 |