Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi_cov#(4,32'b00000000000000000000000000000101,32'b00000000000000000000000000001010)::mubi_cg

Group : dv_base_reg_pkg::mubi_cov#(4,32'b00000000000000000000000000000101,32'b00000000000000000000000000001010)::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi4_cov_of_tb.dut.u_lc_dft_en_mubi_cov_if	100.00	1	100	1	64	64
mubi4_cov_of_tb.dut.u_lc_hw_debug_en_mubi_cov_if	100.00	1	100	1	64	64

---

Group Instance : mubi4_cov_of_tb.dut.u_lc_dft_en_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_tb.dut.u_lc_dft_en_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_tb.dut.u_lc_dft_en_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

---

Group Instance : mubi4_cov_of_tb.dut.u_lc_hw_debug_en_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_tb.dut.u_lc_hw_debug_en_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_tb.dut.u_lc_hw_debug_en_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	278	1			T20	6		T21	5		T22	2
others[1]	257	1			T20	6		T21	5		T22	9
others[2]	273	1			T20	7		T21	5		T22	6
others[3]	432	1			T20	3		T21	10		T22	3
false	6881	1			T1	2		T2	13		T3	66
true	616	1			T20	7		T21	9		T22	10

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	293	1			T20	5		T21	5		T22	9
others[1]	254	1			T20	8		T21	6		T22	5
others[2]	274	1			T20	2		T21	3		T22	1
others[3]	459	1			T20	10		T21	8		T22	7
false	6839	1			T1	2		T2	13		T3	66
true	585	1			T20	11		T21	14		T22	7