Group : pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_pwrmgr_env_0.1/pwrmgr_env_cov.sv

6 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
WakeupAonTimer_ctrl_cg 100.00 1 100 1 64 64
WakeupDbgCable_ctrl_cg 100.00 1 100 1 64 64
WakeupPin_ctrl_cg 100.00 1 100 1 64 64
WakeupSensorCtrl_ctrl_cg 100.00 1 100 1 64 64
WakeupSysrst_ctrl_cg 100.00 1 100 1 64 64
WakeupUsb_ctrl_cg 100.00 1 100 1 64 64




Group Instance : WakeupAonTimer_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupAonTimer_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupAonTimer_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupAonTimer_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupDbgCable_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupDbgCable_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupDbgCable_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupDbgCable_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupPin_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupPin_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupPin_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupPin_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupSensorCtrl_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupSensorCtrl_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupSensorCtrl_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupSensorCtrl_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupSysrst_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupSysrst_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupSysrst_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupSysrst_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupUsb_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupUsb_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupUsb_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupUsb_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4722 1 T24 2 T25 13 T11 57
auto[1] 15136 1 T4 1 T6 1 T7 50



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8923 1 T6 1 T7 22 T8 9
auto[1] 10935 1 T4 1 T7 28 T8 8



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9621 1 T7 22 T8 9 T10 25
auto[1] 10237 1 T4 1 T6 1 T7 28



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1091 1 T24 1 T11 14 T12 19
auto[0] auto[0] auto[1] 1083 1 T24 1 T25 3 T11 16
auto[0] auto[1] auto[0] 3616 1 T7 12 T8 6 T10 12
auto[0] auto[1] auto[1] 3133 1 T6 1 T7 10 T8 3
auto[1] auto[0] auto[0] 1124 1 T25 1 T11 12 T12 11
auto[1] auto[0] auto[1] 1424 1 T25 9 T11 15 T26 2
auto[1] auto[1] auto[0] 3790 1 T7 10 T8 3 T10 13
auto[1] auto[1] auto[1] 4597 1 T4 1 T7 18 T8 5


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4722 1 T24 2 T25 13 T11 57
auto[1] 15136 1 T4 1 T6 1 T7 50



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9010 1 T6 1 T7 19 T8 6
auto[1] 10848 1 T4 1 T7 31 T8 11



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9486 1 T4 1 T7 27 T8 7
auto[1] 10372 1 T6 1 T7 23 T8 10



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1079 1 T24 1 T25 5 T11 12
auto[0] auto[0] auto[1] 1082 1 T25 3 T11 13 T26 1
auto[0] auto[1] auto[0] 3564 1 T7 10 T8 3 T10 7
auto[0] auto[1] auto[1] 3285 1 T6 1 T7 9 T8 3
auto[1] auto[0] auto[0] 1096 1 T25 2 T11 17 T26 1
auto[1] auto[0] auto[1] 1465 1 T24 1 T25 3 T11 15
auto[1] auto[1] auto[0] 3747 1 T4 1 T7 17 T8 4
auto[1] auto[1] auto[1] 4540 1 T7 14 T8 7 T10 16


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4722 1 T24 2 T25 13 T11 57
auto[1] 15136 1 T4 1 T6 1 T7 50



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8800 1 T6 1 T7 24 T8 6
auto[1] 11058 1 T4 1 T7 26 T8 11



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9569 1 T7 28 T8 7 T10 32
auto[1] 10289 1 T4 1 T6 1 T7 22



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1031 1 T25 2 T11 9 T26 2
auto[0] auto[0] auto[1] 1041 1 T24 1 T25 2 T11 12
auto[0] auto[1] auto[0] 3563 1 T7 17 T8 2 T10 10
auto[0] auto[1] auto[1] 3165 1 T6 1 T7 7 T8 4
auto[1] auto[0] auto[0] 1160 1 T25 3 T11 18 T12 18
auto[1] auto[0] auto[1] 1490 1 T24 1 T25 6 T11 18
auto[1] auto[1] auto[0] 3815 1 T7 11 T8 5 T10 22
auto[1] auto[1] auto[1] 4593 1 T4 1 T7 15 T8 6


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4722 1 T24 2 T25 13 T11 57
auto[1] 15136 1 T4 1 T6 1 T7 50



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8903 1 T6 1 T7 23 T8 8
auto[1] 10955 1 T4 1 T7 27 T8 9



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9366 1 T4 1 T6 1 T7 23
auto[1] 10492 1 T7 27 T8 9 T10 23



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1048 1 T25 5 T11 14 T26 2
auto[0] auto[0] auto[1] 1099 1 T11 14 T12 14 T18 8
auto[0] auto[1] auto[0] 3546 1 T6 1 T7 12 T8 2
auto[0] auto[1] auto[1] 3210 1 T7 11 T8 6 T10 15
auto[1] auto[0] auto[0] 1104 1 T24 2 T25 4 T11 15
auto[1] auto[0] auto[1] 1471 1 T25 4 T11 14 T26 1
auto[1] auto[1] auto[0] 3668 1 T4 1 T7 11 T8 6
auto[1] auto[1] auto[1] 4712 1 T7 16 T8 3 T10 8


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4722 1 T24 2 T25 13 T11 57
auto[1] 15136 1 T4 1 T6 1 T7 50



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9068 1 T6 1 T7 26 T8 6
auto[1] 10790 1 T4 1 T7 24 T8 11



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9434 1 T7 29 T8 9 T10 17
auto[1] 10424 1 T4 1 T6 1 T7 21



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1099 1 T25 2 T11 11 T12 15
auto[0] auto[0] auto[1] 1089 1 T24 2 T25 4 T11 12
auto[0] auto[1] auto[0] 3596 1 T7 17 T8 3 T10 10
auto[0] auto[1] auto[1] 3284 1 T6 1 T7 9 T8 3
auto[1] auto[0] auto[0] 1091 1 T25 4 T11 15 T26 1
auto[1] auto[0] auto[1] 1443 1 T25 3 T11 19 T26 1
auto[1] auto[1] auto[0] 3648 1 T7 12 T8 6 T10 7
auto[1] auto[1] auto[1] 4608 1 T4 1 T7 12 T8 5


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4722 1 T24 2 T25 13 T11 57
auto[1] 15136 1 T4 1 T6 1 T7 50



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8746 1 T6 1 T7 31 T8 6
auto[1] 11112 1 T4 1 T7 19 T8 11



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9403 1 T6 1 T7 24 T8 7
auto[1] 10455 1 T4 1 T7 26 T8 10



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1047 1 T25 5 T11 13 T26 2
auto[0] auto[0] auto[1] 1094 1 T25 5 T11 15 T26 2
auto[0] auto[1] auto[0] 3495 1 T6 1 T7 17 T8 3
auto[0] auto[1] auto[1] 3110 1 T7 14 T8 3 T10 11
auto[1] auto[0] auto[0] 1095 1 T25 2 T11 17 T12 11
auto[1] auto[0] auto[1] 1486 1 T24 2 T25 1 T11 12
auto[1] auto[1] auto[0] 3766 1 T7 7 T8 4 T10 14
auto[1] auto[1] auto[1] 4765 1 T4 1 T7 12 T8 7

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%