Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.08	96.15	98.39	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	26935528	14436	0	0
attest_sw_binding_0_rd_A	26935528	811	0	0
attest_sw_binding_1_rd_A	26935528	702	0	0
attest_sw_binding_2_rd_A	26935528	696	0	0
attest_sw_binding_3_rd_A	26935528	692	0	0
attest_sw_binding_4_rd_A	26935528	679	0	0
attest_sw_binding_5_rd_A	26935528	729	0	0
attest_sw_binding_6_rd_A	26935528	637	0	0
attest_sw_binding_7_rd_A	26935528	673	0	0
intr_enable_rd_A	26935528	1290	0	0
key_version_rd_A	26935528	662	0	0
max_creator_key_ver_regwen_rd_A	26935528	761	0	0
max_owner_int_key_ver_regwen_rd_A	26935528	719	0	0
max_owner_key_ver_regwen_rd_A	26935528	696	0	0
reseed_interval_regwen_rd_A	26935528	741	0	0
salt_0_rd_A	26935528	740	0	0
salt_1_rd_A	26935528	715	0	0
salt_2_rd_A	26935528	713	0	0
salt_3_rd_A	26935528	756	0	0
salt_4_rd_A	26935528	631	0	0
salt_5_rd_A	26935528	731	0	0
salt_6_rd_A	26935528	720	0	0
salt_7_rd_A	26935528	734	0	0
sealing_sw_binding_0_rd_A	26935528	685	0	0
sealing_sw_binding_1_rd_A	26935528	644	0	0
sealing_sw_binding_2_rd_A	26935528	647	0	0
sealing_sw_binding_3_rd_A	26935528	620	0	0
sealing_sw_binding_4_rd_A	26935528	731	0	0
sealing_sw_binding_5_rd_A	26935528	777	0	0
sealing_sw_binding_6_rd_A	26935528	791	0	0
sealing_sw_binding_7_rd_A	26935528	809	0	0
sideload_clear_rd_A	26935528	702	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	14436	0	0
T5	23698	0	0	0
T8	6300	0	0	0
T13	7726	392	0	0
T14	13483	0	0	0
T15	11096	0	0	0
T16	10796	0	0	0
T31	3206	0	0	0
T39	3288	0	0	0
T76	0	10	0	0
T84	1995	0	0	0
T98	2187	0	0	0
T101	0	206	0	0
T114	0	119	0	0
T116	0	228	0	0
T117	0	26	0	0
T118	0	7	0	0
T119	0	434	0	0
T167	0	2	0	0
T168	0	1	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	811	0	0
T17	10085	0	0	0
T76	6982	24	0	0
T104	8571	32	0	0
T114	12263	20	0	0
T122	0	2	0	0
T144	0	16	0	0
T167	2639	17	0	0
T168	2365	13	0	0
T169	2288	5	0	0
T170	0	9	0	0
T171	0	11	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	702	0	0
T17	10085	0	0	0
T76	6982	13	0	0
T104	8571	28	0	0
T114	12263	28	0	0
T144	0	22	0	0
T167	2639	9	0	0
T168	2365	11	0	0
T169	2288	7	0	0
T170	0	21	0	0
T171	0	3	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	2	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	696	0	0
T17	10085	0	0	0
T76	6982	18	0	0
T104	8571	24	0	0
T114	12263	31	0	0
T122	12082	9	0	0
T144	0	12	0	0
T167	2639	6	0	0
T168	2365	1	0	0
T170	0	15	0	0
T171	0	6	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	9	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	692	0	0
T17	10085	0	0	0
T76	6982	19	0	0
T104	8571	30	0	0
T114	12263	39	0	0
T122	0	6	0	0
T144	0	17	0	0
T167	2639	4	0	0
T168	2365	8	0	0
T169	2288	1	0	0
T170	0	4	0	0
T171	0	1	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	679	0	0
T17	10085	0	0	0
T76	6982	25	0	0
T104	8571	28	0	0
T114	12263	33	0	0
T144	0	24	0	0
T167	2639	6	0	0
T168	2365	12	0	0
T169	2288	6	0	0
T170	0	17	0	0
T171	0	19	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	14	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	729	0	0
T17	10085	0	0	0
T76	6982	16	0	0
T104	8571	21	0	0
T114	12263	19	0	0
T122	0	8	0	0
T144	0	14	0	0
T167	2639	4	0	0
T168	2365	5	0	0
T169	2288	7	0	0
T170	0	19	0	0
T171	0	4	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	637	0	0
T17	10085	0	0	0
T76	6982	24	0	0
T104	8571	23	0	0
T114	12263	24	0	0
T122	0	3	0	0
T144	0	18	0	0
T167	2639	11	0	0
T168	2365	4	0	0
T169	2288	2	0	0
T171	0	1	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	7	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	673	0	0
T17	10085	0	0	0
T76	6982	12	0	0
T104	8571	21	0	0
T114	12263	26	0	0
T122	12082	1	0	0
T144	0	8	0	0
T167	2639	7	0	0
T168	2365	15	0	0
T170	0	6	0	0
T171	0	15	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	3	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	1290	0	0
T17	10085	0	0	0
T76	6982	47	0	0
T104	8571	27	0	0
T114	12263	20	0	0
T131	1020	8	0	0
T132	1170	5	0	0
T167	2639	9	0	0
T168	0	1	0	0
T169	0	7	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T177	0	10	0	0
T178	0	7	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	662	0	0
T17	10085	0	0	0
T76	6982	26	0	0
T104	8571	31	0	0
T114	12263	20	0	0
T122	0	10	0	0
T144	0	2	0	0
T167	2639	4	0	0
T168	2365	9	0	0
T169	2288	5	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	1	0	0
T179	0	9	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	761	0	0
T17	10085	0	0	0
T76	6982	38	0	0
T104	8571	34	0	0
T114	12263	33	0	0
T122	0	3	0	0
T167	2639	7	0	0
T168	2365	9	0	0
T169	2288	9	0	0
T170	0	13	0	0
T171	0	3	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	11	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	719	0	0
T17	10085	0	0	0
T76	6982	31	0	0
T104	8571	28	0	0
T114	12263	26	0	0
T122	0	8	0	0
T144	0	13	0	0
T167	2639	11	0	0
T168	2365	6	0	0
T169	2288	2	0	0
T170	0	6	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	8	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	696	0	0
T17	10085	0	0	0
T76	6982	21	0	0
T104	8571	19	0	0
T114	12263	25	0	0
T122	0	16	0	0
T144	0	13	0	0
T167	2639	8	0	0
T168	2365	9	0	0
T169	2288	4	0	0
T170	0	26	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	4	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	741	0	0
T17	10085	0	0	0
T76	6982	29	0	0
T104	8571	31	0	0
T114	12263	28	0	0
T122	12082	2	0	0
T136	4843	0	0	0
T144	0	13	0	0
T167	2639	2	0	0
T170	0	10	0	0
T171	0	9	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	4	0	0
T176	0	18	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	740	0	0
T17	10085	0	0	0
T76	6982	28	0	0
T104	8571	24	0	0
T114	12263	25	0	0
T122	12082	4	0	0
T144	0	22	0	0
T167	2639	11	0	0
T168	2365	14	0	0
T170	0	13	0	0
T171	0	7	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	13	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	715	0	0
T17	10085	0	0	0
T76	6982	22	0	0
T104	8571	24	0	0
T114	12263	26	0	0
T122	0	21	0	0
T144	0	2	0	0
T167	2639	5	0	0
T168	2365	7	0	0
T169	2288	4	0	0
T170	0	6	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	1	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	713	0	0
T17	10085	0	0	0
T76	6982	18	0	0
T104	8571	23	0	0
T114	12263	29	0	0
T167	2639	7	0	0
T168	2365	14	0	0
T169	2288	3	0	0
T170	0	6	0	0
T171	0	9	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	2	0	0
T176	0	16	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	756	0	0
T17	10085	0	0	0
T76	6982	46	0	0
T104	8571	38	0	0
T114	12263	32	0	0
T122	0	4	0	0
T144	0	9	0	0
T167	2639	3	0	0
T168	2365	8	0	0
T169	2288	1	0	0
T170	0	8	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	4	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	631	0	0
T17	10085	0	0	0
T76	6982	21	0	0
T104	8571	20	0	0
T114	12263	25	0	0
T122	12082	4	0	0
T144	0	1	0	0
T167	2639	7	0	0
T168	2365	12	0	0
T170	0	16	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	10	0	0
T179	0	16	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	731	0	0
T17	10085	0	0	0
T76	6982	40	0	0
T104	8571	27	0	0
T114	12263	30	0	0
T122	0	9	0	0
T144	0	20	0	0
T168	2365	11	0	0
T169	2288	4	0	0
T171	0	5	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	5	0	0
T176	0	6	0	0
T178	1006	0	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	720	0	0
T17	10085	0	0	0
T76	6982	26	0	0
T104	8571	25	0	0
T114	12263	41	0	0
T122	0	7	0	0
T144	0	11	0	0
T167	2639	8	0	0
T168	2365	13	0	0
T169	2288	4	0	0
T170	0	17	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	1	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	734	0	0
T17	10085	0	0	0
T76	6982	24	0	0
T104	8571	35	0	0
T114	12263	37	0	0
T122	0	10	0	0
T144	0	13	0	0
T167	2639	2	0	0
T168	2365	14	0	0
T169	2288	2	0	0
T170	0	22	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	10	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	685	0	0
T17	10085	0	0	0
T76	6982	31	0	0
T104	8571	27	0	0
T114	12263	31	0	0
T122	0	9	0	0
T144	0	8	0	0
T167	2639	6	0	0
T168	2365	9	0	0
T169	2288	2	0	0
T170	0	23	0	0
T171	0	5	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	644	0	0
T17	10085	0	0	0
T76	6982	17	0	0
T104	8571	36	0	0
T114	12263	33	0	0
T144	0	5	0	0
T167	2639	1	0	0
T168	2365	6	0	0
T169	2288	4	0	0
T170	0	11	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	8	0	0
T176	0	8	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	647	0	0
T17	10085	0	0	0
T76	6982	28	0	0
T104	8571	19	0	0
T114	12263	18	0	0
T144	0	10	0	0
T167	2639	14	0	0
T168	2365	4	0	0
T169	2288	1	0	0
T170	0	11	0	0
T171	0	2	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	9	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	620	0	0
T17	10085	0	0	0
T76	6982	34	0	0
T104	8571	14	0	0
T114	12263	18	0	0
T122	0	4	0	0
T144	0	25	0	0
T168	2365	8	0	0
T169	2288	6	0	0
T170	0	17	0	0
T171	0	8	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	13	0	0
T178	1006	0	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	731	0	0
T17	10085	0	0	0
T76	6982	15	0	0
T104	8571	38	0	0
T114	12263	48	0	0
T122	0	10	0	0
T144	0	4	0	0
T167	2639	5	0	0
T168	2365	7	0	0
T169	2288	4	0	0
T171	0	3	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	6	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	777	0	0
T17	10085	0	0	0
T76	6982	33	0	0
T104	8571	28	0	0
T114	12263	23	0	0
T122	0	12	0	0
T144	0	17	0	0
T167	2639	11	0	0
T168	2365	15	0	0
T169	2288	5	0	0
T170	0	14	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	2	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	791	0	0
T17	10085	0	0	0
T76	6982	32	0	0
T104	8571	34	0	0
T114	12263	30	0	0
T144	15122	12	0	0
T167	2639	3	0	0
T168	2365	14	0	0
T170	0	42	0	0
T171	0	9	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	2	0	0
T179	0	3	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	809	0	0
T17	10085	0	0	0
T76	6982	25	0	0
T104	8571	31	0	0
T114	12263	25	0	0
T144	15122	10	0	0
T167	2639	8	0	0
T168	2365	11	0	0
T170	0	12	0	0
T171	0	3	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T176	0	5	0	0
T179	0	8	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26935528	702	0	0
T17	10085	0	0	0
T76	6982	42	0	0
T104	8571	25	0	0
T114	12263	36	0	0
T122	12082	9	0	0
T144	0	6	0	0
T167	2639	5	0	0
T168	2365	11	0	0
T170	0	8	0	0
T171	0	13	0	0
T172	1734	0	0	0
T173	44824	0	0	0
T174	30848	0	0	0
T175	0	2	0	0