Unified Coverage Report :: Group :: dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg

Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_lockable_field_cov.sv

34 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_0.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_1.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_2.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_3.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_4.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_5.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_6.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_7.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.control_shadowed.cdi_sel	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.control_shadowed.dest_sel	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.control_shadowed.operation	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.key_version.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.max_creator_key_ver_shadowed.val	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.max_owner_int_key_ver_shadowed.val	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.max_owner_key_ver_shadowed.val	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.reseed_interval_shadowed.val	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.salt_0.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.salt_1.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.salt_2.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.salt_3.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.salt_4.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.salt_5.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.salt_6.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.salt_7.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_0.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_1.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_2.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_3.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_4.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_5.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_6.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_7.val_0	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.sideload_clear.val	100.00	1	100	1	64	64
lockable_field_cov_of_keymgr_reg_block.start.en	100.00	1	100	1	64	64

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_0.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_0.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_0.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_1.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_1.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_1.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_2.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_2.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_2.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_3.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_3.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_3.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_4.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_4.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_4.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_5.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_5.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_5.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_6.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_6.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_6.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_7.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_7.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.attest_sw_binding_7.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.control_shadowed.cdi_sel

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.control_shadowed.cdi_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.control_shadowed.cdi_sel

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.control_shadowed.dest_sel

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.control_shadowed.dest_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.control_shadowed.dest_sel

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.control_shadowed.operation

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.control_shadowed.operation

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.control_shadowed.operation

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.key_version.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.key_version.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.key_version.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.max_creator_key_ver_shadowed.val

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.max_creator_key_ver_shadowed.val

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.max_creator_key_ver_shadowed.val

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.max_owner_int_key_ver_shadowed.val

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.max_owner_int_key_ver_shadowed.val

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.max_owner_int_key_ver_shadowed.val

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.max_owner_key_ver_shadowed.val

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.max_owner_key_ver_shadowed.val

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.max_owner_key_ver_shadowed.val

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.reseed_interval_shadowed.val

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.reseed_interval_shadowed.val

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.reseed_interval_shadowed.val

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.salt_0.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_0.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_0.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.salt_1.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_1.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_1.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.salt_2.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_2.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_2.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.salt_3.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_3.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_3.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.salt_4.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_4.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_4.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.salt_5.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_5.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_5.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.salt_6.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_6.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_6.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.salt_7.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_7.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.salt_7.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_0.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_0.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_0.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_1.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_1.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_1.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_2.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_2.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_2.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_3.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_3.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_3.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_4.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_4.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_4.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_5.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_5.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_5.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_6.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_6.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_6.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_7.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_7.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.sealing_sw_binding_7.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.sideload_clear.val

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.sideload_clear.val

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.sideload_clear.val

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_reg_block.start.en

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_reg_block.start.en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	0	2	100.00

Variables for Group Instance lockable_field_cov_of_keymgr_reg_block.start.en

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	0	2	100.00	100	1	1	2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

681

1

T105

13

T130

1

T110

34

auto[1]

769

1

T105

12

T130

1

T126

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

560

1

T105

13

T130

2

T110

35

auto[1]

781

1

T105

12

T126

1

T110

15

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

736

1

T105

14

T130

1

T110

37

auto[1]

575

1

T105

11

T130

1

T126

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

752

1

T105

10

T130

1

T110

36

auto[1]

597

1

T105

15

T130

1

T126

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

555

1

T105

12

T130

2

T110

37

auto[1]

759

1

T105

13

T126

1

T110

13

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

519

1

T105

12

T130

2

T110

36

auto[1]

894

1

T105

13

T126

1

T110

14

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

688

1

T105

10

T130

2

T110

38

auto[1]

699

1

T105

15

T126

1

T110

12

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

638

1

T105

12

T130

2

T110

35

auto[1]

685

1

T105

13

T126

1

T110

15

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

780

1

T13

14

T77

8

T227

27

auto[1]

779

1

T13

1

T109

5

T105

4

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

793

1

T13

14

T77

8

T227

27

auto[1]

890

1

T13

1

T109

8

T105

5

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

806

1

T13

14

T77

8

T227

27

auto[1]

1057

1

T13

1

T109

9

T105

6

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

260

1

T13

6

T77

1

T227

10

auto[1]

1326

1

T13

1

T105

25

T130

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

513

1

T105

4

T130

1

T110

8

auto[1]

609

1

T109

12

T130

1

T106

4

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

432

1

T105

2

T130

1

T126

1

auto[1]

715

1

T109

6

T105

5

T130

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

422

1

T105

1

T110

3

T128

64

auto[1]

635

1

T109

11

T105

2

T130

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

466

1

T105

3

T110

6

T131

1

auto[1]

605

1

T109

5

T105

2

T130

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

257

1

T13

7

T77

2

T227

10

auto[1]

1300

1

T105

25

T130

2

T126

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

258

1

T13

2

T77

1

T227

10

auto[1]

1338

1

T105

25

T130

2

T126

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

281

1

T13

2

T77

7

T227

8

auto[1]

1339

1

T105

25

T130

2

T126

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

267

1

T13

7

T77

1

T227

10

auto[1]

1352

1

T13

1

T105

25

T130

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

248

1

T13

3

T77

1

T227

9

auto[1]

1418

1

T13

1

T105

25

T130

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

262

1

T13

3

T77

1

T227

18

auto[1]

1313

1

T13

1

T105

25

T130

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

281

1

T13

6

T77

3

T227

8

auto[1]

1388

1

T105

25

T130

2

T126

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

270

1

T13

4

T227

11

T381

2

auto[1]

1331

1

T105

25

T130

2

T126

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

641

1

T105

13

T130

2

T110

39

auto[1]

734

1

T105

12

T126

1

T110

11

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

631

1

T105

14

T130

2

T110

36

auto[1]

691

1

T105

11

T126

1

T110

14

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

618

1

T105

12

T130

2

T110

35

auto[1]

804

1

T105

13

T126

1

T110

15

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

724

1

T105

11

T130

2

T110

34

auto[1]

663

1

T105

14

T126

1

T110

16

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

617

1

T105

12

T130

2

T110

35

auto[1]

704

1

T105

13

T126

1

T110

15

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

627

1

T105

14

T130

2

T110

34

auto[1]

736

1

T105

11

T126

1

T110

16

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

612

1

T105

11

T130

1

T110

36

auto[1]

713

1

T105

14

T130

1

T126

1

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

807

1

T105

14

T130

2

T110

36

auto[1]

484

1

T105

11

T126

1

T110

14

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

247

1

T13

6

T77

1

T227

7

auto[1]

1272

1

T13

1

T105

24

T130

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_regwen

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

252

1

T13

4

T77

1

T227

8

auto[1]

24

1

T13

2

T77

1

T268

2