Module Definition
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Module : keymgr_csr_assert_fpv
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.keymgr_csr_assert 100.00 100.00


Module Instance : tb.dut.keymgr_csr_assert

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
97.87 96.15 97.31 99.96 95.92 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children

Since this is the module's only instance, the coverage report is the same as for the module.
Assert Coverage for Module : keymgr_csr_assert_fpv
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 32 32 100.00 32 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 32 32 100.00 32 100.00



Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
TlulOOBAddrErr_A 28849226 16751 0 0
attest_sw_binding_0_rd_A 28849226 1384 0 0
attest_sw_binding_1_rd_A 28849226 1271 0 0
attest_sw_binding_2_rd_A 28849226 1336 0 0
attest_sw_binding_3_rd_A 28849226 1432 0 0
attest_sw_binding_4_rd_A 28849226 1240 0 0
attest_sw_binding_5_rd_A 28849226 1438 0 0
attest_sw_binding_6_rd_A 28849226 1291 0 0
attest_sw_binding_7_rd_A 28849226 1443 0 0
intr_enable_rd_A 28849226 1898 0 0
key_version_rd_A 28849226 1281 0 0
max_creator_key_ver_regwen_rd_A 28849226 1442 0 0
max_owner_int_key_ver_regwen_rd_A 28849226 1338 0 0
max_owner_key_ver_regwen_rd_A 28849226 1357 0 0
reseed_interval_regwen_rd_A 28849226 1354 0 0
salt_0_rd_A 28849226 1350 0 0
salt_1_rd_A 28849226 1371 0 0
salt_2_rd_A 28849226 1403 0 0
salt_3_rd_A 28849226 1407 0 0
salt_4_rd_A 28849226 1316 0 0
salt_5_rd_A 28849226 1198 0 0
salt_6_rd_A 28849226 1311 0 0
salt_7_rd_A 28849226 1334 0 0
sealing_sw_binding_0_rd_A 28849226 1339 0 0
sealing_sw_binding_1_rd_A 28849226 1424 0 0
sealing_sw_binding_2_rd_A 28849226 1362 0 0
sealing_sw_binding_3_rd_A 28849226 1348 0 0
sealing_sw_binding_4_rd_A 28849226 1367 0 0
sealing_sw_binding_5_rd_A 28849226 1386 0 0
sealing_sw_binding_6_rd_A 28849226 1348 0 0
sealing_sw_binding_7_rd_A 28849226 1395 0 0
sideload_clear_rd_A 28849226 1258 0 0


TlulOOBAddrErr_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 16751 0 0
T28 4106 0 0 0
T34 11303 148 0 0
T35 8259 0 0 0
T36 24881 0 0 0
T81 2081 0 0 0
T82 220494 0 0 0
T83 244984 0 0 0
T84 4632 0 0 0
T93 1234 0 0 0
T95 15551 166 0 0
T96 0 145 0 0
T108 0 512 0 0
T113 0 135 0 0
T114 0 36 0 0
T116 0 212 0 0
T117 0 517 0 0
T118 0 226 0 0
T119 0 250 0 0

attest_sw_binding_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1384 0 0
T107 0 72 0 0
T108 12763 0 0 0
T109 0 61 0 0
T114 7980 33 0 0
T115 4654 0 0 0
T116 0 12 0 0
T166 0 29 0 0
T167 0 25 0 0
T168 0 238 0 0
T169 0 24 0 0
T170 0 20 0 0
T171 0 7 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

attest_sw_binding_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1271 0 0
T107 0 63 0 0
T108 12763 0 0 0
T109 0 42 0 0
T114 7980 26 0 0
T115 4654 0 0 0
T116 0 14 0 0
T132 0 5 0 0
T166 0 26 0 0
T167 0 16 0 0
T168 0 247 0 0
T169 0 34 0 0
T170 0 19 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

attest_sw_binding_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1336 0 0
T107 0 56 0 0
T108 12763 0 0 0
T109 0 60 0 0
T114 7980 23 0 0
T115 4654 0 0 0
T116 0 3 0 0
T132 0 9 0 0
T166 0 19 0 0
T167 0 28 0 0
T168 0 226 0 0
T169 0 24 0 0
T170 0 24 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

attest_sw_binding_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1432 0 0
T107 0 64 0 0
T108 12763 0 0 0
T109 0 63 0 0
T114 7980 19 0 0
T115 4654 0 0 0
T116 0 10 0 0
T132 0 5 0 0
T166 0 25 0 0
T167 0 22 0 0
T168 0 270 0 0
T169 0 37 0 0
T170 0 15 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

attest_sw_binding_4_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1240 0 0
T107 0 65 0 0
T108 12763 0 0 0
T109 0 36 0 0
T114 7980 14 0 0
T115 4654 0 0 0
T116 0 2 0 0
T132 0 4 0 0
T166 0 30 0 0
T167 0 18 0 0
T168 0 262 0 0
T169 0 35 0 0
T170 0 27 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

attest_sw_binding_5_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1438 0 0
T107 0 72 0 0
T108 12763 0 0 0
T109 0 44 0 0
T114 7980 24 0 0
T115 4654 0 0 0
T116 0 17 0 0
T132 0 7 0 0
T166 0 30 0 0
T167 0 37 0 0
T168 0 259 0 0
T169 0 37 0 0
T170 0 11 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

attest_sw_binding_6_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1291 0 0
T107 0 41 0 0
T108 12763 0 0 0
T109 0 55 0 0
T114 7980 35 0 0
T115 4654 0 0 0
T116 0 17 0 0
T132 0 3 0 0
T166 0 21 0 0
T167 0 38 0 0
T168 0 215 0 0
T169 0 22 0 0
T170 0 21 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

attest_sw_binding_7_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1443 0 0
T107 0 66 0 0
T108 12763 0 0 0
T109 0 44 0 0
T114 7980 19 0 0
T115 4654 0 0 0
T116 0 6 0 0
T132 0 6 0 0
T166 0 34 0 0
T167 0 32 0 0
T168 0 251 0 0
T169 0 40 0 0
T170 0 20 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

intr_enable_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1898 0 0
T5 181568 0 0 0
T29 12031 0 0 0
T41 171459 18 0 0
T95 15551 0 0 0
T98 7272 0 0 0
T99 237300 0 0 0
T100 154744 0 0 0
T101 1102 0 0 0
T107 0 56 0 0
T109 0 47 0 0
T114 0 28 0 0
T116 0 8 0 0
T132 0 5 0 0
T166 0 33 0 0
T179 0 16 0 0
T180 0 10 0 0
T181 0 17 0 0
T182 22297 0 0 0
T183 20701 0 0 0

key_version_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1281 0 0
T107 0 64 0 0
T108 12763 0 0 0
T109 0 52 0 0
T114 7980 23 0 0
T115 4654 0 0 0
T116 0 11 0 0
T166 0 39 0 0
T167 0 27 0 0
T168 0 200 0 0
T169 0 40 0 0
T170 0 25 0 0
T171 0 5 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

max_creator_key_ver_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1442 0 0
T107 0 68 0 0
T108 12763 0 0 0
T109 0 37 0 0
T114 7980 25 0 0
T115 4654 0 0 0
T116 0 7 0 0
T132 0 3 0 0
T166 0 15 0 0
T167 0 24 0 0
T168 0 238 0 0
T169 0 49 0 0
T170 0 18 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

max_owner_int_key_ver_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1338 0 0
T107 0 57 0 0
T108 12763 0 0 0
T109 0 69 0 0
T114 7980 27 0 0
T115 4654 0 0 0
T132 0 2 0 0
T166 0 25 0 0
T167 0 25 0 0
T168 0 263 0 0
T169 0 24 0 0
T170 0 18 0 0
T171 0 2 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

max_owner_key_ver_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1357 0 0
T107 0 84 0 0
T108 12763 0 0 0
T109 0 55 0 0
T114 7980 32 0 0
T115 4654 0 0 0
T116 0 2 0 0
T132 0 5 0 0
T166 0 30 0 0
T167 0 29 0 0
T168 0 276 0 0
T169 0 38 0 0
T170 0 19 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

reseed_interval_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1354 0 0
T107 0 60 0 0
T108 12763 0 0 0
T109 0 48 0 0
T114 7980 15 0 0
T115 4654 0 0 0
T132 0 2 0 0
T166 0 28 0 0
T167 0 48 0 0
T168 0 289 0 0
T169 0 22 0 0
T170 0 29 0 0
T171 0 1 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

salt_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1350 0 0
T107 0 57 0 0
T108 12763 0 0 0
T109 0 36 0 0
T114 7980 17 0 0
T115 4654 0 0 0
T165 0 52 0 0
T166 0 35 0 0
T167 0 26 0 0
T168 0 266 0 0
T169 0 21 0 0
T170 0 22 0 0
T171 0 1 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

salt_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1371 0 0
T107 0 65 0 0
T108 12763 0 0 0
T109 0 45 0 0
T114 7980 25 0 0
T115 4654 0 0 0
T116 0 17 0 0
T132 0 2 0 0
T166 0 29 0 0
T167 0 25 0 0
T168 0 260 0 0
T169 0 32 0 0
T170 0 23 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

salt_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1403 0 0
T107 0 60 0 0
T108 12763 0 0 0
T109 0 46 0 0
T114 7980 24 0 0
T115 4654 0 0 0
T116 0 26 0 0
T132 0 1 0 0
T166 0 29 0 0
T167 0 22 0 0
T168 0 263 0 0
T169 0 52 0 0
T170 0 20 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

salt_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1407 0 0
T107 0 65 0 0
T108 12763 0 0 0
T109 0 42 0 0
T114 7980 13 0 0
T115 4654 0 0 0
T116 0 16 0 0
T166 0 34 0 0
T167 0 30 0 0
T168 0 275 0 0
T169 0 37 0 0
T170 0 10 0 0
T171 0 6 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

salt_4_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1316 0 0
T107 0 59 0 0
T108 12763 0 0 0
T109 0 43 0 0
T114 7980 36 0 0
T115 4654 0 0 0
T116 0 5 0 0
T166 0 34 0 0
T167 0 25 0 0
T168 0 211 0 0
T169 0 22 0 0
T170 0 10 0 0
T171 0 1 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

salt_5_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1198 0 0
T52 40654 2 0 0
T53 15729 0 0 0
T107 0 55 0 0
T109 0 21 0 0
T113 10382 0 0 0
T114 7980 13 0 0
T116 0 5 0 0
T132 0 8 0 0
T166 0 11 0 0
T167 0 28 0 0
T168 0 202 0 0
T169 0 32 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T184 14498 0 0 0
T185 20131 0 0 0
T186 11105 0 0 0
T187 17896 0 0 0

salt_6_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1311 0 0
T107 0 50 0 0
T108 12763 0 0 0
T109 0 68 0 0
T114 7980 26 0 0
T115 4654 0 0 0
T116 0 9 0 0
T132 0 4 0 0
T166 0 27 0 0
T167 0 41 0 0
T168 0 259 0 0
T169 0 42 0 0
T170 0 19 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

salt_7_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1334 0 0
T107 0 48 0 0
T108 12763 0 0 0
T109 0 48 0 0
T114 7980 23 0 0
T115 4654 0 0 0
T116 0 11 0 0
T132 0 1 0 0
T166 0 24 0 0
T167 0 32 0 0
T168 0 241 0 0
T169 0 25 0 0
T170 0 14 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

sealing_sw_binding_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1339 0 0
T107 0 80 0 0
T108 12763 0 0 0
T109 0 42 0 0
T114 7980 12 0 0
T115 4654 0 0 0
T116 0 5 0 0
T132 0 1 0 0
T166 0 33 0 0
T167 0 40 0 0
T168 0 255 0 0
T169 0 20 0 0
T170 0 20 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

sealing_sw_binding_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1424 0 0
T107 0 60 0 0
T108 12763 0 0 0
T109 0 28 0 0
T114 7980 24 0 0
T115 4654 0 0 0
T116 0 3 0 0
T132 0 1 0 0
T166 0 30 0 0
T167 0 25 0 0
T168 0 295 0 0
T169 0 27 0 0
T170 0 26 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

sealing_sw_binding_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1362 0 0
T107 0 55 0 0
T108 12763 0 0 0
T109 0 61 0 0
T114 7980 25 0 0
T115 4654 0 0 0
T116 0 11 0 0
T132 0 1 0 0
T166 0 14 0 0
T167 0 36 0 0
T168 0 182 0 0
T169 0 39 0 0
T170 0 12 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

sealing_sw_binding_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1348 0 0
T107 0 60 0 0
T108 12763 0 0 0
T109 0 46 0 0
T114 7980 26 0 0
T115 4654 0 0 0
T116 0 9 0 0
T132 0 2 0 0
T166 0 28 0 0
T167 0 41 0 0
T168 0 241 0 0
T169 0 44 0 0
T170 0 28 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

sealing_sw_binding_4_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1367 0 0
T107 0 60 0 0
T108 12763 0 0 0
T109 0 55 0 0
T114 7980 26 0 0
T115 4654 0 0 0
T116 0 4 0 0
T132 0 7 0 0
T166 0 28 0 0
T167 0 31 0 0
T168 0 247 0 0
T169 0 39 0 0
T170 0 22 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

sealing_sw_binding_5_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1386 0 0
T107 0 87 0 0
T108 12763 0 0 0
T109 0 48 0 0
T114 7980 20 0 0
T115 4654 0 0 0
T116 0 15 0 0
T132 0 1 0 0
T166 0 21 0 0
T167 0 27 0 0
T168 0 247 0 0
T169 0 26 0 0
T170 0 17 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

sealing_sw_binding_6_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1348 0 0
T107 0 75 0 0
T108 12763 0 0 0
T109 0 48 0 0
T114 7980 23 0 0
T115 4654 0 0 0
T132 0 9 0 0
T166 0 26 0 0
T167 0 20 0 0
T168 0 264 0 0
T169 0 36 0 0
T170 0 9 0 0
T171 0 3 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

sealing_sw_binding_7_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1395 0 0
T107 0 69 0 0
T108 12763 0 0 0
T109 0 44 0 0
T114 7980 24 0 0
T115 4654 0 0 0
T132 0 9 0 0
T165 0 57 0 0
T166 0 23 0 0
T167 0 28 0 0
T168 0 237 0 0
T169 0 31 0 0
T170 0 25 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

sideload_clear_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 28849226 1258 0 0
T107 0 61 0 0
T108 12763 0 0 0
T109 0 46 0 0
T114 7980 37 0 0
T115 4654 0 0 0
T116 0 2 0 0
T132 0 6 0 0
T166 0 37 0 0
T167 0 47 0 0
T168 0 190 0 0
T169 0 24 0 0
T170 0 15 0 0
T172 10546 0 0 0
T173 2735 0 0 0
T174 7111 0 0 0
T175 3270 0 0 0
T176 15955 0 0 0
T177 7589 0 0 0
T178 11109 0 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%