Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4332

1

T14

28

T79

16

T28

6

auto[1]

2047

1

T4

6

T14

14

T16

6

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	192	1			T36	2		T48	2		T138	2
auto[134217728:268435455]	194	1			T104	4		T137	2		T184	2
auto[268435456:402653183]	176	1			T14	2		T68	2		T29	2
auto[402653184:536870911]	216	1			T14	2		T79	2		T29	2
auto[536870912:671088639]	200	1			T68	2		T29	2		T137	2
auto[671088640:805306367]	188	1			T14	2		T29	4		T102	2
auto[805306368:939524095]	218	1			T14	2		T79	2		T68	2
auto[939524096:1073741823]	223	1			T68	2		T32	2		T24	2
auto[1073741824:1207959551]	265	1			T14	2		T16	2		T58	2
auto[1207959552:1342177279]	204	1			T79	2		T64	2		T43	2
auto[1342177280:1476395007]	228	1			T4	4		T14	2		T184	2
auto[1476395008:1610612735]	202	1			T4	2		T102	2		T48	4
auto[1610612736:1744830463]	178	1			T14	2		T104	4		T101	2
auto[1744830464:1879048191]	186	1			T14	2		T79	2		T184	2
auto[1879048192:2013265919]	184	1			T14	4		T16	2		T79	2
auto[2013265920:2147483647]	202	1			T14	2		T104	2		T48	2
auto[2147483648:2281701375]	198	1			T14	4		T29	2		T19	2
auto[2281701376:2415919103]	184	1			T29	2		T48	2		T281	2
auto[2415919104:2550136831]	206	1			T29	2		T32	2		T137	2
auto[2550136832:2684354559]	180	1			T68	2		T19	2		T103	2
auto[2684354560:2818572287]	194	1			T79	2		T104	2		T68	2
auto[2818572288:2952790015]	177	1			T48	2		T182	2		T183	2
auto[2952790016:3087007743]	210	1			T14	2		T79	2		T102	2
auto[3087007744:3221225471]	182	1			T14	2		T28	2		T29	2
auto[3221225472:3355443199]	222	1			T14	6		T29	4		T138	2
auto[3355443200:3489660927]	204	1			T36	2		T104	2		T137	2
auto[3489660928:3623878655]	202	1			T14	2		T18	2		T28	4
auto[3623878656:3758096383]	222	1			T14	2		T79	2		T51	2
auto[3758096384:3892314111]	176	1			T29	2		T184	2		T183	2
auto[3892314112:4026531839]	178	1			T14	2		T18	2		T29	2
auto[4026531840:4160749567]	186	1			T16	2		T68	2		T29	2
auto[4160749568:4294967295]	202	1			T28	2		T29	2		T137	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	136	1			T48	2		T138	2		T189	2
auto[0:134217727]	auto[1]	56	1			T36	2		T78	2		T56	2
auto[134217728:268435455]	auto[0]	144	1			T104	4		T137	2		T184	2
auto[134217728:268435455]	auto[1]	50	1			T281	2		T56	2		T409	2
auto[268435456:402653183]	auto[0]	114	1			T14	2		T68	2		T29	2
auto[268435456:402653183]	auto[1]	62	1			T25	2		T89	2		T69	2
auto[402653184:536870911]	auto[0]	144	1			T14	2		T79	2		T64	2
auto[402653184:536870911]	auto[1]	72	1			T29	2		T7	2		T276	2
auto[536870912:671088639]	auto[0]	134	1			T68	2		T137	2		T48	2
auto[536870912:671088639]	auto[1]	66	1			T29	2		T48	2		T189	2
auto[671088640:805306367]	auto[0]	118	1			T14	2		T29	4		T43	2
auto[671088640:805306367]	auto[1]	70	1			T102	2		T25	2		T52	2
auto[805306368:939524095]	auto[0]	148	1			T79	2		T68	2		T29	2
auto[805306368:939524095]	auto[1]	70	1			T14	2		T48	2		T26	2
auto[939524096:1073741823]	auto[0]	151	1			T68	2		T48	4		T65	2
auto[939524096:1073741823]	auto[1]	72	1			T32	2		T24	2		T379	2
auto[1073741824:1207959551]	auto[0]	169	1			T29	2		T48	2		T64	2
auto[1073741824:1207959551]	auto[1]	96	1			T14	2		T16	2		T58	2
auto[1207959552:1342177279]	auto[0]	138	1			T79	2		T64	2		T43	2
auto[1207959552:1342177279]	auto[1]	66	1			T65	2		T223	2		T56	2
auto[1342177280:1476395007]	auto[0]	158	1			T14	2		T184	2		T64	2
auto[1342177280:1476395007]	auto[1]	70	1			T4	4		T65	4		T8	2
auto[1476395008:1610612735]	auto[0]	126	1			T102	2		T48	2		T25	2
auto[1476395008:1610612735]	auto[1]	76	1			T4	2		T48	2		T34	2
auto[1610612736:1744830463]	auto[0]	126	1			T14	2		T104	4		T51	2
auto[1610612736:1744830463]	auto[1]	52	1			T101	2		T29	2		T32	2
auto[1744830464:1879048191]	auto[0]	126	1			T14	2		T79	2		T184	2
auto[1744830464:1879048191]	auto[1]	60	1			T206	2		T44	2		T45	2
auto[1879048192:2013265919]	auto[0]	120	1			T14	2		T79	2		T48	2
auto[1879048192:2013265919]	auto[1]	64	1			T14	2		T16	2		T277	2
auto[2013265920:2147483647]	auto[0]	138	1			T104	2		T48	2		T64	2
auto[2013265920:2147483647]	auto[1]	64	1			T14	2		T20	2		T139	2
auto[2147483648:2281701375]	auto[0]	142	1			T14	4		T29	2		T48	4
auto[2147483648:2281701375]	auto[1]	56	1			T19	2		T56	2		T33	2
auto[2281701376:2415919103]	auto[0]	124	1			T29	2		T48	2		T138	2
auto[2281701376:2415919103]	auto[1]	60	1			T281	2		T249	2		T56	2
auto[2415919104:2550136831]	auto[0]	144	1			T137	2		T19	2		T25	2
auto[2415919104:2550136831]	auto[1]	62	1			T29	2		T32	2		T259	2
auto[2550136832:2684354559]	auto[0]	118	1			T68	2		T189	2		T56	2
auto[2550136832:2684354559]	auto[1]	62	1			T19	2		T103	2		T65	4
auto[2684354560:2818572287]	auto[0]	134	1			T79	2		T68	2		T20	2
auto[2684354560:2818572287]	auto[1]	60	1			T104	2		T51	2		T138	2
auto[2818572288:2952790015]	auto[0]	120	1			T182	2		T223	2		T224	2
auto[2818572288:2952790015]	auto[1]	57	1			T48	2		T183	2		T381	2
auto[2952790016:3087007743]	auto[0]	146	1			T79	2		T25	2		T89	4
auto[2952790016:3087007743]	auto[1]	64	1			T14	2		T102	2		T281	2
auto[3087007744:3221225471]	auto[0]	126	1			T14	2		T29	2		T51	2
auto[3087007744:3221225471]	auto[1]	56	1			T28	2		T40	2		T398	2
auto[3221225472:3355443199]	auto[0]	148	1			T14	4		T29	2		T138	2
auto[3221225472:3355443199]	auto[1]	74	1			T14	2		T29	2		T183	2
auto[3355443200:3489660927]	auto[0]	150	1			T104	2		T137	2		T48	2
auto[3355443200:3489660927]	auto[1]	54	1			T36	2		T234	2		T269	2
auto[3489660928:3623878655]	auto[0]	136	1			T14	2		T28	4		T25	2
auto[3489660928:3623878655]	auto[1]	66	1			T18	2		T224	2		T208	2
auto[3623878656:3758096383]	auto[0]	156	1			T79	2		T51	2		T64	2
auto[3623878656:3758096383]	auto[1]	66	1			T14	2		T102	2		T78	2
auto[3758096384:3892314111]	auto[0]	112	1			T29	2		T184	2		T7	4
auto[3758096384:3892314111]	auto[1]	64	1			T183	2		T139	2		T34	2
auto[3892314112:4026531839]	auto[0]	126	1			T14	2		T48	2		T189	2
auto[3892314112:4026531839]	auto[1]	52	1			T18	2		T29	2		T48	2
auto[4026531840:4160749567]	auto[0]	126	1			T68	2		T102	2		T24	2
auto[4026531840:4160749567]	auto[1]	60	1			T16	2		T29	2		T78	2
auto[4160749568:4294967295]	auto[0]	134	1			T28	2		T29	2		T137	2
auto[4160749568:4294967295]	auto[1]	68	1			T76	2		T65	2		T61	2