Unified Coverage Report :: Group :: dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg

Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
50.00	48.21	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_lockable_field_cov.sv

28 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
lockable_field_cov_of_keymgr_dpe_reg_block.start.en	0.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.dest_sel	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.operation	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.slot_dst_sel	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.slot_src_sel	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.key_version.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.max_key_ver_shadowed.val	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.reseed_interval_shadowed.val	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.salt_0.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.salt_1.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.salt_2.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.salt_3.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.salt_4.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.salt_5.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.salt_6.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.salt_7.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.sideload_clear.val	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.allow_child	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.exportable	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.retain_parent	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_0.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_1.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_2.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_3.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_4.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_5.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_6.val_0	50.00	1	100	1	64	64
lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_7.val_0	50.00	1	100	1	64	64

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.start.en

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
0.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.start.en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	2	0	0.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.start.en

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	2	0	0.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.dest_sel

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.dest_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.dest_sel

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.operation

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.operation

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.operation

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.slot_dst_sel

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.slot_dst_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.slot_dst_sel

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.slot_src_sel

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.slot_src_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.control_shadowed.slot_src_sel

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.key_version.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.key_version.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.key_version.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.max_key_ver_shadowed.val

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.max_key_ver_shadowed.val

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.max_key_ver_shadowed.val

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.reseed_interval_shadowed.val

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.reseed_interval_shadowed.val

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.reseed_interval_shadowed.val

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.salt_0.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_0.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_0.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.salt_1.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_1.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_1.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.salt_2.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_2.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_2.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.salt_3.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_3.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_3.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.salt_4.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_4.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_4.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.salt_5.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_5.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_5.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.salt_6.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_6.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_6.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.salt_7.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_7.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.salt_7.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.sideload_clear.val

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sideload_clear.val

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sideload_clear.val

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.allow_child

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.allow_child

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.allow_child

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.exportable

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.exportable

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.exportable

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.retain_parent

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.retain_parent

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.slot_policy.retain_parent

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_0.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_0.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_0.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_1.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_1.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_1.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_2.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_2.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_2.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_3.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_3.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_3.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_4.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_4.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_4.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_5.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_5.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_5.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_6.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_6.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_6.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

---

Group Instance : lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_7.val_0

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
50.00	1	100	1	64	64

---

Summary for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_7.val_0

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	2	1	1	50.00

Variables for Group Instance lockable_field_cov_of_keymgr_dpe_reg_block.sw_binding_7.val_0

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_regwen	2	1	1	50.00	100	1	1	2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1113

1

T48

13

T39

40

T40

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1296

1

T48

9

T39

56

T40

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1027

1

T48

8

T39

28

T40

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1124

1

T48

11

T39

36

T40

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1501

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1366

1

T48

9

T39

64

T40

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1429

1

T48

10

T39

64

T40

2

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1439

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1503

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1440

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1482

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1483

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1453

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1474

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1467

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1382

1

T39

64

T40

2

T24

9

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

971

1

T39

64

T40

2

T24

5

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1019

1

T39

62

T40

2

T24

5

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1057

1

T39

60

T40

1

T24

4

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1541

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1450

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1464

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1427

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1499

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1482

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1484

1

T39

64

T40

2

T24

10

Summary for Variable cp_regwen

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for cp_regwen

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1511

1

T39

64

T40

2

T24

10