interrupt_cp | min_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
328 |
1 |
|
|
T40 |
9 |
|
T131 |
1 |
|
T134 |
13 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
209 |
1 |
|
|
T26 |
1 |
|
T138 |
1 |
|
T201 |
1 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
1660 |
1 |
|
|
T4 |
47 |
|
T7 |
2 |
|
T12 |
1 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
178 |
1 |
|
|
T173 |
1 |
|
T141 |
1 |
|
T178 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
206 |
1 |
|
|
T126 |
11 |
|
T18 |
6 |
|
T220 |
12 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
185 |
1 |
|
|
T3 |
12 |
|
T11 |
1 |
|
T14 |
3 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
232 |
1 |
|
|
T35 |
3 |
|
T167 |
14 |
|
T224 |
15 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
192 |
1 |
|
|
T8 |
12 |
|
T133 |
1 |
|
T139 |
7 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
165 |
1 |
|
|
T1 |
2 |
|
T9 |
1 |
|
T127 |
10 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
241 |
1 |
|
|
T138 |
1 |
|
T40 |
15 |
|
T132 |
10 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
161 |
1 |
|
|
T26 |
1 |
|
T102 |
1 |
|
T40 |
11 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
114 |
1 |
|
|
T11 |
1 |
|
T39 |
10 |
|
T76 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
235 |
1 |
|
|
T138 |
1 |
|
T135 |
7 |
|
T132 |
8 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
176 |
1 |
|
|
T13 |
3 |
|
T128 |
1 |
|
T139 |
9 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
233 |
1 |
|
|
T6 |
3 |
|
T130 |
13 |
|
T129 |
13 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
207 |
1 |
|
|
T3 |
11 |
|
T127 |
11 |
|
T15 |
13 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
251 |
1 |
|
|
T101 |
1 |
|
T70 |
1 |
|
T35 |
1 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
299 |
1 |
|
|
T3 |
8 |
|
T9 |
1 |
|
T125 |
11 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
25 |
1 |
|
|
T11 |
1 |
|
T232 |
1 |
|
T289 |
13 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
55 |
1 |
|
|
T71 |
1 |
|
T290 |
1 |
|
T236 |
1 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17036 |
1 |
|
|
T1 |
31 |
|
T2 |
207 |
|
T5 |
115 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
16 |
1 |
|
|
T314 |
1 |
|
T250 |
15 |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
278 |
1 |
|
|
T131 |
11 |
|
T137 |
14 |
|
T149 |
12 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
210 |
1 |
|
|
T26 |
14 |
|
T138 |
3 |
|
T201 |
9 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
1063 |
1 |
|
|
T7 |
17 |
|
T210 |
12 |
|
T131 |
4 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
160 |
1 |
|
|
T141 |
12 |
|
T27 |
10 |
|
T153 |
25 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
160 |
1 |
|
|
T126 |
4 |
|
T18 |
1 |
|
T220 |
3 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
146 |
1 |
|
|
T14 |
5 |
|
T141 |
6 |
|
T214 |
16 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
199 |
1 |
|
|
T35 |
3 |
|
T167 |
12 |
|
T222 |
13 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
168 |
1 |
|
|
T8 |
4 |
|
T73 |
2 |
|
T204 |
13 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
147 |
1 |
|
|
T1 |
1 |
|
T127 |
11 |
|
T135 |
13 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
158 |
1 |
|
|
T138 |
13 |
|
T132 |
7 |
|
T35 |
1 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
86 |
1 |
|
|
T26 |
2 |
|
T102 |
2 |
|
T127 |
10 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
99 |
1 |
|
|
T212 |
13 |
|
T142 |
5 |
|
T236 |
7 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
212 |
1 |
|
|
T138 |
7 |
|
T135 |
4 |
|
T132 |
11 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
191 |
1 |
|
|
T13 |
4 |
|
T139 |
7 |
|
T140 |
2 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
158 |
1 |
|
|
T129 |
18 |
|
T149 |
5 |
|
T36 |
6 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
211 |
1 |
|
|
T127 |
9 |
|
T15 |
10 |
|
T207 |
13 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
168 |
1 |
|
|
T16 |
5 |
|
T209 |
15 |
|
T137 |
8 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
261 |
1 |
|
|
T125 |
13 |
|
T132 |
6 |
|
T126 |
17 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
24 |
1 |
|
|
T232 |
4 |
|
T289 |
18 |
|
T291 |
1 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
78 |
1 |
|
|
T236 |
14 |
|
T315 |
2 |
|
T29 |
9 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
141 |
1 |
|
|
T1 |
3 |
|
T6 |
2 |
|
T32 |
4 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
9 |
1 |
|
|
T314 |
9 |
|
- |
- |
|
- |
- |
interrupt_cp | max_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
18 |
1 |
|
|
T137 |
2 |
|
T155 |
15 |
|
T165 |
1 |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
12 |
1 |
|
|
T237 |
1 |
|
T267 |
11 |
|
- |
- |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
16 |
1 |
|
|
T137 |
15 |
|
T313 |
1 |
|
- |
- |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
8 |
1 |
|
|
T293 |
7 |
|
T240 |
1 |
|
- |
- |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
269 |
1 |
|
|
T40 |
9 |
|
T131 |
1 |
|
T134 |
13 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
153 |
1 |
|
|
T26 |
1 |
|
T201 |
1 |
|
T131 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
1618 |
1 |
|
|
T4 |
47 |
|
T7 |
2 |
|
T12 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
208 |
1 |
|
|
T138 |
1 |
|
T130 |
7 |
|
T173 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
212 |
1 |
|
|
T126 |
11 |
|
T128 |
1 |
|
T137 |
12 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
199 |
1 |
|
|
T3 |
12 |
|
T11 |
1 |
|
T14 |
3 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
287 |
1 |
|
|
T167 |
14 |
|
T224 |
15 |
|
T222 |
11 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
158 |
1 |
|
|
T73 |
4 |
|
T233 |
1 |
|
T202 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
158 |
1 |
|
|
T9 |
1 |
|
T130 |
6 |
|
T35 |
3 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
257 |
1 |
|
|
T8 |
12 |
|
T138 |
1 |
|
T40 |
15 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
180 |
1 |
|
|
T1 |
2 |
|
T26 |
1 |
|
T102 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
144 |
1 |
|
|
T11 |
1 |
|
T13 |
3 |
|
T39 |
10 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
191 |
1 |
|
|
T138 |
1 |
|
T40 |
11 |
|
T135 |
7 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
126 |
1 |
|
|
T128 |
1 |
|
T139 |
9 |
|
T74 |
1 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
229 |
1 |
|
|
T132 |
8 |
|
T133 |
1 |
|
T129 |
13 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
222 |
1 |
|
|
T3 |
11 |
|
T127 |
11 |
|
T15 |
13 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
318 |
1 |
|
|
T6 |
3 |
|
T11 |
1 |
|
T101 |
1 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
385 |
1 |
|
|
T3 |
8 |
|
T9 |
1 |
|
T125 |
11 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17036 |
1 |
|
|
T1 |
31 |
|
T2 |
207 |
|
T5 |
115 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
19 |
1 |
|
|
T137 |
8 |
|
T155 |
11 |
|
- |
- |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
23 |
1 |
|
|
T237 |
11 |
|
T267 |
12 |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
14 |
1 |
|
|
T137 |
14 |
|
- |
- |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
6 |
1 |
|
|
T293 |
6 |
|
- |
- |
|
- |
- |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
235 |
1 |
|
|
T131 |
11 |
|
T144 |
3 |
|
T223 |
14 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
186 |
1 |
|
|
T26 |
14 |
|
T201 |
9 |
|
T125 |
14 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
1049 |
1 |
|
|
T7 |
17 |
|
T210 |
12 |
|
T131 |
4 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
154 |
1 |
|
|
T138 |
3 |
|
T141 |
12 |
|
T27 |
10 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
176 |
1 |
|
|
T126 |
4 |
|
T137 |
10 |
|
T18 |
1 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
182 |
1 |
|
|
T14 |
5 |
|
T141 |
6 |
|
T214 |
16 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
191 |
1 |
|
|
T167 |
12 |
|
T222 |
13 |
|
T248 |
9 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
125 |
1 |
|
|
T73 |
2 |
|
T18 |
1 |
|
T258 |
2 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
153 |
1 |
|
|
T35 |
3 |
|
T178 |
6 |
|
T241 |
1 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
170 |
1 |
|
|
T8 |
4 |
|
T138 |
13 |
|
T132 |
7 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
123 |
1 |
|
|
T1 |
1 |
|
T26 |
2 |
|
T102 |
2 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
129 |
1 |
|
|
T13 |
4 |
|
T35 |
1 |
|
T212 |
13 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
166 |
1 |
|
|
T138 |
7 |
|
T135 |
4 |
|
T139 |
1 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
94 |
1 |
|
|
T139 |
7 |
|
T140 |
2 |
|
T213 |
2 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
160 |
1 |
|
|
T132 |
11 |
|
T129 |
18 |
|
T149 |
5 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
250 |
1 |
|
|
T127 |
9 |
|
T15 |
10 |
|
T207 |
13 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
209 |
1 |
|
|
T16 |
5 |
|
T209 |
15 |
|
T36 |
4 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
372 |
1 |
|
|
T125 |
13 |
|
T132 |
6 |
|
T126 |
17 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
141 |
1 |
|
|
T1 |
3 |
|
T6 |
2 |
|
T32 |
4 |
wakeup_cp | min_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
330 |
1 |
|
|
T40 |
1 |
|
T131 |
12 |
|
T134 |
1 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
265 |
1 |
|
|
T26 |
15 |
|
T138 |
4 |
|
T201 |
10 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
1381 |
1 |
|
|
T4 |
3 |
|
T7 |
19 |
|
T12 |
1 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
198 |
1 |
|
|
T173 |
1 |
|
T141 |
13 |
|
T178 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
204 |
1 |
|
|
T126 |
5 |
|
T18 |
5 |
|
T220 |
4 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
188 |
1 |
|
|
T3 |
1 |
|
T11 |
1 |
|
T14 |
6 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
237 |
1 |
|
|
T35 |
5 |
|
T167 |
13 |
|
T224 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
201 |
1 |
|
|
T8 |
5 |
|
T133 |
1 |
|
T139 |
1 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
180 |
1 |
|
|
T1 |
2 |
|
T9 |
1 |
|
T127 |
12 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
191 |
1 |
|
|
T138 |
14 |
|
T40 |
1 |
|
T132 |
8 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
117 |
1 |
|
|
T26 |
3 |
|
T102 |
3 |
|
T40 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
123 |
1 |
|
|
T11 |
1 |
|
T39 |
1 |
|
T76 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
252 |
1 |
|
|
T138 |
8 |
|
T135 |
5 |
|
T132 |
12 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
221 |
1 |
|
|
T13 |
5 |
|
T128 |
1 |
|
T139 |
8 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
201 |
1 |
|
|
T6 |
3 |
|
T130 |
1 |
|
T129 |
19 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
261 |
1 |
|
|
T3 |
1 |
|
T127 |
10 |
|
T15 |
17 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
214 |
1 |
|
|
T101 |
1 |
|
T70 |
1 |
|
T35 |
1 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
334 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T125 |
14 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
31 |
1 |
|
|
T11 |
1 |
|
T232 |
5 |
|
T289 |
19 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
92 |
1 |
|
|
T71 |
1 |
|
T290 |
1 |
|
T236 |
15 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17177 |
1 |
|
|
T1 |
34 |
|
T2 |
207 |
|
T5 |
115 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
11 |
1 |
|
|
T314 |
10 |
|
T250 |
1 |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
276 |
1 |
|
|
T40 |
8 |
|
T134 |
12 |
|
T137 |
14 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
154 |
1 |
|
|
T130 |
6 |
|
T125 |
9 |
|
T186 |
2 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
1342 |
1 |
|
|
T4 |
44 |
|
T25 |
29 |
|
T38 |
27 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
140 |
1 |
|
|
T246 |
14 |
|
T85 |
9 |
|
T153 |
21 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
162 |
1 |
|
|
T126 |
10 |
|
T18 |
2 |
|
T220 |
11 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
143 |
1 |
|
|
T3 |
11 |
|
T14 |
2 |
|
T225 |
8 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
194 |
1 |
|
|
T35 |
1 |
|
T167 |
13 |
|
T224 |
14 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
159 |
1 |
|
|
T8 |
11 |
|
T139 |
6 |
|
T73 |
3 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
132 |
1 |
|
|
T1 |
1 |
|
T127 |
9 |
|
T130 |
5 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
208 |
1 |
|
|
T40 |
14 |
|
T132 |
9 |
|
T226 |
8 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
130 |
1 |
|
|
T40 |
10 |
|
T127 |
13 |
|
T125 |
4 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
90 |
1 |
|
|
T39 |
9 |
|
T212 |
17 |
|
T174 |
2 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
195 |
1 |
|
|
T135 |
6 |
|
T132 |
7 |
|
T35 |
10 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
146 |
1 |
|
|
T13 |
2 |
|
T139 |
8 |
|
T140 |
2 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
190 |
1 |
|
|
T130 |
12 |
|
T129 |
12 |
|
T36 |
7 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
157 |
1 |
|
|
T3 |
10 |
|
T127 |
10 |
|
T15 |
6 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
205 |
1 |
|
|
T16 |
5 |
|
T209 |
12 |
|
T137 |
1 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
226 |
1 |
|
|
T3 |
7 |
|
T125 |
10 |
|
T132 |
6 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
18 |
1 |
|
|
T289 |
12 |
|
T292 |
6 |
|
- |
- |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
41 |
1 |
|
|
T29 |
9 |
|
T267 |
10 |
|
T156 |
10 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
14 |
1 |
|
|
T250 |
14 |
|
- |
- |
|
- |
- |
wakeup_cp | max_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
22 |
1 |
|
|
T137 |
9 |
|
T155 |
12 |
|
T165 |
1 |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
25 |
1 |
|
|
T237 |
12 |
|
T267 |
13 |
|
- |
- |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
16 |
1 |
|
|
T137 |
15 |
|
T313 |
1 |
|
- |
- |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
8 |
1 |
|
|
T293 |
7 |
|
T240 |
1 |
|
- |
- |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
275 |
1 |
|
|
T40 |
1 |
|
T131 |
12 |
|
T134 |
1 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
224 |
1 |
|
|
T26 |
15 |
|
T201 |
10 |
|
T131 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
1371 |
1 |
|
|
T4 |
3 |
|
T7 |
19 |
|
T12 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
201 |
1 |
|
|
T138 |
4 |
|
T130 |
1 |
|
T173 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
216 |
1 |
|
|
T126 |
5 |
|
T128 |
1 |
|
T137 |
11 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
225 |
1 |
|
|
T3 |
1 |
|
T11 |
1 |
|
T14 |
6 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
230 |
1 |
|
|
T167 |
13 |
|
T224 |
1 |
|
T222 |
14 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
153 |
1 |
|
|
T73 |
3 |
|
T233 |
1 |
|
T202 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
188 |
1 |
|
|
T9 |
1 |
|
T130 |
1 |
|
T35 |
5 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
207 |
1 |
|
|
T8 |
5 |
|
T138 |
14 |
|
T40 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
159 |
1 |
|
|
T1 |
2 |
|
T26 |
3 |
|
T102 |
3 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
158 |
1 |
|
|
T11 |
1 |
|
T13 |
5 |
|
T39 |
1 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
202 |
1 |
|
|
T138 |
8 |
|
T40 |
1 |
|
T135 |
5 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
119 |
1 |
|
|
T128 |
1 |
|
T139 |
8 |
|
T74 |
1 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
191 |
1 |
|
|
T132 |
12 |
|
T133 |
1 |
|
T129 |
19 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
299 |
1 |
|
|
T3 |
1 |
|
T127 |
10 |
|
T15 |
17 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
277 |
1 |
|
|
T6 |
3 |
|
T11 |
1 |
|
T101 |
1 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
466 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T125 |
14 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17177 |
1 |
|
|
T1 |
34 |
|
T2 |
207 |
|
T5 |
115 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
15 |
1 |
|
|
T137 |
1 |
|
T155 |
14 |
|
- |
- |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
10 |
1 |
|
|
T267 |
10 |
|
- |
- |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
14 |
1 |
|
|
T137 |
14 |
|
- |
- |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
6 |
1 |
|
|
T293 |
6 |
|
- |
- |
|
- |
- |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
229 |
1 |
|
|
T40 |
8 |
|
T134 |
12 |
|
T205 |
26 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
115 |
1 |
|
|
T125 |
9 |
|
T186 |
2 |
|
T258 |
9 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
1296 |
1 |
|
|
T4 |
44 |
|
T25 |
29 |
|
T38 |
27 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
161 |
1 |
|
|
T130 |
6 |
|
T246 |
14 |
|
T288 |
5 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
172 |
1 |
|
|
T126 |
10 |
|
T137 |
11 |
|
T225 |
10 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
156 |
1 |
|
|
T3 |
11 |
|
T14 |
2 |
|
T225 |
8 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
248 |
1 |
|
|
T167 |
13 |
|
T224 |
14 |
|
T222 |
10 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
130 |
1 |
|
|
T73 |
3 |
|
T18 |
5 |
|
T258 |
4 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
123 |
1 |
|
|
T130 |
5 |
|
T35 |
1 |
|
T178 |
6 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
220 |
1 |
|
|
T8 |
11 |
|
T40 |
14 |
|
T132 |
9 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
144 |
1 |
|
|
T1 |
1 |
|
T127 |
22 |
|
T135 |
1 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
115 |
1 |
|
|
T13 |
2 |
|
T39 |
9 |
|
T212 |
17 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
155 |
1 |
|
|
T40 |
10 |
|
T135 |
6 |
|
T35 |
10 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
101 |
1 |
|
|
T139 |
8 |
|
T140 |
2 |
|
T288 |
10 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
198 |
1 |
|
|
T132 |
7 |
|
T129 |
12 |
|
T36 |
7 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
173 |
1 |
|
|
T3 |
10 |
|
T127 |
10 |
|
T15 |
6 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
250 |
1 |
|
|
T130 |
12 |
|
T16 |
5 |
|
T209 |
12 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
291 |
1 |
|
|
T3 |
7 |
|
T125 |
10 |
|
T132 |
6 |