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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.71 99.07 96.67 100.00 100.00 98.83 98.33 91.07


Total test records in report: 920
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T283 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_clock_gating.1053879036 Aug 23 04:49:30 AM UTC 24 Aug 23 04:51:01 AM UTC 24 162030269460 ps
T147 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all.3636758211 Aug 23 04:47:10 AM UTC 24 Aug 23 04:51:30 AM UTC 24 512885994888 ps
T307 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_both.498068976 Aug 23 04:44:47 AM UTC 24 Aug 23 04:51:34 AM UTC 24 365337225171 ps
T444 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_poweron_counter.718781442 Aug 23 04:51:35 AM UTC 24 Aug 23 04:51:40 AM UTC 24 4665533885 ps
T445 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_lowpower_counter.1308391700 Aug 23 04:50:02 AM UTC 24 Aug 23 04:51:46 AM UTC 24 45528659238 ps
T446 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled.1801700478 Aug 23 04:34:47 AM UTC 24 Aug 23 04:51:56 AM UTC 24 492835008238 ps
T198 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.133991344 Aug 23 04:47:19 AM UTC 24 Aug 23 04:52:03 AM UTC 24 498245875609 ps
T25 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all_with_rand_reset.952765387 Aug 23 04:51:57 AM UTC 24 Aug 23 04:52:06 AM UTC 24 12570681462 ps
T86 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_alert_test.3789012241 Aug 23 04:52:07 AM UTC 24 Aug 23 04:52:09 AM UTC 24 279997297 ps
T87 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_smoke.4195706926 Aug 23 04:52:10 AM UTC 24 Aug 23 04:52:25 AM UTC 24 5680451088 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.623631506 Aug 23 04:49:31 AM UTC 24 Aug 23 04:52:26 AM UTC 24 329490255013 ps
T89 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_lowpower_counter.333643191 Aug 23 04:51:40 AM UTC 24 Aug 23 04:52:43 AM UTC 24 26877320363 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup.2798301723 Aug 23 04:41:18 AM UTC 24 Aug 23 04:52:45 AM UTC 24 351626230548 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.1560749665 Aug 23 04:51:31 AM UTC 24 Aug 23 04:52:59 AM UTC 24 161301200803 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.3478358025 Aug 23 04:50:24 AM UTC 24 Aug 23 04:53:25 AM UTC 24 513150244257 ps
T93 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.3638452811 Aug 23 04:52:04 AM UTC 24 Aug 23 04:53:42 AM UTC 24 173606188491 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_fsm_reset.321299740 Aug 23 04:44:58 AM UTC 24 Aug 23 04:53:54 AM UTC 24 125804067773 ps
T447 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.453955195 Aug 23 04:47:00 AM UTC 24 Aug 23 04:53:57 AM UTC 24 119538392532 ps
T302 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.3654047298 Aug 23 04:52:44 AM UTC 24 Aug 23 04:53:58 AM UTC 24 173940938925 ps
T448 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_poweron_counter.2116876488 Aug 23 04:53:58 AM UTC 24 Aug 23 04:54:02 AM UTC 24 4015583303 ps
T286 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled.700529329 Aug 23 04:43:13 AM UTC 24 Aug 23 04:54:03 AM UTC 24 326152041608 ps
T26 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all_with_rand_reset.1355511445 Aug 23 04:54:05 AM UTC 24 Aug 23 04:54:12 AM UTC 24 1165023799 ps
T449 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_lowpower_counter.786847791 Aug 23 04:53:59 AM UTC 24 Aug 23 04:54:33 AM UTC 24 39444330610 ps
T450 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_alert_test.1067104003 Aug 23 04:54:34 AM UTC 24 Aug 23 04:54:36 AM UTC 24 473488799 ps
T451 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_smoke.1717982357 Aug 23 04:54:37 AM UTC 24 Aug 23 04:54:40 AM UTC 24 5985701003 ps
T452 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.1760121737 Aug 23 04:50:43 AM UTC 24 Aug 23 04:54:47 AM UTC 24 207302475661 ps
T246 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_clock_gating.3058192455 Aug 23 04:46:06 AM UTC 24 Aug 23 04:55:42 AM UTC 24 508353687268 ps
T453 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt_fixed.2582412465 Aug 23 04:50:21 AM UTC 24 Aug 23 04:55:43 AM UTC 24 158264700420 ps
T454 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.259401688 Aug 23 04:52:45 AM UTC 24 Aug 23 04:55:43 AM UTC 24 327247472732 ps
T305 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_interrupt.3687931303 Aug 23 04:37:57 AM UTC 24 Aug 23 04:55:46 AM UTC 24 489946740916 ps
T455 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.2450793944 Aug 23 04:50:04 AM UTC 24 Aug 23 04:55:46 AM UTC 24 103553886442 ps
T342 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled.2272184233 Aug 23 04:37:51 AM UTC 24 Aug 23 04:56:04 AM UTC 24 493270818026 ps
T456 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.3386384060 Aug 23 04:50:13 AM UTC 24 Aug 23 04:56:14 AM UTC 24 327810422266 ps
T457 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled_fixed.1312879978 Aug 23 04:47:23 AM UTC 24 Aug 23 04:56:21 AM UTC 24 494765903518 ps
T458 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.2794159510 Aug 23 04:54:48 AM UTC 24 Aug 23 04:56:23 AM UTC 24 166677044890 ps
T459 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.769937080 Aug 23 04:56:14 AM UTC 24 Aug 23 04:56:25 AM UTC 24 4808278480 ps
T460 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_wakeup_fixed.152673549 Aug 23 04:32:00 AM UTC 24 Aug 23 04:56:26 AM UTC 24 629543059645 ps
T461 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.2309080108 Aug 23 04:56:26 AM UTC 24 Aug 23 04:56:34 AM UTC 24 5050280818 ps
T462 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.4219148358 Aug 23 04:56:36 AM UTC 24 Aug 23 04:56:37 AM UTC 24 347508510 ps
T463 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.2708483437 Aug 23 04:56:39 AM UTC 24 Aug 23 04:56:48 AM UTC 24 5727091055 ps
T258 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_clock_gating.1378970134 Aug 23 04:51:02 AM UTC 24 Aug 23 04:56:56 AM UTC 24 502501738614 ps
T464 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled.1510762029 Aug 23 04:45:11 AM UTC 24 Aug 23 04:57:02 AM UTC 24 327730113649 ps
T148 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.3642778114 Aug 23 04:56:05 AM UTC 24 Aug 23 04:57:25 AM UTC 24 538823870611 ps
T465 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_stress_all.4110537932 Aug 23 04:45:01 AM UTC 24 Aug 23 04:57:28 AM UTC 24 327860989566 ps
T54 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_stress_all.601008323 Aug 23 04:40:16 AM UTC 24 Aug 23 04:57:37 AM UTC 24 218827407233 ps
T466 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.1006177133 Aug 23 04:56:22 AM UTC 24 Aug 23 04:57:40 AM UTC 24 37822703364 ps
T467 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.2946046756 Aug 23 04:52:27 AM UTC 24 Aug 23 04:58:09 AM UTC 24 162485945463 ps
T468 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.644660053 Aug 23 04:56:49 AM UTC 24 Aug 23 04:58:12 AM UTC 24 162167224828 ps
T469 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.3602960368 Aug 23 04:58:12 AM UTC 24 Aug 23 04:58:18 AM UTC 24 3274448875 ps
T252 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup.2448623938 Aug 23 04:53:00 AM UTC 24 Aug 23 04:58:28 AM UTC 24 550902864783 ps
T470 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.2925088636 Aug 23 04:58:19 AM UTC 24 Aug 23 04:58:29 AM UTC 24 22634072187 ps
T471 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.224598711 Aug 23 04:53:26 AM UTC 24 Aug 23 04:58:30 AM UTC 24 400486557184 ps
T472 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.721955765 Aug 23 04:55:47 AM UTC 24 Aug 23 04:58:34 AM UTC 24 386145726254 ps
T473 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.2077327230 Aug 23 04:58:35 AM UTC 24 Aug 23 04:58:37 AM UTC 24 379374475 ps
T318 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.2582982841 Aug 23 04:45:47 AM UTC 24 Aug 23 04:58:44 AM UTC 24 373085186986 ps
T474 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.4226842960 Aug 23 04:58:38 AM UTC 24 Aug 23 04:58:46 AM UTC 24 5958896483 ps
T475 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.3426565083 Aug 23 04:59:54 AM UTC 24 Aug 23 04:59:58 AM UTC 24 5687507655 ps
T229 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.1245873561 Aug 23 04:57:41 AM UTC 24 Aug 23 04:58:48 AM UTC 24 413093792370 ps
T27 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.2260500037 Aug 23 04:58:30 AM UTC 24 Aug 23 04:58:58 AM UTC 24 22428704363 ps
T476 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.4033939676 Aug 23 04:54:03 AM UTC 24 Aug 23 04:59:00 AM UTC 24 75403630271 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.1141494102 Aug 23 04:54:13 AM UTC 24 Aug 23 04:59:03 AM UTC 24 504582014295 ps
T477 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.4004334547 Aug 23 04:48:27 AM UTC 24 Aug 23 04:59:15 AM UTC 24 609241698135 ps
T154 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.2995136781 Aug 23 04:57:03 AM UTC 24 Aug 23 04:59:18 AM UTC 24 499159481348 ps
T478 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt_fixed.1184734002 Aug 23 04:48:08 AM UTC 24 Aug 23 04:59:22 AM UTC 24 336584315350 ps
T241 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_both.872713054 Aug 23 04:46:47 AM UTC 24 Aug 23 04:59:25 AM UTC 24 361869749268 ps
T479 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.2825156297 Aug 23 04:59:23 AM UTC 24 Aug 23 04:59:29 AM UTC 24 3277833189 ps
T326 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.1090927928 Aug 23 04:55:44 AM UTC 24 Aug 23 04:59:36 AM UTC 24 360811437702 ps
T480 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.6482795 Aug 23 04:59:25 AM UTC 24 Aug 23 04:59:44 AM UTC 24 37550066943 ps
T289 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.487410000 Aug 23 04:59:37 AM UTC 24 Aug 23 04:59:49 AM UTC 24 117670025306 ps
T481 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.4259769549 Aug 23 04:59:50 AM UTC 24 Aug 23 04:59:53 AM UTC 24 475322637 ps
T482 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.2935367917 Aug 23 04:59:45 AM UTC 24 Aug 23 04:59:58 AM UTC 24 9829471655 ps
T483 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.1911438664 Aug 23 04:58:47 AM UTC 24 Aug 23 05:00:14 AM UTC 24 161139842538 ps
T280 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.215878450 Aug 23 04:53:55 AM UTC 24 Aug 23 05:00:32 AM UTC 24 534484869436 ps
T216 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.126557126 Aug 23 04:51:47 AM UTC 24 Aug 23 05:00:33 AM UTC 24 100066700067 ps
T270 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.3104731498 Aug 23 04:59:00 AM UTC 24 Aug 23 05:00:37 AM UTC 24 169475276750 ps
T484 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled_fixed.76605895 Aug 23 04:50:14 AM UTC 24 Aug 23 05:00:39 AM UTC 24 491653589248 ps
T485 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.2622015939 Aug 23 04:55:43 AM UTC 24 Aug 23 05:00:56 AM UTC 24 159259690834 ps
T486 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.780522953 Aug 23 04:57:37 AM UTC 24 Aug 23 05:00:57 AM UTC 24 404754006432 ps
T487 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.2983061390 Aug 23 05:00:58 AM UTC 24 Aug 23 05:01:01 AM UTC 24 4092916709 ps
T260 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt.1946990020 Aug 23 04:43:17 AM UTC 24 Aug 23 05:01:09 AM UTC 24 483068080707 ps
T488 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.3658846482 Aug 23 05:00:00 AM UTC 24 Aug 23 05:01:35 AM UTC 24 168892375809 ps
T489 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.2493257853 Aug 23 04:58:59 AM UTC 24 Aug 23 05:01:42 AM UTC 24 323782065934 ps
T28 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.1388099677 Aug 23 05:01:35 AM UTC 24 Aug 23 05:01:43 AM UTC 24 2442082523 ps
T490 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.2140741593 Aug 23 05:01:43 AM UTC 24 Aug 23 05:01:46 AM UTC 24 353014228 ps
T243 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.3108085535 Aug 23 05:00:40 AM UTC 24 Aug 23 05:01:50 AM UTC 24 355696498768 ps
T245 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.1124252225 Aug 23 04:59:15 AM UTC 24 Aug 23 05:01:52 AM UTC 24 331616483379 ps
T491 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.316284855 Aug 23 05:01:42 AM UTC 24 Aug 23 05:01:58 AM UTC 24 5879032308 ps
T492 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.4069727308 Aug 23 05:01:46 AM UTC 24 Aug 23 05:02:03 AM UTC 24 5918345204 ps
T493 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.919557304 Aug 23 05:01:02 AM UTC 24 Aug 23 05:02:26 AM UTC 24 39833417231 ps
T494 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt_fixed.839723562 Aug 23 05:02:04 AM UTC 24 Aug 23 05:02:53 AM UTC 24 168869878573 ps
T267 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.3266576242 Aug 23 05:00:15 AM UTC 24 Aug 23 05:03:15 AM UTC 24 324500187307 ps
T187 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.1687449024 Aug 23 04:58:45 AM UTC 24 Aug 23 05:03:23 AM UTC 24 491751777014 ps
T311 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.1156662211 Aug 23 05:01:59 AM UTC 24 Aug 23 05:03:32 AM UTC 24 159566016063 ps
T339 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.2646914286 Aug 23 04:54:41 AM UTC 24 Aug 23 05:03:33 AM UTC 24 496070943372 ps
T495 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.653007397 Aug 23 05:03:32 AM UTC 24 Aug 23 05:03:42 AM UTC 24 3707399265 ps
T496 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.249765383 Aug 23 04:57:26 AM UTC 24 Aug 23 05:03:57 AM UTC 24 167445170550 ps
T353 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.3688479631 Aug 23 04:56:26 AM UTC 24 Aug 23 05:04:05 AM UTC 24 278569029466 ps
T29 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.3405141451 Aug 23 05:03:57 AM UTC 24 Aug 23 05:04:11 AM UTC 24 36286592412 ps
T497 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.2179219050 Aug 23 05:04:11 AM UTC 24 Aug 23 05:04:13 AM UTC 24 493394933 ps
T498 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.4275062619 Aug 23 05:04:13 AM UTC 24 Aug 23 05:04:19 AM UTC 24 5755961546 ps
T499 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.510234106 Aug 23 04:56:23 AM UTC 24 Aug 23 05:04:19 AM UTC 24 94864939605 ps
T500 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.2170519481 Aug 23 04:58:49 AM UTC 24 Aug 23 05:04:26 AM UTC 24 163803979258 ps
T501 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.62807667 Aug 23 05:03:33 AM UTC 24 Aug 23 05:04:38 AM UTC 24 28972665092 ps
T502 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.2773420380 Aug 23 04:58:31 AM UTC 24 Aug 23 05:04:59 AM UTC 24 112403107559 ps
T503 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.913595403 Aug 23 05:04:20 AM UTC 24 Aug 23 05:05:08 AM UTC 24 326753562898 ps
T504 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.1488285753 Aug 23 05:04:05 AM UTC 24 Aug 23 05:05:18 AM UTC 24 174453603987 ps
T505 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.724350717 Aug 23 04:56:57 AM UTC 24 Aug 23 05:05:20 AM UTC 24 492036771836 ps
T173 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.3043757329 Aug 23 05:00:34 AM UTC 24 Aug 23 05:05:39 AM UTC 24 583931818151 ps
T168 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.415788622 Aug 23 05:03:24 AM UTC 24 Aug 23 05:05:41 AM UTC 24 539092826169 ps
T506 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.4119211185 Aug 23 05:05:39 AM UTC 24 Aug 23 05:05:43 AM UTC 24 3085003731 ps
T507 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.492276486 Aug 23 05:05:42 AM UTC 24 Aug 23 05:05:48 AM UTC 24 43875159078 ps
T238 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_clock_gating.3476410647 Aug 23 04:53:42 AM UTC 24 Aug 23 05:06:12 AM UTC 24 405936460482 ps
T508 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.1272124822 Aug 23 05:04:39 AM UTC 24 Aug 23 05:06:13 AM UTC 24 164127541646 ps
T509 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.3418001340 Aug 23 05:06:13 AM UTC 24 Aug 23 05:06:15 AM UTC 24 373716604 ps
T510 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.988160602 Aug 23 05:06:15 AM UTC 24 Aug 23 05:06:31 AM UTC 24 6125289096 ps
T511 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.4077524668 Aug 23 05:05:49 AM UTC 24 Aug 23 05:06:43 AM UTC 24 63232388290 ps
T512 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.3252186069 Aug 23 05:02:54 AM UTC 24 Aug 23 05:07:06 AM UTC 24 413639755085 ps
T218 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.1829420787 Aug 23 04:50:16 AM UTC 24 Aug 23 05:07:11 AM UTC 24 500872983445 ps
T315 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_both.418188372 Aug 23 05:00:56 AM UTC 24 Aug 23 05:07:35 AM UTC 24 323679469030 ps
T513 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.4105898667 Aug 23 05:05:00 AM UTC 24 Aug 23 05:07:40 AM UTC 24 190771943083 ps
T514 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.3868446825 Aug 23 04:45:59 AM UTC 24 Aug 23 05:07:41 AM UTC 24 591832132452 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.3206289178 Aug 23 05:05:19 AM UTC 24 Aug 23 05:08:03 AM UTC 24 322142340734 ps
T515 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.2484758373 Aug 23 05:06:45 AM UTC 24 Aug 23 05:08:06 AM UTC 24 161491859849 ps
T516 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.1623331818 Aug 23 05:08:06 AM UTC 24 Aug 23 05:08:09 AM UTC 24 4600528095 ps
T325 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.2897201773 Aug 23 05:07:08 AM UTC 24 Aug 23 05:08:38 AM UTC 24 167502012524 ps
T517 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.951700046 Aug 23 04:59:30 AM UTC 24 Aug 23 05:08:51 AM UTC 24 114164267766 ps
T199 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.3653134252 Aug 23 05:04:27 AM UTC 24 Aug 23 05:08:52 AM UTC 24 487587088490 ps
T518 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.1484070097 Aug 23 05:08:51 AM UTC 24 Aug 23 05:09:04 AM UTC 24 4717682100 ps
T519 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.4081538978 Aug 23 05:09:04 AM UTC 24 Aug 23 05:09:06 AM UTC 24 450198076 ps
T520 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.4126831145 Aug 23 05:09:07 AM UTC 24 Aug 23 05:09:12 AM UTC 24 5873526680 ps
T521 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.2012850850 Aug 23 05:08:09 AM UTC 24 Aug 23 05:09:24 AM UTC 24 35589169056 ps
T522 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.1213690972 Aug 23 05:03:43 AM UTC 24 Aug 23 05:09:26 AM UTC 24 64566017547 ps
T523 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.2146977193 Aug 23 04:58:28 AM UTC 24 Aug 23 05:09:27 AM UTC 24 121992649323 ps
T524 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.913413066 Aug 23 05:01:09 AM UTC 24 Aug 23 05:09:40 AM UTC 24 98298863013 ps
T329 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.998773912 Aug 23 04:57:29 AM UTC 24 Aug 23 05:09:53 AM UTC 24 362965779409 ps
T525 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.416997904 Aug 23 05:05:09 AM UTC 24 Aug 23 05:10:12 AM UTC 24 590830097564 ps
T526 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.4097594621 Aug 23 05:06:31 AM UTC 24 Aug 23 05:10:19 AM UTC 24 344444260387 ps
T527 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.1244531260 Aug 23 05:09:24 AM UTC 24 Aug 23 05:10:21 AM UTC 24 165023030653 ps
T528 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.1047417944 Aug 23 05:10:22 AM UTC 24 Aug 23 05:10:26 AM UTC 24 3936915205 ps
T529 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled.4264644636 Aug 23 04:52:26 AM UTC 24 Aug 23 05:10:41 AM UTC 24 492730127714 ps
T155 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.4286312769 Aug 23 04:58:10 AM UTC 24 Aug 23 05:11:04 AM UTC 24 345253254244 ps
T530 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.4125664414 Aug 23 05:07:41 AM UTC 24 Aug 23 05:11:11 AM UTC 24 210164707270 ps
T174 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.9131060 Aug 23 05:09:41 AM UTC 24 Aug 23 05:11:11 AM UTC 24 549937687252 ps
T531 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.3394826996 Aug 23 05:11:12 AM UTC 24 Aug 23 05:11:14 AM UTC 24 500548697 ps
T532 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.1638743058 Aug 23 05:11:15 AM UTC 24 Aug 23 05:11:20 AM UTC 24 5759158688 ps
T85 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.2381434503 Aug 23 05:11:05 AM UTC 24 Aug 23 05:11:26 AM UTC 24 163613222357 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.3685971110 Aug 23 05:10:12 AM UTC 24 Aug 23 05:11:26 AM UTC 24 503424774495 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.2010612660 Aug 23 04:59:59 AM UTC 24 Aug 23 05:11:27 AM UTC 24 326176170873 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.1306192504 Aug 23 05:08:04 AM UTC 24 Aug 23 05:11:29 AM UTC 24 172613849088 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.2134007657 Aug 23 05:10:27 AM UTC 24 Aug 23 05:11:40 AM UTC 24 34210961328 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.1832844886 Aug 23 05:09:28 AM UTC 24 Aug 23 05:11:44 AM UTC 24 331258757426 ps
T101 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.2075170941 Aug 23 05:07:12 AM UTC 24 Aug 23 05:12:05 AM UTC 24 160274321243 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.1517427876 Aug 23 05:05:43 AM UTC 24 Aug 23 05:12:11 AM UTC 24 69891074553 ps
T103 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.1506933069 Aug 23 05:11:27 AM UTC 24 Aug 23 05:12:16 AM UTC 24 342927167603 ps
T104 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.4004488699 Aug 23 05:12:12 AM UTC 24 Aug 23 05:12:18 AM UTC 24 3735701220 ps
T533 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.2984071318 Aug 23 05:12:17 AM UTC 24 Aug 23 05:12:41 AM UTC 24 41700875850 ps
T293 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.3994246004 Aug 23 05:07:42 AM UTC 24 Aug 23 05:12:51 AM UTC 24 328793053476 ps
T156 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.864484203 Aug 23 04:55:47 AM UTC 24 Aug 23 05:12:52 AM UTC 24 523315302659 ps
T534 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.1513397464 Aug 23 05:12:52 AM UTC 24 Aug 23 05:12:54 AM UTC 24 428769588 ps
T310 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.209777956 Aug 23 05:12:42 AM UTC 24 Aug 23 05:12:56 AM UTC 24 17378422718 ps
T535 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.3157558447 Aug 23 04:59:04 AM UTC 24 Aug 23 05:13:09 AM UTC 24 417997914061 ps
T536 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.23425716 Aug 23 05:12:55 AM UTC 24 Aug 23 05:13:11 AM UTC 24 6209427255 ps
T304 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.312043151 Aug 23 05:05:20 AM UTC 24 Aug 23 05:13:20 AM UTC 24 342402605653 ps
T537 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.2995019443 Aug 23 05:12:06 AM UTC 24 Aug 23 05:13:44 AM UTC 24 166413184090 ps
T538 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.1890609358 Aug 23 04:55:43 AM UTC 24 Aug 23 05:13:57 AM UTC 24 498009766290 ps
T217 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.819879684 Aug 23 05:08:39 AM UTC 24 Aug 23 05:14:01 AM UTC 24 104896488013 ps
T539 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.2977322412 Aug 23 05:14:02 AM UTC 24 Aug 23 05:14:14 AM UTC 24 165529556504 ps
T157 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.3840592227 Aug 23 05:12:56 AM UTC 24 Aug 23 05:14:35 AM UTC 24 331340832433 ps
T540 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.3219734498 Aug 23 05:14:36 AM UTC 24 Aug 23 05:14:43 AM UTC 24 4843842830 ps
T541 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.3821005040 Aug 23 05:13:12 AM UTC 24 Aug 23 05:14:55 AM UTC 24 167312618257 ps
T542 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.1711722462 Aug 23 05:14:43 AM UTC 24 Aug 23 05:15:00 AM UTC 24 29534841372 ps
T543 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.954379241 Aug 23 05:09:12 AM UTC 24 Aug 23 05:15:05 AM UTC 24 325735401181 ps
T544 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.2202545964 Aug 23 05:15:00 AM UTC 24 Aug 23 05:15:07 AM UTC 24 20606469629 ps
T545 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.199710301 Aug 23 05:15:07 AM UTC 24 Aug 23 05:15:09 AM UTC 24 301437105 ps
T546 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.2166538888 Aug 23 05:15:10 AM UTC 24 Aug 23 05:15:13 AM UTC 24 6149913062 ps
T214 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.3131489149 Aug 23 05:10:42 AM UTC 24 Aug 23 05:15:22 AM UTC 24 69816645794 ps
T547 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.3354205628 Aug 23 05:09:26 AM UTC 24 Aug 23 05:15:25 AM UTC 24 333335069374 ps
T548 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.3123151412 Aug 23 05:11:27 AM UTC 24 Aug 23 05:15:27 AM UTC 24 159118327348 ps
T549 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.2167243492 Aug 23 05:13:45 AM UTC 24 Aug 23 05:15:42 AM UTC 24 545337587937 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.952651022 Aug 23 05:02:27 AM UTC 24 Aug 23 05:15:54 AM UTC 24 352754740634 ps
T550 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.2946538264 Aug 23 05:13:09 AM UTC 24 Aug 23 05:15:58 AM UTC 24 487969366502 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.2529862892 Aug 23 05:15:05 AM UTC 24 Aug 23 05:16:14 AM UTC 24 355184037330 ps
T356 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.3711438876 Aug 23 05:08:52 AM UTC 24 Aug 23 05:16:17 AM UTC 24 117081322966 ps
T551 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.2171572340 Aug 23 05:13:21 AM UTC 24 Aug 23 05:16:21 AM UTC 24 161330143863 ps
T552 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.3681566404 Aug 23 05:16:17 AM UTC 24 Aug 23 05:16:27 AM UTC 24 3760088557 ps
T303 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.3890937391 Aug 23 04:59:19 AM UTC 24 Aug 23 05:16:57 AM UTC 24 491435636110 ps
T169 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.4101698689 Aug 23 05:11:31 AM UTC 24 Aug 23 05:17:05 AM UTC 24 574348823996 ps
T553 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.2331365968 Aug 23 05:16:58 AM UTC 24 Aug 23 05:17:06 AM UTC 24 10732153480 ps
T554 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.3368353598 Aug 23 05:16:22 AM UTC 24 Aug 23 05:17:09 AM UTC 24 40122065114 ps
T555 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.1260995094 Aug 23 05:17:06 AM UTC 24 Aug 23 05:17:09 AM UTC 24 498250451 ps
T556 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.462161560 Aug 23 05:17:09 AM UTC 24 Aug 23 05:17:17 AM UTC 24 5564300636 ps
T557 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.2758215364 Aug 23 05:12:18 AM UTC 24 Aug 23 05:17:29 AM UTC 24 78070615403 ps
T193 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.2193784551 Aug 23 05:03:15 AM UTC 24 Aug 23 05:17:41 AM UTC 24 376087561989 ps
T558 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.4177937066 Aug 23 05:10:20 AM UTC 24 Aug 23 05:17:44 AM UTC 24 213031161553 ps
T299 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.4030193693 Aug 23 05:01:52 AM UTC 24 Aug 23 05:17:48 AM UTC 24 492260410404 ps
T262 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_both.566223033 Aug 23 05:16:15 AM UTC 24 Aug 23 05:17:57 AM UTC 24 514843921640 ps
T559 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.23910630 Aug 23 05:11:11 AM UTC 24 Aug 23 05:18:07 AM UTC 24 80586616179 ps
T261 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.1050161634 Aug 23 05:11:45 AM UTC 24 Aug 23 05:18:08 AM UTC 24 485036183994 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.3773026670 Aug 23 05:18:09 AM UTC 24 Aug 23 05:18:14 AM UTC 24 3421881250 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.822822266 Aug 23 05:01:53 AM UTC 24 Aug 23 05:18:26 AM UTC 24 493378542116 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.2805203111 Aug 23 05:00:33 AM UTC 24 Aug 23 05:18:30 AM UTC 24 495620588855 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.3858673011 Aug 23 05:18:15 AM UTC 24 Aug 23 05:18:30 AM UTC 24 25859404588 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.2285510446 Aug 23 05:18:31 AM UTC 24 Aug 23 05:18:46 AM UTC 24 2630097067 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.3467605641 Aug 23 05:18:46 AM UTC 24 Aug 23 05:18:48 AM UTC 24 371788474 ps
T290 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.712490798 Aug 23 05:18:08 AM UTC 24 Aug 23 05:18:49 AM UTC 24 200961379263 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.87329494 Aug 23 05:18:49 AM UTC 24 Aug 23 05:18:58 AM UTC 24 5948455106 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.3346999514 Aug 23 05:06:13 AM UTC 24 Aug 23 05:19:15 AM UTC 24 340620599492 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.1221036716 Aug 23 05:11:41 AM UTC 24 Aug 23 05:19:19 AM UTC 24 198658241136 ps
T158 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.837436666 Aug 23 05:15:59 AM UTC 24 Aug 23 05:19:20 AM UTC 24 178106490005 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled_fixed.3031917503 Aug 23 05:18:58 AM UTC 24 Aug 23 05:19:40 AM UTC 24 162844564553 ps
T322 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.3798966841 Aug 23 05:17:58 AM UTC 24 Aug 23 05:19:55 AM UTC 24 337472542426 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.2630018499 Aug 23 05:18:49 AM UTC 24 Aug 23 05:19:55 AM UTC 24 325988482849 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all.3290228991 Aug 23 05:18:31 AM UTC 24 Aug 23 05:20:13 AM UTC 24 170793507993 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.1512887020 Aug 23 05:15:23 AM UTC 24 Aug 23 05:20:27 AM UTC 24 159141037293 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.1011235657 Aug 23 05:20:14 AM UTC 24 Aug 23 05:20:27 AM UTC 24 5114051880 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.3233444752 Aug 23 05:20:28 AM UTC 24 Aug 23 05:20:39 AM UTC 24 32200880678 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.3536393935 Aug 23 05:14:55 AM UTC 24 Aug 23 05:20:49 AM UTC 24 114382961513 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.4108936665 Aug 23 05:20:39 AM UTC 24 Aug 23 05:20:53 AM UTC 24 13913700492 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.827553336 Aug 23 05:20:54 AM UTC 24 Aug 23 05:20:56 AM UTC 24 296868564 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.1781487706 Aug 23 05:11:28 AM UTC 24 Aug 23 05:21:02 AM UTC 24 496765973820 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.1581496307 Aug 23 05:20:56 AM UTC 24 Aug 23 05:21:06 AM UTC 24 6029122364 ps
T300 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.120157099 Aug 23 05:17:30 AM UTC 24 Aug 23 05:21:09 AM UTC 24 494869184162 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.1683784537 Aug 23 05:07:36 AM UTC 24 Aug 23 05:21:45 AM UTC 24 390398300626 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.3857355159 Aug 23 05:00:38 AM UTC 24 Aug 23 05:22:49 AM UTC 24 611055598689 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.1952261740 Aug 23 05:19:21 AM UTC 24 Aug 23 05:23:00 AM UTC 24 165334675976 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.280453829 Aug 23 05:17:42 AM UTC 24 Aug 23 05:23:31 AM UTC 24 324235724601 ps
T263 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.2025191083 Aug 23 05:19:56 AM UTC 24 Aug 23 05:23:31 AM UTC 24 194697877277 ps
T312 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.1966066526 Aug 23 05:14:15 AM UTC 24 Aug 23 05:23:50 AM UTC 24 521659060407 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.137603248 Aug 23 05:23:50 AM UTC 24 Aug 23 05:23:55 AM UTC 24 5238506699 ps
T254 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.3985613726 Aug 23 05:04:20 AM UTC 24 Aug 23 05:24:11 AM UTC 24 501190994946 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.2530247893 Aug 23 05:23:55 AM UTC 24 Aug 23 05:24:15 AM UTC 24 38147268778 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.1525515525 Aug 23 05:24:15 AM UTC 24 Aug 23 05:24:28 AM UTC 24 25361596715 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.2541501856 Aug 23 05:21:06 AM UTC 24 Aug 23 05:24:35 AM UTC 24 341343050199 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.1300083695 Aug 23 05:09:54 AM UTC 24 Aug 23 05:24:37 AM UTC 24 431524852765 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.1619318597 Aug 23 05:24:36 AM UTC 24 Aug 23 05:24:37 AM UTC 24 546509143 ps
T268 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.2385725054 Aug 23 05:17:45 AM UTC 24 Aug 23 05:24:39 AM UTC 24 181069248834 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.4292958209 Aug 23 05:24:38 AM UTC 24 Aug 23 05:24:46 AM UTC 24 5776561005 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled.146240765 Aug 23 05:21:02 AM UTC 24 Aug 23 05:24:54 AM UTC 24 492352173788 ps
T206 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.4180494713 Aug 23 05:16:27 AM UTC 24 Aug 23 05:24:59 AM UTC 24 114076652673 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_both.353786522 Aug 23 05:23:31 AM UTC 24 Aug 23 05:25:01 AM UTC 24 163993474139 ps
T593 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.907324953 Aug 23 05:19:21 AM UTC 24 Aug 23 05:25:47 AM UTC 24 355435488203 ps
T292 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.3017186793 Aug 23 05:19:15 AM UTC 24 Aug 23 05:25:51 AM UTC 24 167674086578 ps
T354 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all.2366093285 Aug 23 05:17:06 AM UTC 24 Aug 23 05:26:18 AM UTC 24 597635860430 ps
T331 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled.558185093 Aug 23 05:24:38 AM UTC 24 Aug 23 05:26:25 AM UTC 24 327809496449 ps
T594 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.3018509579 Aug 23 05:26:19 AM UTC 24 Aug 23 05:26:29 AM UTC 24 4206687167 ps
T269 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.3035159405 Aug 23 05:23:31 AM UTC 24 Aug 23 05:26:47 AM UTC 24 191235343130 ps
T595 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.1944817287 Aug 23 05:24:29 AM UTC 24 Aug 23 05:26:47 AM UTC 24 335251695568 ps
T309 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.705380444 Aug 23 05:21:10 AM UTC 24 Aug 23 05:26:54 AM UTC 24 325244471927 ps
T596 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.2306689518 Aug 23 05:26:55 AM UTC 24 Aug 23 05:26:57 AM UTC 24 535148628 ps
T597 /workspaces/repo/scratch/os_regression_2024_08_22/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.3044759658 Aug 23 05:26:25 AM UTC 24 Aug 23 05:26:58 AM UTC 24 31577016814 ps
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