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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.73 99.07 96.67 100.00 100.00 98.83 98.33 91.24


Total test records in report: 920
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T464 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled_fixed.79668189 Aug 27 05:57:11 AM UTC 24 Aug 27 06:01:29 AM UTC 24 330591605632 ps
T465 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_lowpower_counter.2409899202 Aug 27 06:00:32 AM UTC 24 Aug 27 06:01:31 AM UTC 24 36268753588 ps
T367 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.1912719839 Aug 27 06:00:57 AM UTC 24 Aug 27 06:01:33 AM UTC 24 163647211459 ps
T466 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.1102900556 Aug 27 05:59:34 AM UTC 24 Aug 27 06:01:38 AM UTC 24 169020979416 ps
T467 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.3859996323 Aug 27 06:01:30 AM UTC 24 Aug 27 06:01:38 AM UTC 24 5383163505 ps
T153 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_clock_gating.14841027 Aug 27 05:57:34 AM UTC 24 Aug 27 06:01:39 AM UTC 24 634410557208 ps
T468 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.1076741038 Aug 27 06:01:40 AM UTC 24 Aug 27 06:01:43 AM UTC 24 457028499 ps
T277 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_clock_gating.2555555719 Aug 27 05:44:12 AM UTC 24 Aug 27 06:01:46 AM UTC 24 340218391350 ps
T469 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.3888300909 Aug 27 06:01:39 AM UTC 24 Aug 27 06:01:48 AM UTC 24 6999962181 ps
T470 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.1021347274 Aug 27 06:01:44 AM UTC 24 Aug 27 06:01:51 AM UTC 24 6109167628 ps
T308 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup.443889761 Aug 27 05:54:07 AM UTC 24 Aug 27 06:01:52 AM UTC 24 199314941166 ps
T35 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.2357890166 Aug 27 06:01:38 AM UTC 24 Aug 27 06:01:56 AM UTC 24 5352007051 ps
T471 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled.1039762836 Aug 27 05:54:59 AM UTC 24 Aug 27 06:02:12 AM UTC 24 331063032262 ps
T225 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_fsm_reset.2332939975 Aug 27 05:53:23 AM UTC 24 Aug 27 06:02:25 AM UTC 24 91120376450 ps
T472 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_wakeup_fixed.1566498488 Aug 27 05:47:11 AM UTC 24 Aug 27 06:02:29 AM UTC 24 380764791025 ps
T473 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_wakeup_fixed.3442664109 Aug 27 05:49:35 AM UTC 24 Aug 27 06:02:40 AM UTC 24 395252378935 ps
T474 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_interrupt_fixed.2829220229 Aug 27 05:43:41 AM UTC 24 Aug 27 06:02:43 AM UTC 24 329190530436 ps
T475 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.3989618917 Aug 27 05:56:27 AM UTC 24 Aug 27 06:02:45 AM UTC 24 85088289336 ps
T476 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.3918476904 Aug 27 06:02:41 AM UTC 24 Aug 27 06:02:47 AM UTC 24 4039989032 ps
T296 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.2910807847 Aug 27 06:02:48 AM UTC 24 Aug 27 06:03:00 AM UTC 24 2050288825 ps
T258 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.3939323247 Aug 27 06:01:52 AM UTC 24 Aug 27 06:03:06 AM UTC 24 167043735914 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.497605584 Aug 27 05:55:52 AM UTC 24 Aug 27 06:03:08 AM UTC 24 552377185906 ps
T477 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.1235033365 Aug 27 06:03:07 AM UTC 24 Aug 27 06:03:09 AM UTC 24 466435148 ps
T478 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.48018966 Aug 27 06:01:32 AM UTC 24 Aug 27 06:03:12 AM UTC 24 25987805269 ps
T479 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.3961005232 Aug 27 06:03:09 AM UTC 24 Aug 27 06:03:15 AM UTC 24 5683598429 ps
T323 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt.1947546541 Aug 27 05:57:18 AM UTC 24 Aug 27 06:03:26 AM UTC 24 159858489748 ps
T327 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.2765939845 Aug 27 06:00:23 AM UTC 24 Aug 27 06:03:28 AM UTC 24 344251680855 ps
T480 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.1069958886 Aug 27 06:02:44 AM UTC 24 Aug 27 06:03:32 AM UTC 24 29494015890 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.3242448922 Aug 27 05:58:04 AM UTC 24 Aug 27 06:03:32 AM UTC 24 167009766623 ps
T293 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled.1952127049 Aug 27 05:59:25 AM UTC 24 Aug 27 06:03:32 AM UTC 24 329535551000 ps
T481 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.2632553710 Aug 27 06:01:53 AM UTC 24 Aug 27 06:03:35 AM UTC 24 161333598440 ps
T482 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt_fixed.338667822 Aug 27 05:57:20 AM UTC 24 Aug 27 06:03:35 AM UTC 24 492473733811 ps
T483 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.3906117553 Aug 27 06:03:35 AM UTC 24 Aug 27 06:03:48 AM UTC 24 5156952703 ps
T328 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_stress_all.2673992171 Aug 27 05:54:51 AM UTC 24 Aug 27 06:03:53 AM UTC 24 171319266405 ps
T36 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.2359967337 Aug 27 06:03:53 AM UTC 24 Aug 27 06:04:02 AM UTC 24 3234157942 ps
T154 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.2706331948 Aug 27 06:01:28 AM UTC 24 Aug 27 06:04:03 AM UTC 24 364883230507 ps
T484 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.1290644806 Aug 27 06:03:36 AM UTC 24 Aug 27 06:04:03 AM UTC 24 23689286582 ps
T485 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.1299244942 Aug 27 06:04:04 AM UTC 24 Aug 27 06:04:06 AM UTC 24 486266633 ps
T352 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_polled.3200161895 Aug 27 05:46:26 AM UTC 24 Aug 27 06:04:11 AM UTC 24 485958567072 ps
T486 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.2268746399 Aug 27 05:57:51 AM UTC 24 Aug 27 06:04:20 AM UTC 24 69356833067 ps
T487 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.964744077 Aug 27 06:04:04 AM UTC 24 Aug 27 06:04:29 AM UTC 24 5770770245 ps
T254 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all.1790839527 Aug 27 05:53:27 AM UTC 24 Aug 27 06:04:38 AM UTC 24 208370799411 ps
T488 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.228171907 Aug 27 06:03:32 AM UTC 24 Aug 27 06:04:43 AM UTC 24 216434463347 ps
T489 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_wakeup_fixed.4040330753 Aug 27 05:37:32 AM UTC 24 Aug 27 06:04:44 AM UTC 24 609548669624 ps
T347 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_wakeup.3236285027 Aug 27 05:39:44 AM UTC 24 Aug 27 06:04:45 AM UTC 24 535266675466 ps
T490 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.1092048729 Aug 27 06:01:05 AM UTC 24 Aug 27 06:04:49 AM UTC 24 166405906925 ps
T372 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.3836052364 Aug 27 05:58:19 AM UTC 24 Aug 27 06:04:49 AM UTC 24 165914830662 ps
T491 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.1057116030 Aug 27 06:04:49 AM UTC 24 Aug 27 06:04:56 AM UTC 24 3934621156 ps
T317 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.532415849 Aug 27 06:02:26 AM UTC 24 Aug 27 06:05:00 AM UTC 24 176248409873 ps
T380 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.731421290 Aug 27 06:04:21 AM UTC 24 Aug 27 06:05:21 AM UTC 24 165169014333 ps
T492 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.1292056560 Aug 27 06:04:49 AM UTC 24 Aug 27 06:05:23 AM UTC 24 35575040665 ps
T493 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.2474773945 Aug 27 06:05:24 AM UTC 24 Aug 27 06:05:26 AM UTC 24 448713125 ps
T37 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.4123849601 Aug 27 06:05:01 AM UTC 24 Aug 27 06:05:26 AM UTC 24 17421603519 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.4000808832 Aug 27 06:03:29 AM UTC 24 Aug 27 06:05:30 AM UTC 24 379744385969 ps
T494 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.1127077132 Aug 27 06:05:27 AM UTC 24 Aug 27 06:05:41 AM UTC 24 5927042122 ps
T390 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_fsm_reset.1173570004 Aug 27 05:54:39 AM UTC 24 Aug 27 06:05:54 AM UTC 24 113750300098 ps
T495 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.3414612719 Aug 27 05:58:28 AM UTC 24 Aug 27 06:06:10 AM UTC 24 179888737123 ps
T274 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_both.1686000204 Aug 27 05:53:04 AM UTC 24 Aug 27 06:06:12 AM UTC 24 337730250145 ps
T155 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.1441155436 Aug 27 06:01:13 AM UTC 24 Aug 27 06:06:31 AM UTC 24 488779796273 ps
T496 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.1283611277 Aug 27 06:03:00 AM UTC 24 Aug 27 06:06:32 AM UTC 24 206440760417 ps
T497 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_stress_all.537187636 Aug 27 05:57:57 AM UTC 24 Aug 27 06:06:44 AM UTC 24 203553565852 ps
T498 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.4189849676 Aug 27 06:06:45 AM UTC 24 Aug 27 06:06:53 AM UTC 24 3241287976 ps
T53 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.3588673976 Aug 27 06:00:42 AM UTC 24 Aug 27 06:07:03 AM UTC 24 128726698745 ps
T256 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_stress_all.2099670202 Aug 27 05:44:49 AM UTC 24 Aug 27 06:07:11 AM UTC 24 279300381879 ps
T353 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.2352073260 Aug 27 06:07:12 AM UTC 24 Aug 27 06:07:18 AM UTC 24 1234638884 ps
T499 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.4277631756 Aug 27 05:57:28 AM UTC 24 Aug 27 06:07:20 AM UTC 24 392522042085 ps
T302 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_clock_gating.63148028 Aug 27 05:45:30 AM UTC 24 Aug 27 06:07:21 AM UTC 24 499582598930 ps
T500 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.2709755502 Aug 27 06:07:21 AM UTC 24 Aug 27 06:07:23 AM UTC 24 452190873 ps
T316 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.1127944737 Aug 27 06:03:33 AM UTC 24 Aug 27 06:07:26 AM UTC 24 349013019881 ps
T501 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled_fixed.1826567953 Aug 27 05:55:04 AM UTC 24 Aug 27 06:07:43 AM UTC 24 322642805801 ps
T502 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.3143770870 Aug 27 06:07:21 AM UTC 24 Aug 27 06:07:44 AM UTC 24 5670103195 ps
T503 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.668200807 Aug 27 06:06:55 AM UTC 24 Aug 27 06:07:45 AM UTC 24 31466531053 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.1958470080 Aug 27 06:05:42 AM UTC 24 Aug 27 06:08:18 AM UTC 24 165685428980 ps
T504 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.3855552080 Aug 27 06:02:12 AM UTC 24 Aug 27 06:08:23 AM UTC 24 607082986512 ps
T324 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.3192366265 Aug 27 06:04:45 AM UTC 24 Aug 27 06:08:28 AM UTC 24 179911946038 ps
T306 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup.2473312008 Aug 27 05:59:37 AM UTC 24 Aug 27 06:08:28 AM UTC 24 172935594363 ps
T505 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt_fixed.4181962046 Aug 27 06:05:55 AM UTC 24 Aug 27 06:08:48 AM UTC 24 495007063764 ps
T506 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.2103520866 Aug 27 06:08:29 AM UTC 24 Aug 27 06:08:49 AM UTC 24 4097084733 ps
T507 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.3104763775 Aug 27 06:04:03 AM UTC 24 Aug 27 06:08:53 AM UTC 24 219294985234 ps
T355 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.179858749 Aug 27 06:07:45 AM UTC 24 Aug 27 06:08:54 AM UTC 24 356905408671 ps
T220 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.3315835243 Aug 27 06:01:34 AM UTC 24 Aug 27 06:08:56 AM UTC 24 73879802806 ps
T508 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.3312608390 Aug 27 06:08:56 AM UTC 24 Aug 27 06:08:59 AM UTC 24 518310519 ps
T509 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.3268818203 Aug 27 06:09:00 AM UTC 24 Aug 27 06:09:03 AM UTC 24 5841687226 ps
T78 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.3705452379 Aug 27 06:00:35 AM UTC 24 Aug 27 06:09:16 AM UTC 24 95387898629 ps
T38 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.3557602682 Aug 27 06:08:54 AM UTC 24 Aug 27 06:09:22 AM UTC 24 7780712441 ps
T510 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.845906823 Aug 27 06:01:19 AM UTC 24 Aug 27 06:09:30 AM UTC 24 194084585058 ps
T511 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_wakeup_fixed.1711745007 Aug 27 05:41:42 AM UTC 24 Aug 27 06:09:32 AM UTC 24 602041154352 ps
T512 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.1140008607 Aug 27 06:07:24 AM UTC 24 Aug 27 06:09:35 AM UTC 24 165305576957 ps
T319 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all.3438884086 Aug 27 05:56:47 AM UTC 24 Aug 27 06:10:10 AM UTC 24 535231105396 ps
T513 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.1878450324 Aug 27 06:04:12 AM UTC 24 Aug 27 06:10:26 AM UTC 24 164493813945 ps
T514 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.839824732 Aug 27 06:03:49 AM UTC 24 Aug 27 06:10:49 AM UTC 24 72746766953 ps
T267 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.682713432 Aug 27 06:02:29 AM UTC 24 Aug 27 06:10:52 AM UTC 24 351677872742 ps
T515 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.651446414 Aug 27 06:10:50 AM UTC 24 Aug 27 06:11:00 AM UTC 24 3998524384 ps
T516 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.2567885331 Aug 27 06:02:45 AM UTC 24 Aug 27 06:11:01 AM UTC 24 85861753237 ps
T517 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.394744841 Aug 27 05:59:07 AM UTC 24 Aug 27 06:11:03 AM UTC 24 100392368224 ps
T518 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.2489371893 Aug 27 06:08:49 AM UTC 24 Aug 27 06:11:06 AM UTC 24 31950448094 ps
T519 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.3077499114 Aug 27 06:11:07 AM UTC 24 Aug 27 06:11:09 AM UTC 24 514519506 ps
T520 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.1631628058 Aug 27 06:11:01 AM UTC 24 Aug 27 06:11:10 AM UTC 24 1526912530 ps
T521 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.592056229 Aug 27 06:11:10 AM UTC 24 Aug 27 06:11:19 AM UTC 24 5845980708 ps
T259 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_clock_gating.3379648471 Aug 27 05:59:51 AM UTC 24 Aug 27 06:11:34 AM UTC 24 497368885488 ps
T522 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.2393938120 Aug 27 06:05:31 AM UTC 24 Aug 27 06:11:37 AM UTC 24 495603187532 ps
T273 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.929180645 Aug 27 06:08:24 AM UTC 24 Aug 27 06:12:11 AM UTC 24 350402475965 ps
T207 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.861600953 Aug 27 06:05:22 AM UTC 24 Aug 27 06:12:16 AM UTC 24 211168107174 ps
T523 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.438372760 Aug 27 06:10:53 AM UTC 24 Aug 27 06:12:24 AM UTC 24 33639458961 ps
T348 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.4190627061 Aug 27 06:03:33 AM UTC 24 Aug 27 06:12:26 AM UTC 24 182547131773 ps
T524 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.4094690885 Aug 27 06:09:36 AM UTC 24 Aug 27 06:12:49 AM UTC 24 208431062936 ps
T174 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.2719305769 Aug 27 05:57:03 AM UTC 24 Aug 27 06:12:50 AM UTC 24 329715632079 ps
T525 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.1101804021 Aug 27 06:04:30 AM UTC 24 Aug 27 06:12:50 AM UTC 24 165249379237 ps
T292 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_clock_gating.1042059586 Aug 27 05:58:47 AM UTC 24 Aug 27 06:12:51 AM UTC 24 343890105463 ps
T294 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.221072758 Aug 27 06:11:10 AM UTC 24 Aug 27 06:12:52 AM UTC 24 329728374920 ps
T526 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.4066491597 Aug 27 05:59:41 AM UTC 24 Aug 27 06:12:56 AM UTC 24 196400411487 ps
T527 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.2022753117 Aug 27 06:12:50 AM UTC 24 Aug 27 06:12:56 AM UTC 24 3825820854 ps
T371 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.3838621329 Aug 27 06:09:22 AM UTC 24 Aug 27 06:12:57 AM UTC 24 325590139516 ps
T528 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.4015452471 Aug 27 06:12:57 AM UTC 24 Aug 27 06:12:59 AM UTC 24 349741067 ps
T529 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.3637575968 Aug 27 06:08:20 AM UTC 24 Aug 27 06:13:03 AM UTC 24 388693474924 ps
T329 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.3654892895 Aug 27 06:12:12 AM UTC 24 Aug 27 06:13:06 AM UTC 24 192856248652 ps
T297 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.324241762 Aug 27 05:59:15 AM UTC 24 Aug 27 06:13:09 AM UTC 24 328189363653 ps
T530 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled.3078675238 Aug 27 05:52:05 AM UTC 24 Aug 27 06:13:13 AM UTC 24 502690181238 ps
T531 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.2138291720 Aug 27 06:12:50 AM UTC 24 Aug 27 06:13:15 AM UTC 24 22489829260 ps
T167 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.725362013 Aug 27 06:09:04 AM UTC 24 Aug 27 06:13:17 AM UTC 24 332724214612 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.3265048913 Aug 27 06:12:52 AM UTC 24 Aug 27 06:13:20 AM UTC 24 162013035988 ps
T103 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.2924236280 Aug 27 06:12:58 AM UTC 24 Aug 27 06:13:24 AM UTC 24 5627492448 ps
T104 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.3152157909 Aug 27 06:04:56 AM UTC 24 Aug 27 06:13:24 AM UTC 24 118784117562 ps
T105 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.4176506175 Aug 27 06:13:21 AM UTC 24 Aug 27 06:13:26 AM UTC 24 3012684560 ps
T106 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.320010118 Aug 27 06:06:12 AM UTC 24 Aug 27 06:13:29 AM UTC 24 201674637081 ps
T107 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.2782594329 Aug 27 06:07:27 AM UTC 24 Aug 27 06:13:35 AM UTC 24 492579274749 ps
T108 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.308789770 Aug 27 06:13:35 AM UTC 24 Aug 27 06:13:38 AM UTC 24 552502959 ps
T109 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.1391592055 Aug 27 06:09:17 AM UTC 24 Aug 27 06:13:42 AM UTC 24 496168686466 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.3428694353 Aug 27 05:58:49 AM UTC 24 Aug 27 06:13:45 AM UTC 24 545592725474 ps
T111 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.3189707723 Aug 27 06:04:07 AM UTC 24 Aug 27 06:13:56 AM UTC 24 484293532111 ps
T39 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.3780541851 Aug 27 06:13:27 AM UTC 24 Aug 27 06:13:59 AM UTC 24 19054362775 ps
T532 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.3561989204 Aug 27 06:13:38 AM UTC 24 Aug 27 06:14:02 AM UTC 24 5937698980 ps
T208 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.1803631414 Aug 27 05:59:32 AM UTC 24 Aug 27 06:14:07 AM UTC 24 491279745312 ps
T285 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_wakeup.3720602622 Aug 27 05:47:05 AM UTC 24 Aug 27 06:14:09 AM UTC 24 581742233995 ps
T533 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.2820171653 Aug 27 06:07:44 AM UTC 24 Aug 27 06:14:13 AM UTC 24 493898806828 ps
T331 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_stress_all.1918396089 Aug 27 05:42:51 AM UTC 24 Aug 27 06:14:17 AM UTC 24 478892829553 ps
T534 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.4208230487 Aug 27 05:55:58 AM UTC 24 Aug 27 06:14:22 AM UTC 24 619966290126 ps
T535 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.1875171018 Aug 27 06:03:10 AM UTC 24 Aug 27 06:14:23 AM UTC 24 162701971144 ps
T536 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.3750637239 Aug 27 06:14:18 AM UTC 24 Aug 27 06:14:23 AM UTC 24 3991635042 ps
T537 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.2086441793 Aug 27 06:12:52 AM UTC 24 Aug 27 06:14:40 AM UTC 24 37150639766 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.523192825 Aug 27 06:14:24 AM UTC 24 Aug 27 06:14:46 AM UTC 24 5891687787 ps
T538 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.3040575831 Aug 27 06:14:47 AM UTC 24 Aug 27 06:14:51 AM UTC 24 432029013 ps
T539 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.3672874942 Aug 27 06:13:24 AM UTC 24 Aug 27 06:14:51 AM UTC 24 29936122625 ps
T540 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.2159837111 Aug 27 06:09:33 AM UTC 24 Aug 27 06:14:55 AM UTC 24 349465689438 ps
T541 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.2169546142 Aug 27 06:14:23 AM UTC 24 Aug 27 06:14:59 AM UTC 24 33460860173 ps
T366 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.4007133347 Aug 27 06:10:27 AM UTC 24 Aug 27 06:15:09 AM UTC 24 168009835536 ps
T542 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.160538280 Aug 27 06:14:52 AM UTC 24 Aug 27 06:15:20 AM UTC 24 6186892519 ps
T543 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.209671990 Aug 27 06:13:14 AM UTC 24 Aug 27 06:15:22 AM UTC 24 596771732823 ps
T544 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.3710748029 Aug 27 06:11:20 AM UTC 24 Aug 27 06:15:24 AM UTC 24 337203596035 ps
T186 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.3291438857 Aug 27 06:11:35 AM UTC 24 Aug 27 06:15:31 AM UTC 24 330381110182 ps
T545 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.2922357135 Aug 27 06:11:38 AM UTC 24 Aug 27 06:15:33 AM UTC 24 325971299690 ps
T336 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.775666471 Aug 27 06:01:17 AM UTC 24 Aug 27 06:15:34 AM UTC 24 353371347263 ps
T287 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt.556811344 Aug 27 05:54:00 AM UTC 24 Aug 27 06:15:35 AM UTC 24 486724528493 ps
T546 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.453521977 Aug 27 06:07:19 AM UTC 24 Aug 27 06:15:37 AM UTC 24 170376056169 ps
T547 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.290751905 Aug 27 05:58:36 AM UTC 24 Aug 27 06:15:37 AM UTC 24 395862011115 ps
T548 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.1577132437 Aug 27 06:15:34 AM UTC 24 Aug 27 06:15:38 AM UTC 24 3272485648 ps
T549 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.857772911 Aug 27 06:15:39 AM UTC 24 Aug 27 06:15:43 AM UTC 24 383918184 ps
T550 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.654747461 Aug 27 06:13:42 AM UTC 24 Aug 27 06:15:43 AM UTC 24 163811522084 ps
T40 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.1349560923 Aug 27 06:15:38 AM UTC 24 Aug 27 06:15:47 AM UTC 24 6780813998 ps
T382 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.2680328388 Aug 27 06:13:17 AM UTC 24 Aug 27 06:15:54 AM UTC 24 165536332016 ps
T551 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.412272128 Aug 27 06:15:43 AM UTC 24 Aug 27 06:16:10 AM UTC 24 6028183120 ps
T190 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.1068018634 Aug 27 06:12:27 AM UTC 24 Aug 27 06:16:11 AM UTC 24 331487408261 ps
T552 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.2353122948 Aug 27 06:14:00 AM UTC 24 Aug 27 06:16:22 AM UTC 24 329047414653 ps
T175 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.4182235933 Aug 27 06:06:11 AM UTC 24 Aug 27 06:16:39 AM UTC 24 385763168396 ps
T191 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.2399782830 Aug 27 06:13:16 AM UTC 24 Aug 27 06:16:45 AM UTC 24 553957854996 ps
T391 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.507391157 Aug 27 06:07:05 AM UTC 24 Aug 27 06:17:14 AM UTC 24 111728064610 ps
T553 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt_fixed.1755520689 Aug 27 06:15:10 AM UTC 24 Aug 27 06:17:18 AM UTC 24 165736869661 ps
T554 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.1546971953 Aug 27 06:17:15 AM UTC 24 Aug 27 06:17:20 AM UTC 24 3399429331 ps
T555 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.61778151 Aug 27 06:15:23 AM UTC 24 Aug 27 06:17:23 AM UTC 24 195613463654 ps
T351 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.2460980904 Aug 27 06:08:55 AM UTC 24 Aug 27 06:17:29 AM UTC 24 335122712240 ps
T41 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.38746482 Aug 27 06:17:23 AM UTC 24 Aug 27 06:17:34 AM UTC 24 11590733782 ps
T299 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.33099671 Aug 27 06:13:04 AM UTC 24 Aug 27 06:17:37 AM UTC 24 322599291686 ps
T556 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.2480877173 Aug 27 06:17:34 AM UTC 24 Aug 27 06:17:38 AM UTC 24 473636465 ps
T557 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.2744275906 Aug 27 06:17:38 AM UTC 24 Aug 27 06:17:45 AM UTC 24 5710769213 ps
T558 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.2211140686 Aug 27 06:15:35 AM UTC 24 Aug 27 06:17:50 AM UTC 24 36912853957 ps
T295 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.3514173052 Aug 27 06:15:55 AM UTC 24 Aug 27 06:17:58 AM UTC 24 164574496763 ps
T230 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all.1267041402 Aug 27 05:46:18 AM UTC 24 Aug 27 06:18:02 AM UTC 24 4004232089912 ps
T559 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.2107341544 Aug 27 06:01:49 AM UTC 24 Aug 27 06:18:08 AM UTC 24 326052945555 ps
T284 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_both.2621790927 Aug 27 06:15:32 AM UTC 24 Aug 27 06:18:09 AM UTC 24 176487933263 ps
T289 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.1258487819 Aug 27 06:12:24 AM UTC 24 Aug 27 06:18:11 AM UTC 24 164287564180 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.2723231529 Aug 27 06:16:11 AM UTC 24 Aug 27 06:18:43 AM UTC 24 163616542142 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled.1852867656 Aug 27 06:15:44 AM UTC 24 Aug 27 06:18:46 AM UTC 24 167378900923 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.4215775623 Aug 27 06:18:43 AM UTC 24 Aug 27 06:18:47 AM UTC 24 4310654526 ps
T209 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup.2610114314 Aug 27 06:15:21 AM UTC 24 Aug 27 06:18:49 AM UTC 24 356750071739 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.3516818026 Aug 27 06:13:25 AM UTC 24 Aug 27 06:18:51 AM UTC 24 80558047751 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.3979593320 Aug 27 06:17:19 AM UTC 24 Aug 27 06:18:54 AM UTC 24 24119267438 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all.3416655811 Aug 27 06:13:30 AM UTC 24 Aug 27 06:18:56 AM UTC 24 224310502566 ps
T232 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.2494601531 Aug 27 06:12:51 AM UTC 24 Aug 27 06:18:56 AM UTC 24 103869125225 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.2931206496 Aug 27 06:18:55 AM UTC 24 Aug 27 06:18:56 AM UTC 24 530197287 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.1041152363 Aug 27 06:18:57 AM UTC 24 Aug 27 06:19:05 AM UTC 24 5809154064 ps
T368 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.820450510 Aug 27 06:18:12 AM UTC 24 Aug 27 06:19:06 AM UTC 24 163879587633 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled_fixed.1087089367 Aug 27 05:58:13 AM UTC 24 Aug 27 06:19:13 AM UTC 24 500313300629 ps
T176 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled.2883104110 Aug 27 05:53:49 AM UTC 24 Aug 27 06:19:17 AM UTC 24 489809053075 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.4272659173 Aug 27 06:14:40 AM UTC 24 Aug 27 06:19:18 AM UTC 24 328110389657 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.4052219997 Aug 27 06:14:52 AM UTC 24 Aug 27 06:19:19 AM UTC 24 333362206053 ps
T203 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.4051973536 Aug 27 06:15:25 AM UTC 24 Aug 27 06:19:26 AM UTC 24 512242634550 ps
T263 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.1227664430 Aug 27 06:06:32 AM UTC 24 Aug 27 06:19:28 AM UTC 24 330409676325 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.1505272569 Aug 27 06:18:50 AM UTC 24 Aug 27 06:19:32 AM UTC 24 11721540431 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.2485854233 Aug 27 06:19:27 AM UTC 24 Aug 27 06:19:32 AM UTC 24 3762132584 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.1330121722 Aug 27 06:14:56 AM UTC 24 Aug 27 06:19:34 AM UTC 24 159959015940 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_both.3589033980 Aug 27 06:04:46 AM UTC 24 Aug 27 06:19:41 AM UTC 24 338405270514 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.3616460447 Aug 27 06:19:41 AM UTC 24 Aug 27 06:19:44 AM UTC 24 393634808 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.1662755321 Aug 27 06:19:32 AM UTC 24 Aug 27 06:19:45 AM UTC 24 3741169517 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.3577109074 Aug 27 06:19:45 AM UTC 24 Aug 27 06:19:53 AM UTC 24 6192195366 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.3477679286 Aug 27 06:13:00 AM UTC 24 Aug 27 06:20:15 AM UTC 24 326064000719 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.2331384061 Aug 27 06:01:14 AM UTC 24 Aug 27 06:20:16 AM UTC 24 504005084987 ps
T272 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.4239411515 Aug 27 06:04:39 AM UTC 24 Aug 27 06:20:23 AM UTC 24 353302181814 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.4005479048 Aug 27 06:01:47 AM UTC 24 Aug 27 06:20:25 AM UTC 24 485786537215 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.3732246884 Aug 27 06:21:10 AM UTC 24 Aug 27 06:21:20 AM UTC 24 5615414543 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.2968582809 Aug 27 06:14:10 AM UTC 24 Aug 27 06:20:30 AM UTC 24 176295437670 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.4125303433 Aug 27 06:19:06 AM UTC 24 Aug 27 06:20:31 AM UTC 24 169315816285 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.77580377 Aug 27 06:14:14 AM UTC 24 Aug 27 06:20:41 AM UTC 24 512444010780 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.2050840160 Aug 27 06:19:29 AM UTC 24 Aug 27 06:20:42 AM UTC 24 31308133555 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.1928542509 Aug 27 06:18:46 AM UTC 24 Aug 27 06:20:43 AM UTC 24 30463340331 ps
T370 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup.600212826 Aug 27 06:19:14 AM UTC 24 Aug 27 06:20:59 AM UTC 24 190080530136 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.2065928702 Aug 27 06:20:42 AM UTC 24 Aug 27 06:21:00 AM UTC 24 4166641039 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.1334069807 Aug 27 06:04:44 AM UTC 24 Aug 27 06:21:07 AM UTC 24 394950901263 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.177771959 Aug 27 06:20:59 AM UTC 24 Aug 27 06:21:09 AM UTC 24 3781336193 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.3277014477 Aug 27 06:21:08 AM UTC 24 Aug 27 06:21:10 AM UTC 24 574190386 ps
T340 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.1828456978 Aug 27 06:13:57 AM UTC 24 Aug 27 06:21:12 AM UTC 24 325824136221 ps
T350 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.3340027600 Aug 27 06:16:45 AM UTC 24 Aug 27 06:21:29 AM UTC 24 198966159754 ps
T365 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.1082999498 Aug 27 06:06:32 AM UTC 24 Aug 27 06:21:41 AM UTC 24 348387567225 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.1757124926 Aug 27 06:20:43 AM UTC 24 Aug 27 06:21:43 AM UTC 24 31119098446 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup_fixed.3959303436 Aug 27 06:16:23 AM UTC 24 Aug 27 06:21:56 AM UTC 24 413287589748 ps
T303 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.2078620640 Aug 27 06:10:12 AM UTC 24 Aug 27 06:22:16 AM UTC 24 352909128952 ps
T593 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.1383628353 Aug 27 06:13:07 AM UTC 24 Aug 27 06:22:24 AM UTC 24 163896738903 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all.2262666418 Aug 27 06:21:01 AM UTC 24 Aug 27 06:22:26 AM UTC 24 338089861682 ps
T594 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled_fixed.1665183000 Aug 27 06:21:13 AM UTC 24 Aug 27 06:22:34 AM UTC 24 165142627893 ps
T595 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.814667951 Aug 27 06:22:24 AM UTC 24 Aug 27 06:22:41 AM UTC 24 3298109563 ps
T596 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.847194423 Aug 27 06:03:27 AM UTC 24 Aug 27 06:22:51 AM UTC 24 497023905495 ps
T192 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.2834014049 Aug 27 06:18:03 AM UTC 24 Aug 27 06:22:59 AM UTC 24 534312602390 ps
T597 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.2096756325 Aug 27 06:11:00 AM UTC 24 Aug 27 06:23:02 AM UTC 24 125472580572 ps
T598 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.323518921 Aug 27 06:23:00 AM UTC 24 Aug 27 06:23:04 AM UTC 24 487986456 ps
T599 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.1220171938 Aug 27 06:23:03 AM UTC 24 Aug 27 06:23:11 AM UTC 24 6028573105 ps
T600 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all.3005730775 Aug 27 06:22:53 AM UTC 24 Aug 27 06:23:15 AM UTC 24 11116920845 ps
T601 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled.4002118581 Aug 27 06:21:11 AM UTC 24 Aug 27 06:23:16 AM UTC 24 160128230230 ps
T321 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.3266847455 Aug 27 06:22:42 AM UTC 24 Aug 27 06:23:23 AM UTC 24 215938211928 ps
T602 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.3265703736 Aug 27 06:22:26 AM UTC 24 Aug 27 06:23:26 AM UTC 24 27328196885 ps
T278 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled.3344831749 Aug 27 06:19:46 AM UTC 24 Aug 27 06:23:31 AM UTC 24 333572744148 ps
T603 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.4294008207 Aug 27 06:03:13 AM UTC 24 Aug 27 06:23:35 AM UTC 24 495955658956 ps
T604 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup_fixed.3190304016 Aug 27 06:18:08 AM UTC 24 Aug 27 06:23:35 AM UTC 24 411458834845 ps
T375 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.1034764284 Aug 27 06:20:31 AM UTC 24 Aug 27 06:23:36 AM UTC 24 342060768243 ps
T392 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.2399297820 Aug 27 06:15:36 AM UTC 24 Aug 27 06:23:38 AM UTC 24 86294258278 ps
T605 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.190276555 Aug 27 06:23:35 AM UTC 24 Aug 27 06:23:44 AM UTC 24 3242786092 ps
T178 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup.168915111 Aug 27 06:20:24 AM UTC 24 Aug 27 06:23:51 AM UTC 24 544226581629 ps
T358 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all_with_rand_reset.61385750 Aug 27 06:23:45 AM UTC 24 Aug 27 06:23:57 AM UTC 24 13072541703 ps
T264 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.2142567288 Aug 27 06:18:10 AM UTC 24 Aug 27 06:23:59 AM UTC 24 173178938720 ps
T606 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.2055960217 Aug 27 06:23:58 AM UTC 24 Aug 27 06:24:00 AM UTC 24 447313003 ps
T607 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_smoke.2824774361 Aug 27 06:24:00 AM UTC 24 Aug 27 06:24:04 AM UTC 24 6176649554 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_26/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled.114609493 Aug 27 06:12:58 AM UTC 24 Aug 27 06:24:16 AM UTC 24 321995197853 ps
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