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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.62 99.07 96.67 100.00 100.00 98.83 98.33 90.47


Total test records in report: 918
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T452 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_smoke.2521642321 Sep 04 01:12:20 AM UTC 24 Sep 04 01:12:46 AM UTC 24 5767888456 ps
T303 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_stress_all.3511663426 Sep 04 01:08:51 AM UTC 24 Sep 04 01:12:52 AM UTC 24 191238500996 ps
T453 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_wakeup_fixed.1714040191 Sep 04 12:58:32 AM UTC 24 Sep 04 01:12:53 AM UTC 24 620898905992 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.2570884966 Sep 04 01:09:23 AM UTC 24 Sep 04 01:13:00 AM UTC 24 162995259835 ps
T454 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.602248636 Sep 04 01:13:01 AM UTC 24 Sep 04 01:13:07 AM UTC 24 3706943717 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.3999091640 Sep 04 01:09:09 AM UTC 24 Sep 04 01:13:10 AM UTC 24 324920819057 ps
T455 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled_fixed.3715247094 Sep 04 01:09:13 AM UTC 24 Sep 04 01:13:12 AM UTC 24 160174332096 ps
T456 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.4292448975 Sep 04 01:13:07 AM UTC 24 Sep 04 01:13:18 AM UTC 24 28799201820 ps
T34 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.1335831824 Sep 04 01:13:13 AM UTC 24 Sep 04 01:13:23 AM UTC 24 5865142862 ps
T457 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.1064567419 Sep 04 01:13:24 AM UTC 24 Sep 04 01:13:26 AM UTC 24 456255950 ps
T206 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup.3325353405 Sep 04 01:08:00 AM UTC 24 Sep 04 01:13:28 AM UTC 24 361227458148 ps
T325 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled.1697511634 Sep 04 01:05:02 AM UTC 24 Sep 04 01:13:29 AM UTC 24 493149322127 ps
T458 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.4251531750 Sep 04 01:13:27 AM UTC 24 Sep 04 01:13:35 AM UTC 24 5937040513 ps
T459 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt_fixed.1995096546 Sep 04 01:06:53 AM UTC 24 Sep 04 01:13:37 AM UTC 24 162695370942 ps
T165 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.1140071754 Sep 04 01:12:31 AM UTC 24 Sep 04 01:13:43 AM UTC 24 323243247955 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.3904957281 Sep 04 01:07:16 AM UTC 24 Sep 04 01:13:58 AM UTC 24 81420017766 ps
T234 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_fsm_reset.427014115 Sep 04 01:06:08 AM UTC 24 Sep 04 01:14:01 AM UTC 24 130481532418 ps
T240 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_clock_gating.3645308717 Sep 04 01:04:26 AM UTC 24 Sep 04 01:14:02 AM UTC 24 379394591300 ps
T346 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.1923926051 Sep 04 01:12:53 AM UTC 24 Sep 04 01:14:16 AM UTC 24 165909815706 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all.2194532131 Sep 04 01:07:29 AM UTC 24 Sep 04 01:14:19 AM UTC 24 169815581964 ps
T209 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_both.2848561465 Sep 04 12:58:41 AM UTC 24 Sep 04 01:14:22 AM UTC 24 496941482410 ps
T320 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt.2612130245 Sep 04 01:06:45 AM UTC 24 Sep 04 01:14:22 AM UTC 24 326903689306 ps
T460 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt_fixed.2087771369 Sep 04 01:03:53 AM UTC 24 Sep 04 01:14:27 AM UTC 24 483963205960 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.335848428 Sep 04 01:14:17 AM UTC 24 Sep 04 01:14:28 AM UTC 24 5025894643 ps
T334 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.969810593 Sep 04 01:14:22 AM UTC 24 Sep 04 01:14:29 AM UTC 24 1307970320 ps
T462 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.3189806026 Sep 04 01:14:29 AM UTC 24 Sep 04 01:14:31 AM UTC 24 582458227 ps
T463 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled_fixed.1518539699 Sep 04 01:07:44 AM UTC 24 Sep 04 01:14:42 AM UTC 24 329189703847 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.1579954124 Sep 04 01:14:30 AM UTC 24 Sep 04 01:14:56 AM UTC 24 5981416949 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.1389836568 Sep 04 01:11:43 AM UTC 24 Sep 04 01:15:00 AM UTC 24 163819348588 ps
T465 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.3649415899 Sep 04 01:14:19 AM UTC 24 Sep 04 01:15:02 AM UTC 24 32832128018 ps
T273 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_clock_gating.207880300 Sep 04 01:11:33 AM UTC 24 Sep 04 01:15:31 AM UTC 24 543416587245 ps
T357 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.3255324607 Sep 04 01:14:32 AM UTC 24 Sep 04 01:15:38 AM UTC 24 325925314865 ps
T282 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.3381306438 Sep 04 01:12:43 AM UTC 24 Sep 04 01:15:49 AM UTC 24 545517940642 ps
T262 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_interrupt.2644072236 Sep 04 01:02:20 AM UTC 24 Sep 04 01:15:55 AM UTC 24 499241002538 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.1137463575 Sep 04 01:15:56 AM UTC 24 Sep 04 01:16:03 AM UTC 24 2959162886 ps
T467 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_fsm_reset.3753360923 Sep 04 01:03:16 AM UTC 24 Sep 04 01:16:20 AM UTC 24 128478392803 ps
T468 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.4261649711 Sep 04 01:13:58 AM UTC 24 Sep 04 01:16:27 AM UTC 24 199667931181 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.827956477 Sep 04 01:12:16 AM UTC 24 Sep 04 01:16:39 AM UTC 24 335110556559 ps
T469 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.1936520569 Sep 04 01:16:04 AM UTC 24 Sep 04 01:16:39 AM UTC 24 28935999614 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.107843261 Sep 04 01:08:36 AM UTC 24 Sep 04 01:16:41 AM UTC 24 114351903840 ps
T470 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.3498969178 Sep 04 01:16:39 AM UTC 24 Sep 04 01:16:41 AM UTC 24 328492914 ps
T347 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.1745609326 Sep 04 01:16:29 AM UTC 24 Sep 04 01:16:44 AM UTC 24 2785355797 ps
T241 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_both.3362559168 Sep 04 12:50:23 AM UTC 24 Sep 04 01:16:48 AM UTC 24 540131390465 ps
T471 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.41311938 Sep 04 01:16:39 AM UTC 24 Sep 04 01:16:51 AM UTC 24 5608121322 ps
T472 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.3773450837 Sep 04 01:12:47 AM UTC 24 Sep 04 01:17:03 AM UTC 24 206290937902 ps
T281 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.1642505053 Sep 04 01:15:03 AM UTC 24 Sep 04 01:17:03 AM UTC 24 171909940419 ps
T200 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.3928418389 Sep 04 01:13:44 AM UTC 24 Sep 04 01:17:28 AM UTC 24 578878965065 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.1586848586 Sep 04 01:13:11 AM UTC 24 Sep 04 01:17:39 AM UTC 24 91924319468 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.406937768 Sep 04 01:17:40 AM UTC 24 Sep 04 01:17:53 AM UTC 24 4791179424 ps
T475 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.3205115526 Sep 04 01:08:00 AM UTC 24 Sep 04 01:18:06 AM UTC 24 627483985454 ps
T258 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.2407183510 Sep 04 01:10:20 AM UTC 24 Sep 04 01:18:28 AM UTC 24 164619500143 ps
T297 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_clock_gating.2238516196 Sep 04 01:02:41 AM UTC 24 Sep 04 01:18:31 AM UTC 24 411069246982 ps
T302 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt.483897314 Sep 04 01:07:49 AM UTC 24 Sep 04 01:18:32 AM UTC 24 165158139214 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.2972907584 Sep 04 01:18:33 AM UTC 24 Sep 04 01:18:36 AM UTC 24 552733447 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt_fixed.3535669688 Sep 04 01:09:39 AM UTC 24 Sep 04 01:18:41 AM UTC 24 325897541961 ps
T351 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled.3594967397 Sep 04 01:06:28 AM UTC 24 Sep 04 01:18:43 AM UTC 24 502602352389 ps
T316 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_wakeup.2779931694 Sep 04 12:58:26 AM UTC 24 Sep 04 01:18:48 AM UTC 24 436197882391 ps
T154 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.3823575071 Sep 04 01:16:51 AM UTC 24 Sep 04 01:18:50 AM UTC 24 183656084800 ps
T35 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.2907529351 Sep 04 01:18:29 AM UTC 24 Sep 04 01:18:50 AM UTC 24 78016328981 ps
T478 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.1859885790 Sep 04 01:18:36 AM UTC 24 Sep 04 01:19:03 AM UTC 24 5868937526 ps
T207 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.1685546322 Sep 04 01:15:38 AM UTC 24 Sep 04 01:19:20 AM UTC 24 330863974184 ps
T183 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.456933069 Sep 04 01:13:36 AM UTC 24 Sep 04 01:19:23 AM UTC 24 481422278145 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.3442636949 Sep 04 01:12:29 AM UTC 24 Sep 04 01:19:37 AM UTC 24 323270510724 ps
T296 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all.3712190320 Sep 04 01:04:44 AM UTC 24 Sep 04 01:19:40 AM UTC 24 397178999441 ps
T480 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.1807190498 Sep 04 01:17:54 AM UTC 24 Sep 04 01:19:41 AM UTC 24 38240846457 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.784272375 Sep 04 01:19:38 AM UTC 24 Sep 04 01:19:42 AM UTC 24 3111383526 ps
T482 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.874962168 Sep 04 01:16:49 AM UTC 24 Sep 04 01:19:42 AM UTC 24 165320385807 ps
T224 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.1962509200 Sep 04 01:11:54 AM UTC 24 Sep 04 01:19:43 AM UTC 24 116267500786 ps
T333 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.3409423349 Sep 04 01:13:18 AM UTC 24 Sep 04 01:19:46 AM UTC 24 164300987738 ps
T483 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.3481717291 Sep 04 01:19:44 AM UTC 24 Sep 04 01:19:47 AM UTC 24 486110414 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.2641993037 Sep 04 01:19:42 AM UTC 24 Sep 04 01:19:50 AM UTC 24 3472996560 ps
T484 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.2533787374 Sep 04 01:19:47 AM UTC 24 Sep 04 01:20:15 AM UTC 24 5674847956 ps
T362 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.74713628 Sep 04 01:14:01 AM UTC 24 Sep 04 01:20:20 AM UTC 24 166814738598 ps
T485 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.3015131263 Sep 04 01:19:41 AM UTC 24 Sep 04 01:20:25 AM UTC 24 40557357691 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_wakeup.1394832824 Sep 04 01:00:17 AM UTC 24 Sep 04 01:20:27 AM UTC 24 535262192547 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup.3507988866 Sep 04 01:04:07 AM UTC 24 Sep 04 01:20:28 AM UTC 24 354143846102 ps
T486 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_wakeup_fixed.1697578126 Sep 04 01:00:44 AM UTC 24 Sep 04 01:20:31 AM UTC 24 619975567559 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.939318002 Sep 04 01:14:56 AM UTC 24 Sep 04 01:20:46 AM UTC 24 322923307220 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.700318250 Sep 04 01:13:30 AM UTC 24 Sep 04 01:21:03 AM UTC 24 497582416781 ps
T488 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.4208142326 Sep 04 01:16:42 AM UTC 24 Sep 04 01:21:07 AM UTC 24 326347235140 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.2125569997 Sep 04 01:20:47 AM UTC 24 Sep 04 01:21:08 AM UTC 24 4360963864 ps
T490 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.2709161163 Sep 04 01:09:47 AM UTC 24 Sep 04 01:21:20 AM UTC 24 197760366396 ps
T491 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.3886714343 Sep 04 01:21:21 AM UTC 24 Sep 04 01:21:30 AM UTC 24 11635719227 ps
T492 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.3421031718 Sep 04 01:21:31 AM UTC 24 Sep 04 01:21:33 AM UTC 24 419207701 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.2133809077 Sep 04 01:21:04 AM UTC 24 Sep 04 01:21:38 AM UTC 24 32397459918 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.1133702421 Sep 04 01:21:08 AM UTC 24 Sep 04 01:21:43 AM UTC 24 3741414795 ps
T285 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.3854892083 Sep 04 01:14:03 AM UTC 24 Sep 04 01:21:50 AM UTC 24 521265215959 ps
T495 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.2551152902 Sep 04 01:19:43 AM UTC 24 Sep 04 01:21:59 AM UTC 24 41350066087 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.1066488544 Sep 04 01:21:34 AM UTC 24 Sep 04 01:21:59 AM UTC 24 5665398348 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.3181916286 Sep 04 01:10:39 AM UTC 24 Sep 04 01:22:01 AM UTC 24 117870628544 ps
T378 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.191929229 Sep 04 01:14:22 AM UTC 24 Sep 04 01:22:04 AM UTC 24 93854132117 ps
T498 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.1649867790 Sep 04 01:12:40 AM UTC 24 Sep 04 01:22:09 AM UTC 24 320125830644 ps
T499 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.4048580860 Sep 04 01:07:43 AM UTC 24 Sep 04 01:22:22 AM UTC 24 318007208932 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.2609823321 Sep 04 01:22:23 AM UTC 24 Sep 04 01:22:27 AM UTC 24 4220207465 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.1445532047 Sep 04 01:21:44 AM UTC 24 Sep 04 01:22:36 AM UTC 24 163555474383 ps
T306 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.2180180717 Sep 04 01:22:05 AM UTC 24 Sep 04 01:22:46 AM UTC 24 162963852073 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.1651948330 Sep 04 01:18:44 AM UTC 24 Sep 04 01:22:48 AM UTC 24 496005701014 ps
T503 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.4261535186 Sep 04 01:22:47 AM UTC 24 Sep 04 01:22:50 AM UTC 24 2082689814 ps
T350 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.868273799 Sep 04 01:18:51 AM UTC 24 Sep 04 01:22:51 AM UTC 24 186214047884 ps
T504 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.1482651295 Sep 04 01:22:51 AM UTC 24 Sep 04 01:22:54 AM UTC 24 507680443 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.3903019645 Sep 04 01:19:51 AM UTC 24 Sep 04 01:22:55 AM UTC 24 169796316293 ps
T506 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.1943606200 Sep 04 01:22:52 AM UTC 24 Sep 04 01:22:59 AM UTC 24 5860053399 ps
T507 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled.293160084 Sep 04 01:02:02 AM UTC 24 Sep 04 01:22:59 AM UTC 24 327704626151 ps
T508 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup_fixed.4252248680 Sep 04 01:05:28 AM UTC 24 Sep 04 01:23:00 AM UTC 24 398966981228 ps
T509 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.3561599780 Sep 04 01:20:28 AM UTC 24 Sep 04 01:23:19 AM UTC 24 213356997850 ps
T290 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.1995736116 Sep 04 01:15:49 AM UTC 24 Sep 04 01:23:24 AM UTC 24 176769897898 ps
T295 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.3470341404 Sep 04 01:19:24 AM UTC 24 Sep 04 01:23:39 AM UTC 24 188593952027 ps
T277 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.2730144363 Sep 04 01:23:25 AM UTC 24 Sep 04 01:24:03 AM UTC 24 440608367685 ps
T344 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.2994182204 Sep 04 01:17:04 AM UTC 24 Sep 04 01:24:04 AM UTC 24 165953075887 ps
T339 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.3508085067 Sep 04 01:20:29 AM UTC 24 Sep 04 01:24:14 AM UTC 24 501203903524 ps
T155 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.2429606919 Sep 04 01:21:51 AM UTC 24 Sep 04 01:24:14 AM UTC 24 334655435209 ps
T510 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.853268062 Sep 04 01:22:28 AM UTC 24 Sep 04 01:24:16 AM UTC 24 25352169717 ps
T511 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.3788044863 Sep 04 01:24:16 AM UTC 24 Sep 04 01:24:19 AM UTC 24 528107879 ps
T512 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.924196712 Sep 04 01:24:04 AM UTC 24 Sep 04 01:24:19 AM UTC 24 24608811490 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.1963861663 Sep 04 01:24:03 AM UTC 24 Sep 04 01:24:20 AM UTC 24 3439705186 ps
T307 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.2306724776 Sep 04 01:24:15 AM UTC 24 Sep 04 01:24:28 AM UTC 24 10218535034 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.3919610297 Sep 04 01:24:19 AM UTC 24 Sep 04 01:24:29 AM UTC 24 6009554421 ps
T515 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.2289903690 Sep 04 01:15:31 AM UTC 24 Sep 04 01:24:56 AM UTC 24 201856272220 ps
T326 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.36953446 Sep 04 01:12:23 AM UTC 24 Sep 04 01:25:28 AM UTC 24 497520006352 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.3075256800 Sep 04 01:22:56 AM UTC 24 Sep 04 01:25:30 AM UTC 24 487407507480 ps
T517 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.1011045406 Sep 04 01:22:49 AM UTC 24 Sep 04 01:25:40 AM UTC 24 74220268774 ps
T518 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.137350719 Sep 04 01:16:38 AM UTC 24 Sep 04 01:25:41 AM UTC 24 209897337322 ps
T519 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.1318637006 Sep 04 01:25:41 AM UTC 24 Sep 04 01:25:47 AM UTC 24 3717602234 ps
T227 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.137011758 Sep 04 01:16:21 AM UTC 24 Sep 04 01:25:57 AM UTC 24 123819254629 ps
T355 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.3058454009 Sep 04 01:12:52 AM UTC 24 Sep 04 01:25:58 AM UTC 24 544057584678 ps
T314 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.1914953723 Sep 04 01:19:22 AM UTC 24 Sep 04 01:25:59 AM UTC 24 359796123064 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.3505982911 Sep 04 01:26:00 AM UTC 24 Sep 04 01:26:02 AM UTC 24 461149159 ps
T521 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.2851709504 Sep 04 01:26:03 AM UTC 24 Sep 04 01:26:09 AM UTC 24 5720256545 ps
T522 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_clock_gating.3766697699 Sep 04 01:08:05 AM UTC 24 Sep 04 01:26:09 AM UTC 24 551123296031 ps
T523 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.182001127 Sep 04 01:25:41 AM UTC 24 Sep 04 01:26:15 AM UTC 24 24520201258 ps
T36 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.712734356 Sep 04 01:25:59 AM UTC 24 Sep 04 01:26:22 AM UTC 24 10116707632 ps
T524 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.981004588 Sep 04 01:11:13 AM UTC 24 Sep 04 01:26:30 AM UTC 24 327631873510 ps
T525 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.1447409925 Sep 04 01:24:29 AM UTC 24 Sep 04 01:26:43 AM UTC 24 486222572425 ps
T526 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.79462398 Sep 04 01:15:01 AM UTC 24 Sep 04 01:26:58 AM UTC 24 329427118336 ps
T527 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.3394870719 Sep 04 01:23:20 AM UTC 24 Sep 04 01:27:01 AM UTC 24 208317425403 ps
T228 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.3731753099 Sep 04 01:18:07 AM UTC 24 Sep 04 01:27:01 AM UTC 24 117322211841 ps
T184 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.2717820593 Sep 04 01:16:44 AM UTC 24 Sep 04 01:27:05 AM UTC 24 483218933651 ps
T528 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.3888944527 Sep 04 01:27:02 AM UTC 24 Sep 04 01:27:09 AM UTC 24 4416138337 ps
T361 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.2188997269 Sep 04 01:24:15 AM UTC 24 Sep 04 01:27:21 AM UTC 24 456454830784 ps
T529 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.4043413485 Sep 04 01:11:03 AM UTC 24 Sep 04 01:27:23 AM UTC 24 329362467507 ps
T530 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.347638573 Sep 04 01:21:07 AM UTC 24 Sep 04 01:27:25 AM UTC 24 75357528465 ps
T531 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.3027618541 Sep 04 01:27:26 AM UTC 24 Sep 04 01:27:30 AM UTC 24 522733636 ps
T532 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_wakeup_fixed.1299547256 Sep 04 12:55:44 AM UTC 24 Sep 04 01:27:33 AM UTC 24 603645271005 ps
T533 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.2007995850 Sep 04 01:27:30 AM UTC 24 Sep 04 01:27:39 AM UTC 24 6130980288 ps
T156 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.1710344691 Sep 04 01:23:00 AM UTC 24 Sep 04 01:27:48 AM UTC 24 564462390506 ps
T534 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.434656386 Sep 04 01:17:03 AM UTC 24 Sep 04 01:27:49 AM UTC 24 407735527215 ps
T535 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.4204245084 Sep 04 01:22:00 AM UTC 24 Sep 04 01:27:51 AM UTC 24 482410586368 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.1591495159 Sep 04 01:27:22 AM UTC 24 Sep 04 01:27:52 AM UTC 24 4138087668 ps
T157 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt.1323787888 Sep 04 01:05:15 AM UTC 24 Sep 04 01:27:56 AM UTC 24 486908787052 ps
T537 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.3124880218 Sep 04 01:18:50 AM UTC 24 Sep 04 01:27:57 AM UTC 24 170472419158 ps
T323 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_both.3737716623 Sep 04 01:04:26 AM UTC 24 Sep 04 01:28:03 AM UTC 24 489539646359 ps
T538 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.3182323060 Sep 04 01:20:26 AM UTC 24 Sep 04 01:28:05 AM UTC 24 546251665778 ps
T539 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.1859223604 Sep 04 01:27:05 AM UTC 24 Sep 04 01:28:11 AM UTC 24 42917445647 ps
T540 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.4051374243 Sep 04 01:28:05 AM UTC 24 Sep 04 01:28:12 AM UTC 24 4783628109 ps
T220 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.635697155 Sep 04 01:19:41 AM UTC 24 Sep 04 01:28:31 AM UTC 24 65438442603 ps
T364 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.538351910 Sep 04 01:28:13 AM UTC 24 Sep 04 01:28:43 AM UTC 24 9778378750 ps
T541 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.588014165 Sep 04 01:22:02 AM UTC 24 Sep 04 01:28:45 AM UTC 24 620935583500 ps
T542 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.1281654528 Sep 04 01:28:44 AM UTC 24 Sep 04 01:28:47 AM UTC 24 556998623 ps
T298 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.2226890481 Sep 04 01:22:09 AM UTC 24 Sep 04 01:28:54 AM UTC 24 325869489862 ps
T543 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.70285411 Sep 04 01:28:46 AM UTC 24 Sep 04 01:28:54 AM UTC 24 5706801660 ps
T544 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.4214528115 Sep 04 01:26:31 AM UTC 24 Sep 04 01:29:11 AM UTC 24 175518892652 ps
T545 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.2757892412 Sep 04 01:20:17 AM UTC 24 Sep 04 01:29:18 AM UTC 24 328727013194 ps
T299 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.1549348424 Sep 04 01:16:42 AM UTC 24 Sep 04 01:29:31 AM UTC 24 324013958671 ps
T546 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.2170394660 Sep 04 01:28:06 AM UTC 24 Sep 04 01:29:44 AM UTC 24 28901919336 ps
T547 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt_fixed.3506226124 Sep 04 01:27:50 AM UTC 24 Sep 04 01:29:44 AM UTC 24 494400058066 ps
T548 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all.2463345214 Sep 04 01:26:00 AM UTC 24 Sep 04 01:29:54 AM UTC 24 673210539170 ps
T549 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.2778087453 Sep 04 01:14:28 AM UTC 24 Sep 04 01:30:00 AM UTC 24 352436782845 ps
T289 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.85113172 Sep 04 01:24:29 AM UTC 24 Sep 04 01:30:01 AM UTC 24 492305451428 ps
T550 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.216407538 Sep 04 01:29:55 AM UTC 24 Sep 04 01:30:02 AM UTC 24 4735912031 ps
T551 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.2192645700 Sep 04 01:22:55 AM UTC 24 Sep 04 01:30:04 AM UTC 24 171370076631 ps
T268 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.4052008772 Sep 04 01:23:39 AM UTC 24 Sep 04 01:30:24 AM UTC 24 167912058780 ps
T229 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.605128281 Sep 04 01:24:05 AM UTC 24 Sep 04 01:30:28 AM UTC 24 69314881779 ps
T552 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.3932694237 Sep 04 01:30:25 AM UTC 24 Sep 04 01:30:29 AM UTC 24 471423952 ps
T81 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.3975310384 Sep 04 01:30:03 AM UTC 24 Sep 04 01:30:38 AM UTC 24 12474180008 ps
T83 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.3305859855 Sep 04 01:30:28 AM UTC 24 Sep 04 01:30:41 AM UTC 24 5670343926 ps
T84 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.3193658612 Sep 04 01:30:01 AM UTC 24 Sep 04 01:30:46 AM UTC 24 22819392741 ps
T85 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt_fixed.3706776684 Sep 04 01:18:51 AM UTC 24 Sep 04 01:31:14 AM UTC 24 321770726721 ps
T86 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_stress_all.4246744444 Sep 04 01:06:23 AM UTC 24 Sep 04 01:31:31 AM UTC 24 651809048419 ps
T87 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.2172939270 Sep 04 01:24:57 AM UTC 24 Sep 04 01:32:12 AM UTC 24 610264001114 ps
T88 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled_fixed.1826381941 Sep 04 01:30:39 AM UTC 24 Sep 04 01:32:33 AM UTC 24 157294171264 ps
T89 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_stress_all.1902360748 Sep 04 12:56:51 AM UTC 24 Sep 04 01:32:55 AM UTC 24 1257669902287 ps
T90 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.2614642503 Sep 04 01:26:59 AM UTC 24 Sep 04 01:32:57 AM UTC 24 164057504970 ps
T91 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled.554536708 Sep 04 01:10:59 AM UTC 24 Sep 04 01:32:59 AM UTC 24 490409711048 ps
T553 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled.1556971270 Sep 04 01:28:47 AM UTC 24 Sep 04 01:33:00 AM UTC 24 161610476445 ps
T554 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.3244769328 Sep 04 01:32:56 AM UTC 24 Sep 04 01:33:01 AM UTC 24 3174168271 ps
T555 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.587283925 Sep 04 01:11:10 AM UTC 24 Sep 04 01:33:03 AM UTC 24 493211178683 ps
T556 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.2719135499 Sep 04 01:33:04 AM UTC 24 Sep 04 01:33:06 AM UTC 24 350391035 ps
T557 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup_fixed.255734813 Sep 04 01:02:27 AM UTC 24 Sep 04 01:33:09 AM UTC 24 587350057192 ps
T558 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.2021734005 Sep 04 01:33:07 AM UTC 24 Sep 04 01:33:12 AM UTC 24 5743295035 ps
T559 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.3909008915 Sep 04 01:33:00 AM UTC 24 Sep 04 01:33:15 AM UTC 24 7513076600 ps
T560 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup_fixed.2382781217 Sep 04 01:26:44 AM UTC 24 Sep 04 01:33:37 AM UTC 24 402793072209 ps
T561 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.3499463332 Sep 04 01:26:10 AM UTC 24 Sep 04 01:33:41 AM UTC 24 163884878314 ps
T562 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup_fixed.564461431 Sep 04 01:29:33 AM UTC 24 Sep 04 01:33:41 AM UTC 24 583001606469 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.196253204 Sep 04 01:31:15 AM UTC 24 Sep 04 01:33:43 AM UTC 24 180188935313 ps
T563 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.1516758944 Sep 04 01:26:10 AM UTC 24 Sep 04 01:33:44 AM UTC 24 159477027861 ps
T237 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup.1974283204 Sep 04 01:11:22 AM UTC 24 Sep 04 01:33:45 AM UTC 24 526421509656 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.3289478360 Sep 04 01:25:28 AM UTC 24 Sep 04 01:33:49 AM UTC 24 163809346264 ps
T564 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.1459479880 Sep 04 01:33:46 AM UTC 24 Sep 04 01:33:49 AM UTC 24 3258275014 ps
T238 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.2640914515 Sep 04 01:13:29 AM UTC 24 Sep 04 01:33:58 AM UTC 24 495341876931 ps
T360 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.3014768054 Sep 04 01:25:31 AM UTC 24 Sep 04 01:33:58 AM UTC 24 186880343377 ps
T565 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.1628685609 Sep 04 01:23:00 AM UTC 24 Sep 04 01:34:00 AM UTC 24 495955609198 ps
T342 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.935162560 Sep 04 01:27:24 AM UTC 24 Sep 04 01:34:00 AM UTC 24 575693521934 ps
T566 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.1622938717 Sep 04 01:14:43 AM UTC 24 Sep 04 01:34:01 AM UTC 24 485944236845 ps
T567 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.234910885 Sep 04 01:34:01 AM UTC 24 Sep 04 01:34:03 AM UTC 24 499307594 ps
T568 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.2812597613 Sep 04 01:32:13 AM UTC 24 Sep 04 01:34:06 AM UTC 24 161903104701 ps
T569 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.2987081148 Sep 04 01:32:58 AM UTC 24 Sep 04 01:34:06 AM UTC 24 26129347910 ps
T570 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.2425009580 Sep 04 01:20:21 AM UTC 24 Sep 04 01:34:07 AM UTC 24 331643097661 ps
T571 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.3240722965 Sep 04 01:34:01 AM UTC 24 Sep 04 01:34:09 AM UTC 24 5686298505 ps
T37 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.3206347362 Sep 04 01:33:58 AM UTC 24 Sep 04 01:34:18 AM UTC 24 23694932058 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.301496669 Sep 04 01:18:32 AM UTC 24 Sep 04 01:34:36 AM UTC 24 505031914968 ps
T572 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.2456675117 Sep 04 01:10:51 AM UTC 24 Sep 04 01:34:39 AM UTC 24 202325988035 ps
T573 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.3883200814 Sep 04 01:30:47 AM UTC 24 Sep 04 01:34:39 AM UTC 24 326510552342 ps
T574 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.1967763637 Sep 04 01:34:37 AM UTC 24 Sep 04 01:34:45 AM UTC 24 4048171683 ps
T575 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.488999244 Sep 04 01:33:49 AM UTC 24 Sep 04 01:34:45 AM UTC 24 35241406690 ps
T576 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.2636204810 Sep 04 01:11:29 AM UTC 24 Sep 04 01:34:52 AM UTC 24 604445091116 ps
T577 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.3720507377 Sep 04 01:26:23 AM UTC 24 Sep 04 01:34:55 AM UTC 24 486406291482 ps
T578 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.577401115 Sep 04 01:34:53 AM UTC 24 Sep 04 01:34:55 AM UTC 24 463131721 ps
T579 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.908763801 Sep 04 01:33:43 AM UTC 24 Sep 04 01:34:58 AM UTC 24 194145491484 ps
T580 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.35336982 Sep 04 01:34:46 AM UTC 24 Sep 04 01:35:03 AM UTC 24 35107267932 ps
T581 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.2623066362 Sep 04 01:34:56 AM UTC 24 Sep 04 01:35:04 AM UTC 24 6009291982 ps
T582 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.2897989838 Sep 04 01:22:00 AM UTC 24 Sep 04 01:35:04 AM UTC 24 556534146562 ps
T583 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.3759262745 Sep 04 01:34:39 AM UTC 24 Sep 04 01:35:18 AM UTC 24 26472924440 ps
T584 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.3660918201 Sep 04 01:19:47 AM UTC 24 Sep 04 01:35:18 AM UTC 24 328873864754 ps
T585 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.1790681077 Sep 04 01:19:04 AM UTC 24 Sep 04 01:35:29 AM UTC 24 404763683162 ps
T201 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.1549617474 Sep 04 01:30:29 AM UTC 24 Sep 04 01:35:35 AM UTC 24 324596709463 ps
T354 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.1336469530 Sep 04 01:27:01 AM UTC 24 Sep 04 01:35:38 AM UTC 24 360701293270 ps
T586 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.493883016 Sep 04 01:27:53 AM UTC 24 Sep 04 01:35:48 AM UTC 24 401901990850 ps
T587 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.1903574592 Sep 04 01:35:30 AM UTC 24 Sep 04 01:35:53 AM UTC 24 5418790421 ps
T588 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.2352890119 Sep 04 01:13:38 AM UTC 24 Sep 04 01:36:00 AM UTC 24 487312140336 ps
T589 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.1758479034 Sep 04 01:36:01 AM UTC 24 Sep 04 01:36:04 AM UTC 24 336040430 ps
T283 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.288143768 Sep 04 01:29:18 AM UTC 24 Sep 04 01:36:07 AM UTC 24 555414084483 ps
T376 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.917003684 Sep 04 01:28:12 AM UTC 24 Sep 04 01:36:15 AM UTC 24 107777169271 ps
T359 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup.678647283 Sep 04 01:34:08 AM UTC 24 Sep 04 01:36:20 AM UTC 24 354767770024 ps
T590 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.970854476 Sep 04 01:21:40 AM UTC 24 Sep 04 01:36:30 AM UTC 24 330870813418 ps
T591 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.3180140541 Sep 04 01:27:39 AM UTC 24 Sep 04 01:36:31 AM UTC 24 166205742400 ps
T592 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_both.3013362815 Sep 04 01:33:44 AM UTC 24 Sep 04 01:36:31 AM UTC 24 171784301780 ps
T593 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.547800307 Sep 04 01:36:04 AM UTC 24 Sep 04 01:36:31 AM UTC 24 5885270094 ps
T336 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_both.556218078 Sep 04 01:27:57 AM UTC 24 Sep 04 01:36:38 AM UTC 24 340730192149 ps
T594 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.2174110213 Sep 04 01:29:45 AM UTC 24 Sep 04 01:36:41 AM UTC 24 512004646535 ps
T595 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled_fixed.146600915 Sep 04 01:28:54 AM UTC 24 Sep 04 01:36:42 AM UTC 24 166346944101 ps
T596 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.3982754151 Sep 04 01:33:16 AM UTC 24 Sep 04 01:36:43 AM UTC 24 169185227906 ps
T597 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup_fixed.3191349979 Sep 04 01:31:32 AM UTC 24 Sep 04 01:36:51 AM UTC 24 403031457806 ps
T598 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.2810980246 Sep 04 01:35:36 AM UTC 24 Sep 04 01:36:54 AM UTC 24 34989994314 ps
T599 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled_fixed.1789338312 Sep 04 01:34:04 AM UTC 24 Sep 04 01:36:56 AM UTC 24 164690014180 ps
T600 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.3881060719 Sep 04 01:36:41 AM UTC 24 Sep 04 01:36:58 AM UTC 24 3765316414 ps
T601 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.3520332746 Sep 04 01:36:56 AM UTC 24 Sep 04 01:37:00 AM UTC 24 390497460 ps
T365 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.360044085 Sep 04 01:35:48 AM UTC 24 Sep 04 01:37:13 AM UTC 24 224156129005 ps
T602 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_smoke.166271242 Sep 04 01:36:59 AM UTC 24 Sep 04 01:37:14 AM UTC 24 5960982837 ps
T221 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.1570876493 Sep 04 01:25:48 AM UTC 24 Sep 04 01:37:16 AM UTC 24 101560857640 ps
T603 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled.2606806306 Sep 04 01:34:56 AM UTC 24 Sep 04 01:37:22 AM UTC 24 163271388120 ps
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