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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.62 99.07 96.67 100.00 100.00 98.83 98.33 90.47


Total test records in report: 918
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T327 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all_with_rand_reset.1651044607 Sep 04 01:36:51 AM UTC 24 Sep 04 01:37:29 AM UTC 24 15604025566 ps
T604 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup_fixed.1828318549 Sep 04 01:33:42 AM UTC 24 Sep 04 01:37:33 AM UTC 24 408444828050 ps
T308 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup.1381026720 Sep 04 01:33:42 AM UTC 24 Sep 04 01:37:35 AM UTC 24 390173049795 ps
T605 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.2223404227 Sep 04 01:33:13 AM UTC 24 Sep 04 01:37:36 AM UTC 24 330254512320 ps
T606 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled.2939853508 Sep 04 01:33:10 AM UTC 24 Sep 04 01:37:37 AM UTC 24 330679173948 ps
T607 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt.116857120 Sep 04 01:36:22 AM UTC 24 Sep 04 01:37:45 AM UTC 24 166022481785 ps
T608 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_poweron_counter.3711920235 Sep 04 01:37:36 AM UTC 24 Sep 04 01:37:46 AM UTC 24 4969681338 ps
T609 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt_fixed.421994504 Sep 04 01:34:07 AM UTC 24 Sep 04 01:37:51 AM UTC 24 165510921525 ps
T610 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_lowpower_counter.2903476795 Sep 04 01:37:38 AM UTC 24 Sep 04 01:37:54 AM UTC 24 28603508205 ps
T611 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_lowpower_counter.1899249904 Sep 04 01:36:43 AM UTC 24 Sep 04 01:37:56 AM UTC 24 34507023460 ps
T612 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_alert_test.300776295 Sep 04 01:37:54 AM UTC 24 Sep 04 01:37:56 AM UTC 24 489810975 ps
T613 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all.3048400569 Sep 04 01:30:05 AM UTC 24 Sep 04 01:37:57 AM UTC 24 178472970481 ps
T614 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all_with_rand_reset.3328312400 Sep 04 01:37:47 AM UTC 24 Sep 04 01:38:00 AM UTC 24 4325521745 ps
T615 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup_fixed.4108651556 Sep 04 01:36:32 AM UTC 24 Sep 04 01:38:03 AM UTC 24 202103848911 ps
T616 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_smoke.823862967 Sep 04 01:37:56 AM UTC 24 Sep 04 01:38:04 AM UTC 24 5884752389 ps
T617 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.2028259609 Sep 04 01:22:37 AM UTC 24 Sep 04 01:38:14 AM UTC 24 112702115168 ps
T618 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.2681521615 Sep 04 01:30:02 AM UTC 24 Sep 04 01:38:18 AM UTC 24 98687113947 ps
T208 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.4027819331 Sep 04 01:34:19 AM UTC 24 Sep 04 01:38:41 AM UTC 24 525781847654 ps
T619 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup.2657201823 Sep 04 01:35:05 AM UTC 24 Sep 04 01:38:44 AM UTC 24 201036206537 ps
T620 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_poweron_counter.590429376 Sep 04 01:38:44 AM UTC 24 Sep 04 01:38:55 AM UTC 24 4849940343 ps
T621 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt.3124101642 Sep 04 01:34:07 AM UTC 24 Sep 04 01:39:02 AM UTC 24 325631665594 ps
T622 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.3932950735 Sep 04 01:27:34 AM UTC 24 Sep 04 01:39:21 AM UTC 24 492690066443 ps
T185 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_clock_gating.3656030965 Sep 04 01:36:32 AM UTC 24 Sep 04 01:39:27 AM UTC 24 494808609765 ps
T166 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.3232520951 Sep 04 01:27:57 AM UTC 24 Sep 04 01:39:29 AM UTC 24 520291135583 ps
T623 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_alert_test.2522199548 Sep 04 01:39:30 AM UTC 24 Sep 04 01:39:34 AM UTC 24 490278761 ps
T624 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all_with_rand_reset.58860851 Sep 04 01:39:21 AM UTC 24 Sep 04 01:39:42 AM UTC 24 9005061036 ps
T625 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_smoke.1821682764 Sep 04 01:39:35 AM UTC 24 Sep 04 01:39:47 AM UTC 24 5586316076 ps
T626 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled_fixed.3730023649 Sep 04 01:36:15 AM UTC 24 Sep 04 01:40:02 AM UTC 24 318727763885 ps
T627 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_lowpower_counter.3833776497 Sep 04 01:38:56 AM UTC 24 Sep 04 01:40:05 AM UTC 24 31292860578 ps
T628 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.2258068809 Sep 04 01:24:42 AM UTC 24 Sep 04 01:40:05 AM UTC 24 358284828476 ps
T56 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.354071510 Sep 04 01:27:10 AM UTC 24 Sep 04 01:40:30 AM UTC 24 103707813184 ps
T254 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup.438669784 Sep 04 01:27:51 AM UTC 24 Sep 04 01:40:35 AM UTC 24 679887378548 ps
T629 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.4018162037 Sep 04 01:24:20 AM UTC 24 Sep 04 01:40:36 AM UTC 24 327913729922 ps
T630 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt.1798702782 Sep 04 01:37:16 AM UTC 24 Sep 04 01:40:39 AM UTC 24 323782026334 ps
T631 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_poweron_counter.3225416002 Sep 04 01:40:39 AM UTC 24 Sep 04 01:40:43 AM UTC 24 5189494359 ps
T632 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt.385623911 Sep 04 01:35:04 AM UTC 24 Sep 04 01:40:52 AM UTC 24 328904315776 ps
T167 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.2312802344 Sep 04 01:26:16 AM UTC 24 Sep 04 01:41:14 AM UTC 24 326593254927 ps
T633 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled.97634652 Sep 04 01:36:08 AM UTC 24 Sep 04 01:41:19 AM UTC 24 483913098101 ps
T634 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt_fixed.2541495555 Sep 04 01:35:05 AM UTC 24 Sep 04 01:41:34 AM UTC 24 499037929484 ps
T635 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup_fixed.851348679 Sep 04 01:37:30 AM UTC 24 Sep 04 01:41:37 AM UTC 24 586776468708 ps
T636 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_alert_test.76953069 Sep 04 01:41:35 AM UTC 24 Sep 04 01:41:37 AM UTC 24 517604717 ps
T637 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup.598418316 Sep 04 01:37:23 AM UTC 24 Sep 04 01:41:43 AM UTC 24 489226566236 ps
T638 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_smoke.659430451 Sep 04 01:41:38 AM UTC 24 Sep 04 01:41:46 AM UTC 24 5705238966 ps
T639 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt_fixed.2144224472 Sep 04 01:36:32 AM UTC 24 Sep 04 01:41:47 AM UTC 24 165354848318 ps
T245 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all_with_rand_reset.248768733 Sep 04 01:41:16 AM UTC 24 Sep 04 01:41:57 AM UTC 24 17005556878 ps
T640 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_lowpower_counter.3123099954 Sep 04 01:40:44 AM UTC 24 Sep 04 01:42:00 AM UTC 24 22914399325 ps
T641 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.851204707 Sep 04 01:30:41 AM UTC 24 Sep 04 01:42:07 AM UTC 24 324676536467 ps
T642 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled_fixed.3350101503 Sep 04 01:39:47 AM UTC 24 Sep 04 01:42:33 AM UTC 24 164748293122 ps
T643 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.338918276 Sep 04 01:32:34 AM UTC 24 Sep 04 01:42:39 AM UTC 24 507445901548 ps
T644 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.3318456079 Sep 04 01:18:42 AM UTC 24 Sep 04 01:42:45 AM UTC 24 489574844002 ps
T645 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_poweron_counter.3508501698 Sep 04 01:42:40 AM UTC 24 Sep 04 01:42:58 AM UTC 24 4793932370 ps
T646 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled.1469664778 Sep 04 01:41:38 AM UTC 24 Sep 04 01:43:03 AM UTC 24 164602424214 ps
T647 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled.2399194596 Sep 04 01:37:00 AM UTC 24 Sep 04 01:43:04 AM UTC 24 325673128409 ps
T304 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all_with_rand_reset.1731859484 Sep 04 01:43:04 AM UTC 24 Sep 04 01:43:16 AM UTC 24 171161160054 ps
T648 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all.2853826869 Sep 04 01:28:32 AM UTC 24 Sep 04 01:43:18 AM UTC 24 141797747717 ps
T649 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_alert_test.3885379636 Sep 04 01:43:16 AM UTC 24 Sep 04 01:43:19 AM UTC 24 408978879 ps
T650 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_smoke.2531417906 Sep 04 01:43:19 AM UTC 24 Sep 04 01:43:28 AM UTC 24 5765540096 ps
T335 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_both.2093327206 Sep 04 01:38:41 AM UTC 24 Sep 04 01:44:00 AM UTC 24 339083247147 ps
T651 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled_fixed.69489853 Sep 04 01:41:44 AM UTC 24 Sep 04 01:44:02 AM UTC 24 165702926952 ps
T652 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt_fixed.3233079133 Sep 04 01:37:17 AM UTC 24 Sep 04 01:44:14 AM UTC 24 492070401646 ps
T653 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_lowpower_counter.2795017913 Sep 04 01:42:46 AM UTC 24 Sep 04 01:44:15 AM UTC 24 28887169183 ps
T654 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled_fixed.2156380002 Sep 04 01:37:58 AM UTC 24 Sep 04 01:44:19 AM UTC 24 164753112348 ps
T655 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled_fixed.386666068 Sep 04 01:37:13 AM UTC 24 Sep 04 01:44:37 AM UTC 24 167440442875 ps
T345 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup.1917967570 Sep 04 01:38:05 AM UTC 24 Sep 04 01:44:42 AM UTC 24 188854479340 ps
T313 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled.3371659341 Sep 04 01:34:02 AM UTC 24 Sep 04 01:45:00 AM UTC 24 486062101142 ps
T309 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_both.2808976096 Sep 04 01:36:39 AM UTC 24 Sep 04 01:45:03 AM UTC 24 342368194330 ps
T246 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.372801626 Sep 04 01:22:59 AM UTC 24 Sep 04 01:45:03 AM UTC 24 493421490414 ps
T57 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_fsm_reset.3107597988 Sep 04 01:33:00 AM UTC 24 Sep 04 01:45:06 AM UTC 24 115437898950 ps
T656 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_poweron_counter.1573915354 Sep 04 01:44:43 AM UTC 24 Sep 04 01:45:06 AM UTC 24 4921123431 ps
T657 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_alert_test.1773782663 Sep 04 01:45:06 AM UTC 24 Sep 04 01:45:09 AM UTC 24 332845050 ps
T352 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all.2916948309 Sep 04 01:39:28 AM UTC 24 Sep 04 01:45:12 AM UTC 24 502556092054 ps
T658 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup.2982784905 Sep 04 01:36:32 AM UTC 24 Sep 04 01:45:14 AM UTC 24 343537061081 ps
T66 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all_with_rand_reset.195399390 Sep 04 01:45:04 AM UTC 24 Sep 04 01:45:15 AM UTC 24 16600140581 ps
T659 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all.257275068 Sep 04 01:35:53 AM UTC 24 Sep 04 01:45:16 AM UTC 24 217884979157 ps
T353 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_both.3128355275 Sep 04 01:40:37 AM UTC 24 Sep 04 01:45:18 AM UTC 24 510995827641 ps
T660 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup_fixed.1495445329 Sep 04 01:34:09 AM UTC 24 Sep 04 01:45:28 AM UTC 24 196527359052 ps
T202 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_clock_gating.310543822 Sep 04 01:44:20 AM UTC 24 Sep 04 01:45:30 AM UTC 24 363635692837 ps
T661 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled.1206332900 Sep 04 01:43:19 AM UTC 24 Sep 04 01:45:32 AM UTC 24 166359553855 ps
T662 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_smoke.1329036035 Sep 04 01:45:09 AM UTC 24 Sep 04 01:45:36 AM UTC 24 5889223781 ps
T663 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_poweron_counter.1400188904 Sep 04 01:45:37 AM UTC 24 Sep 04 01:45:43 AM UTC 24 3663198093 ps
T225 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_fsm_reset.1049897824 Sep 04 01:37:46 AM UTC 24 Sep 04 01:45:52 AM UTC 24 110023511517 ps
T664 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_fsm_reset.540711863 Sep 04 01:36:43 AM UTC 24 Sep 04 01:46:00 AM UTC 24 97940131008 ps
T665 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all_with_rand_reset.3184857966 Sep 04 01:46:00 AM UTC 24 Sep 04 01:46:07 AM UTC 24 7688586731 ps
T168 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.1154642876 Sep 04 01:20:32 AM UTC 24 Sep 04 01:46:19 AM UTC 24 512427833187 ps
T666 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_alert_test.2132402527 Sep 04 01:46:21 AM UTC 24 Sep 04 01:46:24 AM UTC 24 410381261 ps
T667 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_lowpower_counter.2418561395 Sep 04 01:45:44 AM UTC 24 Sep 04 01:46:26 AM UTC 24 38809296533 ps
T668 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt_fixed.1282213468 Sep 04 01:40:06 AM UTC 24 Sep 04 01:46:31 AM UTC 24 497203074729 ps
T247 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup.3564852938 Sep 04 01:41:57 AM UTC 24 Sep 04 01:46:38 AM UTC 24 356594084976 ps
T669 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.3204563404 Sep 04 01:27:49 AM UTC 24 Sep 04 01:46:44 AM UTC 24 494814368839 ps
T670 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt_fixed.1374669258 Sep 04 01:33:38 AM UTC 24 Sep 04 01:46:44 AM UTC 24 331061402089 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_clock_gating.3249946218 Sep 04 01:35:20 AM UTC 24 Sep 04 01:46:48 AM UTC 24 400196967918 ps
T671 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_lowpower_counter.4207985106 Sep 04 01:45:01 AM UTC 24 Sep 04 01:46:48 AM UTC 24 26211504681 ps
T672 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_smoke.1240110489 Sep 04 01:46:25 AM UTC 24 Sep 04 01:46:50 AM UTC 24 6028585318 ps
T673 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_fsm_reset.3952535060 Sep 04 01:39:02 AM UTC 24 Sep 04 01:46:56 AM UTC 24 111271241346 ps
T674 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_poweron_counter.871039015 Sep 04 01:46:57 AM UTC 24 Sep 04 01:47:06 AM UTC 24 3646349420 ps
T675 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled.289344338 Sep 04 01:24:20 AM UTC 24 Sep 04 01:47:21 AM UTC 24 490739579211 ps
T676 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_fsm_reset.4244288696 Sep 04 01:33:50 AM UTC 24 Sep 04 01:47:29 AM UTC 24 123281498699 ps
T677 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt_fixed.3013847715 Sep 04 01:38:04 AM UTC 24 Sep 04 01:47:29 AM UTC 24 166826493191 ps
T678 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt.2164565393 Sep 04 01:45:16 AM UTC 24 Sep 04 01:47:36 AM UTC 24 166636442268 ps
T330 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_both.4245587903 Sep 04 01:37:36 AM UTC 24 Sep 04 01:47:37 AM UTC 24 520924432393 ps
T679 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_alert_test.972436336 Sep 04 01:47:37 AM UTC 24 Sep 04 01:47:39 AM UTC 24 542433454 ps
T680 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_fsm_reset.369811212 Sep 04 01:40:53 AM UTC 24 Sep 04 01:47:45 AM UTC 24 81009095793 ps
T681 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled_fixed.1309073707 Sep 04 01:45:15 AM UTC 24 Sep 04 01:47:48 AM UTC 24 162161847527 ps
T682 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_smoke.2527563737 Sep 04 01:47:39 AM UTC 24 Sep 04 01:47:53 AM UTC 24 6055289252 ps
T358 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.3640289199 Sep 04 01:28:55 AM UTC 24 Sep 04 01:47:55 AM UTC 24 495643879604 ps
T683 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled_fixed.4280035557 Sep 04 01:46:32 AM UTC 24 Sep 04 01:47:58 AM UTC 24 167891103348 ps
T684 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_lowpower_counter.2405772847 Sep 04 01:47:07 AM UTC 24 Sep 04 01:48:05 AM UTC 24 37324068672 ps
T685 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled.1257011070 Sep 04 01:46:28 AM UTC 24 Sep 04 01:48:09 AM UTC 24 162025933900 ps
T686 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all_with_rand_reset.497753062 Sep 04 01:47:29 AM UTC 24 Sep 04 01:48:10 AM UTC 24 21598195118 ps
T186 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_both.372943449 Sep 04 01:42:34 AM UTC 24 Sep 04 01:48:14 AM UTC 24 500461673589 ps
T687 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_poweron_counter.2735435005 Sep 04 01:48:11 AM UTC 24 Sep 04 01:48:17 AM UTC 24 3798105610 ps
T688 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_fsm_reset.1687256480 Sep 04 01:34:40 AM UTC 24 Sep 04 01:48:18 AM UTC 24 115595306412 ps
T689 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_clock_gating.198400253 Sep 04 01:38:19 AM UTC 24 Sep 04 01:48:21 AM UTC 24 514167642971 ps
T690 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup_fixed.2964127956 Sep 04 01:40:30 AM UTC 24 Sep 04 01:48:22 AM UTC 24 406931471566 ps
T691 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_fsm_reset.148713144 Sep 04 01:35:38 AM UTC 24 Sep 04 01:48:25 AM UTC 24 125950958700 ps
T692 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_alert_test.4290417904 Sep 04 01:48:23 AM UTC 24 Sep 04 01:48:25 AM UTC 24 395967505 ps
T337 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup.1115661739 Sep 04 01:46:45 AM UTC 24 Sep 04 01:48:33 AM UTC 24 177007669548 ps
T693 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt_fixed.1735111685 Sep 04 01:41:47 AM UTC 24 Sep 04 01:48:35 AM UTC 24 165065475472 ps
T694 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_smoke.934169931 Sep 04 01:48:26 AM UTC 24 Sep 04 01:48:49 AM UTC 24 5783230296 ps
T695 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.1965716669 Sep 04 01:29:46 AM UTC 24 Sep 04 01:48:51 AM UTC 24 532812684496 ps
T696 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup.1191619470 Sep 04 01:45:19 AM UTC 24 Sep 04 01:48:56 AM UTC 24 352409827871 ps
T269 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup.1183727473 Sep 04 01:44:15 AM UTC 24 Sep 04 01:49:07 AM UTC 24 170548028569 ps
T697 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all_with_rand_reset.513695782 Sep 04 01:48:18 AM UTC 24 Sep 04 01:49:07 AM UTC 24 5030195192 ps
T698 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled.24788452 Sep 04 01:47:40 AM UTC 24 Sep 04 01:49:12 AM UTC 24 168886082933 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all.556153064 Sep 04 01:46:07 AM UTC 24 Sep 04 01:49:16 AM UTC 24 163317581308 ps
T699 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all.3480664146 Sep 04 01:48:23 AM UTC 24 Sep 04 01:49:17 AM UTC 24 92186621813 ps
T700 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_poweron_counter.3829931657 Sep 04 01:49:13 AM UTC 24 Sep 04 01:49:19 AM UTC 24 3266339784 ps
T701 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_both.2642373932 Sep 04 01:44:38 AM UTC 24 Sep 04 01:49:26 AM UTC 24 346759169256 ps
T702 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all_with_rand_reset.1826604403 Sep 04 01:49:20 AM UTC 24 Sep 04 01:49:35 AM UTC 24 8616088516 ps
T703 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_alert_test.1648712256 Sep 04 01:49:36 AM UTC 24 Sep 04 01:49:39 AM UTC 24 318493290 ps
T704 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_smoke.2870431736 Sep 04 01:49:40 AM UTC 24 Sep 04 01:49:46 AM UTC 24 6077354115 ps
T705 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled_fixed.209316872 Sep 04 01:43:28 AM UTC 24 Sep 04 01:49:48 AM UTC 24 489612741083 ps
T706 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_lowpower_counter.3304861068 Sep 04 01:48:14 AM UTC 24 Sep 04 01:49:58 AM UTC 24 38147692850 ps
T707 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt_fixed.3432224243 Sep 04 01:46:45 AM UTC 24 Sep 04 01:50:06 AM UTC 24 490606100659 ps
T363 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.2468434700 Sep 04 01:34:00 AM UTC 24 Sep 04 01:50:07 AM UTC 24 362464922646 ps
T708 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled_fixed.4111625043 Sep 04 01:48:34 AM UTC 24 Sep 04 01:50:28 AM UTC 24 323050592524 ps
T709 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup_fixed.827214806 Sep 04 01:42:01 AM UTC 24 Sep 04 01:50:52 AM UTC 24 593845616555 ps
T710 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt.3619736273 Sep 04 01:44:02 AM UTC 24 Sep 04 01:51:01 AM UTC 24 163763295852 ps
T711 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.2862591366 Sep 04 01:29:12 AM UTC 24 Sep 04 01:51:03 AM UTC 24 491570880986 ps
T712 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt_fixed.2759316761 Sep 04 01:50:07 AM UTC 24 Sep 04 01:51:03 AM UTC 24 162709323015 ps
T713 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled_fixed.3304962228 Sep 04 01:34:59 AM UTC 24 Sep 04 01:51:11 AM UTC 24 330713305123 ps
T714 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_lowpower_counter.2928096019 Sep 04 01:51:05 AM UTC 24 Sep 04 01:51:17 AM UTC 24 41880785304 ps
T715 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_poweron_counter.2459314114 Sep 04 01:51:03 AM UTC 24 Sep 04 01:51:23 AM UTC 24 4463812981 ps
T716 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all_with_rand_reset.3434129726 Sep 04 01:51:18 AM UTC 24 Sep 04 01:51:42 AM UTC 24 5635380319 ps
T717 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_clock_gating.2863136768 Sep 04 01:46:49 AM UTC 24 Sep 04 01:51:45 AM UTC 24 163841201437 ps
T718 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_alert_test.4165662676 Sep 04 01:51:43 AM UTC 24 Sep 04 01:51:45 AM UTC 24 328490339 ps
T719 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_lowpower_counter.767731088 Sep 04 01:49:17 AM UTC 24 Sep 04 01:51:45 AM UTC 24 36115419358 ps
T720 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt_fixed.3289459966 Sep 04 01:45:17 AM UTC 24 Sep 04 01:51:48 AM UTC 24 166603567096 ps
T367 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_clock_gating.3643184639 Sep 04 01:49:08 AM UTC 24 Sep 04 01:51:48 AM UTC 24 356607029635 ps
T271 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all.1843735349 Sep 04 01:33:02 AM UTC 24 Sep 04 01:51:54 AM UTC 24 438025720271 ps
T721 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_smoke.3989720138 Sep 04 01:51:45 AM UTC 24 Sep 04 01:52:12 AM UTC 24 5880132863 ps
T253 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all.3557988857 Sep 04 01:47:30 AM UTC 24 Sep 04 01:52:26 AM UTC 24 353739316287 ps
T722 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled_fixed.1820196370 Sep 04 01:49:48 AM UTC 24 Sep 04 01:52:30 AM UTC 24 168980286951 ps
T368 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt.1880470388 Sep 04 01:49:58 AM UTC 24 Sep 04 01:52:30 AM UTC 24 165596015093 ps
T723 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt.1439699587 Sep 04 01:38:01 AM UTC 24 Sep 04 01:52:36 AM UTC 24 329032807855 ps
T724 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt_fixed.4288657181 Sep 04 01:47:54 AM UTC 24 Sep 04 01:52:41 AM UTC 24 481530367399 ps
T725 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_poweron_counter.3840893505 Sep 04 01:52:32 AM UTC 24 Sep 04 01:52:48 AM UTC 24 3364004139 ps
T726 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup.161734781 Sep 04 01:47:56 AM UTC 24 Sep 04 01:53:16 AM UTC 24 550319598538 ps
T727 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all_with_rand_reset.4282030401 Sep 04 01:52:49 AM UTC 24 Sep 04 01:53:21 AM UTC 24 3945883074 ps
T728 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_lowpower_counter.3549318881 Sep 04 01:52:37 AM UTC 24 Sep 04 01:53:22 AM UTC 24 38047446448 ps
T729 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_alert_test.1157618025 Sep 04 01:53:21 AM UTC 24 Sep 04 01:53:23 AM UTC 24 419377158 ps
T730 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all.2648291398 Sep 04 01:34:47 AM UTC 24 Sep 04 01:53:27 AM UTC 24 496363131913 ps
T731 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_smoke.2797090523 Sep 04 01:53:22 AM UTC 24 Sep 04 01:53:34 AM UTC 24 5692657222 ps
T732 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup_fixed.132874997 Sep 04 01:47:58 AM UTC 24 Sep 04 01:53:47 AM UTC 24 604876060869 ps
T733 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt.2698099253 Sep 04 01:40:03 AM UTC 24 Sep 04 01:53:49 AM UTC 24 327815269729 ps
T734 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all.1331371863 Sep 04 01:45:06 AM UTC 24 Sep 04 01:54:04 AM UTC 24 332761752831 ps
T338 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_clock_gating.1323446467 Sep 04 01:37:34 AM UTC 24 Sep 04 01:54:10 AM UTC 24 370749642080 ps
T210 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled.1091922608 Sep 04 01:51:46 AM UTC 24 Sep 04 01:54:11 AM UTC 24 496866798062 ps
T735 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_fsm_reset.3111351089 Sep 04 01:48:17 AM UTC 24 Sep 04 01:54:14 AM UTC 24 62890702491 ps
T736 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled.739631424 Sep 04 01:48:26 AM UTC 24 Sep 04 01:54:14 AM UTC 24 484203586262 ps
T737 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup.1647704847 Sep 04 01:48:52 AM UTC 24 Sep 04 01:54:17 AM UTC 24 355646501402 ps
T738 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_poweron_counter.1280941125 Sep 04 01:54:15 AM UTC 24 Sep 04 01:54:22 AM UTC 24 4532500267 ps
T82 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all_with_rand_reset.2848794485 Sep 04 01:54:22 AM UTC 24 Sep 04 01:54:39 AM UTC 24 18745708640 ps
T739 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_both.1859160658 Sep 04 01:45:32 AM UTC 24 Sep 04 01:54:49 AM UTC 24 164357871619 ps
T740 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all.2724719399 Sep 04 01:41:20 AM UTC 24 Sep 04 01:54:52 AM UTC 24 322780321799 ps
T741 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_alert_test.1320288516 Sep 04 01:54:50 AM UTC 24 Sep 04 01:54:53 AM UTC 24 342141430 ps
T305 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_both.201489902 Sep 04 01:49:08 AM UTC 24 Sep 04 01:54:53 AM UTC 24 531496146250 ps
T742 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup_fixed.1994236953 Sep 04 01:45:29 AM UTC 24 Sep 04 01:55:01 AM UTC 24 196427560024 ps
T743 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_smoke.3343916387 Sep 04 01:54:52 AM UTC 24 Sep 04 01:55:07 AM UTC 24 5917816292 ps
T187 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_clock_gating.397835429 Sep 04 01:48:06 AM UTC 24 Sep 04 01:55:11 AM UTC 24 541101448498 ps
T744 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all.113276001 Sep 04 01:53:17 AM UTC 24 Sep 04 01:55:33 AM UTC 24 188892209391 ps
T745 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_fsm_reset.559873331 Sep 04 01:42:59 AM UTC 24 Sep 04 01:55:37 AM UTC 24 117594803391 ps
T746 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_lowpower_counter.4255812095 Sep 04 01:54:15 AM UTC 24 Sep 04 01:55:41 AM UTC 24 34528709320 ps
T747 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_fsm_reset.357141199 Sep 04 01:47:22 AM UTC 24 Sep 04 01:56:03 AM UTC 24 82943664497 ps
T748 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt.10782060 Sep 04 01:55:03 AM UTC 24 Sep 04 01:56:06 AM UTC 24 163730180008 ps
T749 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_poweron_counter.3744069014 Sep 04 01:56:04 AM UTC 24 Sep 04 01:56:08 AM UTC 24 4501067211 ps
T750 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled.1604413216 Sep 04 01:49:47 AM UTC 24 Sep 04 01:56:13 AM UTC 24 163037864151 ps
T751 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all_with_rand_reset.2453180992 Sep 04 01:56:14 AM UTC 24 Sep 04 01:56:26 AM UTC 24 2507146247 ps
T752 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup_fixed.3881789213 Sep 04 01:50:29 AM UTC 24 Sep 04 01:56:28 AM UTC 24 594330313826 ps
T753 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_alert_test.896057290 Sep 04 01:56:28 AM UTC 24 Sep 04 01:56:31 AM UTC 24 457613452 ps
T754 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_lowpower_counter.3522891679 Sep 04 01:56:07 AM UTC 24 Sep 04 01:56:34 AM UTC 24 37028580929 ps
T755 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt_fixed.1754317567 Sep 04 01:55:08 AM UTC 24 Sep 04 01:56:41 AM UTC 24 327260537453 ps
T756 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_fsm_reset.1363478946 Sep 04 01:45:04 AM UTC 24 Sep 04 01:56:52 AM UTC 24 116019042220 ps
T757 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_fsm_reset.3218643064 Sep 04 01:45:52 AM UTC 24 Sep 04 01:56:58 AM UTC 24 93118692841 ps
T758 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all.795236424 Sep 04 01:51:24 AM UTC 24 Sep 04 01:56:59 AM UTC 24 345929143274 ps
T329 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt.3362868255 Sep 04 01:48:36 AM UTC 24 Sep 04 01:57:01 AM UTC 24 488519568817 ps
T759 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt.2924808034 Sep 04 01:53:34 AM UTC 24 Sep 04 01:57:08 AM UTC 24 330370216648 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_both.4277723470 Sep 04 01:34:22 AM UTC 24 Sep 04 01:57:13 AM UTC 24 491707820198 ps
T760 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled.2597539238 Sep 04 01:39:43 AM UTC 24 Sep 04 01:57:14 AM UTC 24 328766078107 ps
T761 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup_fixed.520550469 Sep 04 01:38:15 AM UTC 24 Sep 04 01:57:25 AM UTC 24 404645070639 ps
T762 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled_fixed.3482029235 Sep 04 01:51:46 AM UTC 24 Sep 04 01:57:32 AM UTC 24 493464510060 ps
T211 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_clock_gating.2118346706 Sep 04 01:52:27 AM UTC 24 Sep 04 01:57:32 AM UTC 24 520655454026 ps
T763 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_fsm_reset.267215642 Sep 04 01:51:13 AM UTC 24 Sep 04 01:57:38 AM UTC 24 92576932424 ps
T764 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled.2477891946 Sep 04 01:54:53 AM UTC 24 Sep 04 01:57:41 AM UTC 24 327286988000 ps
T356 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_both.3132868734 Sep 04 01:35:21 AM UTC 24 Sep 04 01:57:48 AM UTC 24 496726362799 ps
T765 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_fsm_reset.2543071396 Sep 04 01:49:18 AM UTC 24 Sep 04 01:58:03 AM UTC 24 103508913626 ps
T766 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_both.4225494186 Sep 04 01:52:31 AM UTC 24 Sep 04 01:58:16 AM UTC 24 493970696759 ps
T767 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled_fixed.3539298084 Sep 04 01:54:54 AM UTC 24 Sep 04 01:58:26 AM UTC 24 323127225541 ps
T768 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt_fixed.3243664118 Sep 04 01:51:49 AM UTC 24 Sep 04 01:58:34 AM UTC 24 492168660511 ps
T769 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup_fixed.3891707716 Sep 04 01:52:14 AM UTC 24 Sep 04 01:58:42 AM UTC 24 583429500904 ps
T770 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_clock_gating.1461642939 Sep 04 01:54:11 AM UTC 24 Sep 04 01:58:45 AM UTC 24 199220381861 ps
T771 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_clock_gating.2308974340 Sep 04 01:40:36 AM UTC 24 Sep 04 01:58:46 AM UTC 24 363517877297 ps
T772 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt_fixed.1479385000 Sep 04 01:48:50 AM UTC 24 Sep 04 01:58:47 AM UTC 24 170009514803 ps
T773 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled.4268184191 Sep 04 01:53:24 AM UTC 24 Sep 04 01:59:15 AM UTC 24 496683692053 ps
T256 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_both.1815021063 Sep 04 01:54:12 AM UTC 24 Sep 04 01:59:41 AM UTC 24 499052538120 ps
T774 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled.2859647125 Sep 04 01:45:13 AM UTC 24 Sep 04 01:59:58 AM UTC 24 335332329188 ps
T775 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all.1956198894 Sep 04 01:43:05 AM UTC 24 Sep 04 02:00:05 AM UTC 24 324550793539 ps
T776 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup_fixed.314633023 Sep 04 01:48:57 AM UTC 24 Sep 04 02:00:20 AM UTC 24 204909979319 ps
T777 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled_fixed.3655109487 Sep 04 01:53:27 AM UTC 24 Sep 04 02:00:27 AM UTC 24 479010298486 ps
T778 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup.3626342543 Sep 04 01:53:50 AM UTC 24 Sep 04 02:00:38 AM UTC 24 652412680932 ps
T779 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup_fixed.3940545955 Sep 04 01:35:20 AM UTC 24 Sep 04 02:00:44 AM UTC 24 606268984819 ps
T780 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_fsm_reset.264867910 Sep 04 01:52:42 AM UTC 24 Sep 04 02:01:09 AM UTC 24 82977109664 ps
T781 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt.2105117229 Sep 04 01:51:48 AM UTC 24 Sep 04 02:01:19 AM UTC 24 162342906129 ps
T782 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_both.3739034261 Sep 04 01:46:51 AM UTC 24 Sep 04 02:02:02 AM UTC 24 340818826860 ps
T366 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_clock_gating.2632520371 Sep 04 01:50:52 AM UTC 24 Sep 04 02:02:04 AM UTC 24 330700588050 ps
T783 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup_fixed.3719400657 Sep 04 01:46:49 AM UTC 24 Sep 04 02:02:17 AM UTC 24 406563412319 ps
T784 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt_fixed.1097158301 Sep 04 01:44:03 AM UTC 24 Sep 04 02:02:36 AM UTC 24 493095812671 ps
T785 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_fsm_reset.2943546154 Sep 04 01:54:18 AM UTC 24 Sep 04 02:03:00 AM UTC 24 95501537844 ps
T786 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup.1633174041 Sep 04 01:50:08 AM UTC 24 Sep 04 02:03:01 AM UTC 24 538872912026 ps
T235 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all.2873521909 Sep 04 01:37:52 AM UTC 24 Sep 04 02:03:29 AM UTC 24 232060551644 ps
T787 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup.1758381491 Sep 04 01:51:54 AM UTC 24 Sep 04 02:03:32 AM UTC 24 252021157029 ps
T788 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled.980325864 Sep 04 01:37:58 AM UTC 24 Sep 04 02:03:51 AM UTC 24 496650803856 ps
T789 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt_fixed.2879768565 Sep 04 01:53:48 AM UTC 24 Sep 04 02:04:22 AM UTC 24 492200116663 ps
T790 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_fsm_reset.4071529997 Sep 04 01:56:08 AM UTC 24 Sep 04 02:04:51 AM UTC 24 87764105210 ps
T791 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_clock_gating.2226800086 Sep 04 01:42:09 AM UTC 24 Sep 04 02:05:14 AM UTC 24 604582779523 ps
T169 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all.3194053425 Sep 04 01:36:54 AM UTC 24 Sep 04 02:05:49 AM UTC 24 598874603646 ps
T792 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_clock_gating.1753431685 Sep 04 01:45:31 AM UTC 24 Sep 04 02:06:44 AM UTC 24 494973093155 ps
T233 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all.2987418220 Sep 04 01:54:40 AM UTC 24 Sep 04 02:07:59 AM UTC 24 424438144207 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt.1622566049 Sep 04 01:41:46 AM UTC 24 Sep 04 02:08:14 AM UTC 24 492188752614 ps
T793 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup_fixed.1927523993 Sep 04 01:44:16 AM UTC 24 Sep 04 02:09:52 AM UTC 24 595110807114 ps
T794 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt.2991867224 Sep 04 01:46:39 AM UTC 24 Sep 04 02:10:23 AM UTC 24 498920086069 ps
T226 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all.1698854490 Sep 04 01:49:27 AM UTC 24 Sep 04 02:10:29 AM UTC 24 296764934601 ps
T795 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled_fixed.337366927 Sep 04 01:47:46 AM UTC 24 Sep 04 02:11:13 AM UTC 24 484845302528 ps
T796 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt.3838680650 Sep 04 01:47:48 AM UTC 24 Sep 04 02:11:16 AM UTC 24 493104068172 ps
T170 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_both.2474986059 Sep 04 01:55:42 AM UTC 24 Sep 04 02:12:43 AM UTC 24 328366699668 ps
T341 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup.3478058867 Sep 04 01:40:06 AM UTC 24 Sep 04 02:13:54 AM UTC 24 634845554775 ps
T267 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_both.1235674164 Sep 04 01:48:09 AM UTC 24 Sep 04 02:14:10 AM UTC 24 563099996411 ps
T369 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_both.2566425639 Sep 04 01:51:01 AM UTC 24 Sep 04 02:15:21 AM UTC 24 506449411473 ps
T272 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup.2627429355 Sep 04 01:55:12 AM UTC 24 Sep 04 02:17:08 AM UTC 24 560100404318 ps
T797 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_clock_gating.528442243 Sep 04 01:55:38 AM UTC 24 Sep 04 02:18:16 AM UTC 24 537203709163 ps
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