Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.62 99.07 96.67 100.00 100.00 98.83 98.33 90.47


Total tests in report: 918
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
58.87 58.87 89.51 89.51 55.78 55.78 82.70 82.70 27.03 27.03 76.51 76.51 72.62 72.62 7.94 7.94 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_stress_all_with_rand_reset.2629968620
78.30 19.43 98.33 8.82 90.70 34.91 95.26 12.56 54.05 27.03 97.22 20.70 92.32 19.70 20.24 12.30 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_clock_gating.4212213383
81.54 3.23 98.33 0.00 90.78 0.08 95.26 0.00 75.68 21.62 97.28 0.06 92.32 0.00 21.11 0.87 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_fsm_reset.2273297227
84.27 2.74 98.67 0.34 92.42 1.65 95.26 0.00 89.19 13.51 97.90 0.62 93.16 0.83 23.31 2.20 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_stress_all.3587734773
85.85 1.57 98.67 0.00 93.25 0.82 95.26 0.00 89.19 0.00 98.02 0.12 93.66 0.50 32.87 9.56 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_both.1410921641
87.16 1.32 98.89 0.22 93.82 0.58 97.16 1.90 91.89 2.70 98.45 0.43 93.82 0.17 36.09 3.22 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_stress_all_with_rand_reset.454505599
88.31 1.15 98.89 0.00 93.82 0.00 97.16 0.00 91.89 0.00 98.45 0.00 94.66 0.83 43.30 7.21 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_clock_gating.3610634466
89.20 0.89 98.89 0.00 93.82 0.00 97.16 0.00 91.89 0.00 98.45 0.00 94.99 0.33 49.21 5.91 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.2830265223
90.01 0.80 98.89 0.00 93.82 0.00 97.16 0.00 94.59 2.70 98.45 0.00 94.99 0.00 52.13 2.92 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_stress_all.2447568638
90.69 0.68 98.89 0.00 93.99 0.16 97.16 0.00 94.59 0.00 98.58 0.12 95.16 0.17 56.45 4.32 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_polled.1383426563
91.23 0.55 98.89 0.00 93.99 0.00 97.16 0.00 94.59 0.00 98.58 0.00 95.16 0.00 60.27 3.82 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_both.1436396946
91.73 0.49 98.89 0.00 93.99 0.00 97.16 0.00 94.59 0.00 98.58 0.00 95.33 0.17 63.56 3.29 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_interrupt.389185945
92.19 0.46 98.89 0.00 95.35 1.36 97.63 0.47 94.59 0.00 98.64 0.06 95.99 0.67 64.21 0.65 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_tl_errors.3402979856
92.64 0.45 98.89 0.00 95.35 0.00 97.63 0.00 97.30 2.70 98.64 0.00 96.16 0.17 64.51 0.30 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_stress_all.1902360748
93.09 0.45 98.92 0.03 95.47 0.12 99.76 2.13 97.30 0.00 98.70 0.06 96.83 0.67 64.64 0.12 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_sec_cm.1244883569
93.51 0.42 98.92 0.00 95.47 0.00 99.76 0.00 97.30 0.00 98.70 0.00 96.83 0.00 67.61 2.97 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_both.4110724324
93.93 0.41 98.92 0.00 95.47 0.00 99.76 0.00 97.30 0.00 98.70 0.00 96.83 0.00 70.50 2.89 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_both.256941284
94.33 0.40 98.92 0.00 95.47 0.00 99.76 0.00 100.00 2.70 98.70 0.00 96.83 0.00 70.63 0.12 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_fsm_reset.3107597988
94.60 0.27 98.92 0.00 95.92 0.45 99.76 0.00 100.00 0.00 98.70 0.00 96.83 0.00 72.07 1.45 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_interrupt_fixed.1324203165
94.85 0.25 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 96.83 0.00 73.85 1.77 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_stress_all.415339772
95.06 0.21 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 96.83 0.00 75.29 1.45 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_wakeup.4069626437
95.25 0.19 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 96.83 0.00 76.64 1.35 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_clock_gating.1660309503
95.42 0.17 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 96.83 0.00 77.81 1.17 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_interrupt.2109577096
95.59 0.17 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 98.00 1.17 77.81 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_aliasing.1136136529
95.74 0.15 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 98.00 0.00 78.86 1.05 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_both.2848561465
95.88 0.14 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 98.00 0.00 79.84 0.97 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.3508085067
96.01 0.13 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 98.00 0.00 80.73 0.90 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_both.3737716623
96.12 0.12 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 98.00 0.00 81.56 0.82 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_both.1235674164
96.23 0.11 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 98.00 0.00 82.31 0.75 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_clock_gating.205271483
96.32 0.09 98.92 0.00 95.92 0.00 99.76 0.00 100.00 0.00 98.70 0.00 98.00 0.00 82.93 0.62 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.2226890481
96.41 0.09 98.98 0.06 96.17 0.25 99.76 0.00 100.00 0.00 98.83 0.12 98.16 0.17 82.93 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_same_csr_outstanding.382686939
96.48 0.07 98.98 0.00 96.17 0.00 99.76 0.00 100.00 0.00 98.83 0.00 98.16 0.00 83.45 0.52 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.3854892083
96.55 0.07 98.98 0.00 96.17 0.00 99.76 0.00 100.00 0.00 98.83 0.00 98.16 0.00 83.98 0.52 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_stress_all_with_rand_reset.3451935856
96.62 0.06 99.07 0.09 96.29 0.12 100.00 0.24 100.00 0.00 98.83 0.00 98.16 0.00 83.98 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_alert_test.1936556447
96.68 0.06 99.07 0.00 96.54 0.25 100.00 0.00 100.00 0.00 98.83 0.00 98.16 0.00 84.18 0.20 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_tl_intg_err.3576115081
96.75 0.06 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.17 84.45 0.27 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_clock_gating.2229628404
96.80 0.06 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 84.85 0.40 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.4052008772
96.86 0.05 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 85.23 0.37 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all.3712190320
96.91 0.05 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 85.60 0.37 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.1140071754
96.96 0.05 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 85.95 0.35 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_interrupt.3473730500
97.00 0.04 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 86.25 0.30 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_clock_gating.2134087693
97.05 0.04 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 86.55 0.30 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_stress_all_with_rand_reset.293297660
97.09 0.04 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 86.82 0.27 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_wakeup.2779931694
97.12 0.04 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 87.07 0.25 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt.483897314
97.16 0.04 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 87.32 0.25 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_stress_all.4054781583
97.19 0.03 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 87.55 0.22 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all.1843735349
97.22 0.03 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 87.75 0.20 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_both.556218078
97.25 0.03 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 87.95 0.20 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_clock_gating.397835429
97.27 0.02 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 88.12 0.17 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all_with_rand_reset.4093784187
97.30 0.02 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 88.30 0.17 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.935162560
97.32 0.02 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 88.45 0.15 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup.438669784
97.34 0.02 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 88.59 0.15 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup.2627429355
97.36 0.02 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 88.72 0.12 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_both.1750552854
97.37 0.02 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 88.84 0.12 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_clock_gating.3656030965
97.39 0.02 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 88.97 0.12 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all.2916948309
97.41 0.02 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.09 0.12 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all.556153064
97.43 0.02 99.07 0.00 96.54 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.22 0.12 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_wakeup.3608918516
97.44 0.02 99.07 0.00 96.67 0.12 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.22 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_tl_errors.311882984
97.46 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.32 0.10 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.1962509200
97.47 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.42 0.10 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all.3194053425
97.49 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.52 0.10 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all.3557988857
97.50 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.62 0.10 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_clock_gating.2632520371
97.51 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.69 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.3114783882
97.52 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.77 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_fsm_reset.2934246143
97.53 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.84 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.3731753099
97.54 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.92 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all_with_rand_reset.248768733
97.55 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 89.97 0.05 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_wakeup_fixed.2043022802
97.56 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.02 0.05 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_stress_all.3969707160
97.57 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.07 0.05 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.2407183510
97.57 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.12 0.05 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.36953446
97.58 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.17 0.05 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.3255324607
97.59 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.22 0.05 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.2468434700
97.59 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.27 0.05 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled.3371659341
97.60 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.29 0.02 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/15.adc_ctrl_tl_intg_err.925513712
97.60 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.32 0.02 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt.1997715192
97.61 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.34 0.02 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt.2612130245
97.61 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.37 0.02 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.191929229
97.61 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.39 0.02 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_both.4277723470
97.62 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.42 0.02 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup.3478058867
97.62 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.44 0.02 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt.3362868255
97.62 0.01 99.07 0.00 96.67 0.00 100.00 0.00 100.00 0.00 98.83 0.00 98.33 0.00 90.47 0.02 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all.2987418220

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_bit_bash.1377128042
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_hw_reset.1332986230
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_mem_rw_with_rand_reset.1356961126
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_rw.966539612
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_intr_test.2264114307
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_tl_intg_err.794759728
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_csr_aliasing.562251058
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_csr_bit_bash.773953229
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_csr_hw_reset.2661117469
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_csr_mem_rw_with_rand_reset.3399712819
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_csr_rw.3232273938
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_intr_test.1791334157
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_same_csr_outstanding.3026454090
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/10.adc_ctrl_csr_mem_rw_with_rand_reset.949125815
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/10.adc_ctrl_csr_rw.3528562474
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/10.adc_ctrl_intr_test.152116957
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/10.adc_ctrl_same_csr_outstanding.3274178748
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/10.adc_ctrl_tl_errors.3717482140
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/10.adc_ctrl_tl_intg_err.2961034121
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/11.adc_ctrl_csr_mem_rw_with_rand_reset.3675921023
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/11.adc_ctrl_csr_rw.760044970
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/11.adc_ctrl_intr_test.3009784553
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/11.adc_ctrl_same_csr_outstanding.1730719161
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/11.adc_ctrl_tl_errors.432679474
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/11.adc_ctrl_tl_intg_err.2676930762
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/12.adc_ctrl_csr_mem_rw_with_rand_reset.2688557577
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/12.adc_ctrl_csr_rw.4293633560
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/12.adc_ctrl_intr_test.1468033840
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/12.adc_ctrl_same_csr_outstanding.1503616659
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/12.adc_ctrl_tl_errors.1522916307
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/12.adc_ctrl_tl_intg_err.3705404329
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/13.adc_ctrl_csr_mem_rw_with_rand_reset.1312062833
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/13.adc_ctrl_csr_rw.2861300431
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/13.adc_ctrl_intr_test.761439094
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/13.adc_ctrl_same_csr_outstanding.2111574978
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/13.adc_ctrl_tl_errors.904265323
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/13.adc_ctrl_tl_intg_err.732909325
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/14.adc_ctrl_csr_mem_rw_with_rand_reset.1077040789
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/14.adc_ctrl_csr_rw.439683793
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/14.adc_ctrl_intr_test.1901197714
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/14.adc_ctrl_same_csr_outstanding.2492356004
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/14.adc_ctrl_tl_errors.82354377
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/14.adc_ctrl_tl_intg_err.3601414591
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/15.adc_ctrl_csr_mem_rw_with_rand_reset.2583366035
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/15.adc_ctrl_csr_rw.206953768
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/15.adc_ctrl_intr_test.110881039
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/15.adc_ctrl_same_csr_outstanding.287169852
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/15.adc_ctrl_tl_errors.2410573581
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/16.adc_ctrl_csr_mem_rw_with_rand_reset.3592025008
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/16.adc_ctrl_csr_rw.2989456257
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/16.adc_ctrl_intr_test.1711999215
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/16.adc_ctrl_same_csr_outstanding.2153121668
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/16.adc_ctrl_tl_errors.1732445801
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/16.adc_ctrl_tl_intg_err.1886050708
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/17.adc_ctrl_csr_mem_rw_with_rand_reset.3570769264
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/17.adc_ctrl_csr_rw.3976333474
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/17.adc_ctrl_intr_test.3313794870
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/17.adc_ctrl_same_csr_outstanding.3691497653
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/17.adc_ctrl_tl_errors.292334514
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/17.adc_ctrl_tl_intg_err.272823462
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/18.adc_ctrl_csr_mem_rw_with_rand_reset.1660699742
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/18.adc_ctrl_csr_rw.1728138488
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/18.adc_ctrl_intr_test.1429123869
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/18.adc_ctrl_same_csr_outstanding.4034809290
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/18.adc_ctrl_tl_errors.1707068224
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/18.adc_ctrl_tl_intg_err.4066186326
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/19.adc_ctrl_csr_mem_rw_with_rand_reset.2562563381
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/19.adc_ctrl_csr_rw.960708643
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/19.adc_ctrl_intr_test.3667176768
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/19.adc_ctrl_same_csr_outstanding.3709814001
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/19.adc_ctrl_tl_errors.3265790250
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/19.adc_ctrl_tl_intg_err.3945480400
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/2.adc_ctrl_csr_aliasing.2046668114
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/2.adc_ctrl_csr_bit_bash.1241837071
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/2.adc_ctrl_csr_hw_reset.3755070002
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/2.adc_ctrl_csr_mem_rw_with_rand_reset.2456822318
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/2.adc_ctrl_csr_rw.1976671774
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/2.adc_ctrl_intr_test.1123820134
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/2.adc_ctrl_same_csr_outstanding.465779219
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/2.adc_ctrl_tl_errors.3025569439
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/2.adc_ctrl_tl_intg_err.1244000580
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/20.adc_ctrl_intr_test.3204770079
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/21.adc_ctrl_intr_test.423637185
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/22.adc_ctrl_intr_test.862602607
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/23.adc_ctrl_intr_test.3927652972
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/24.adc_ctrl_intr_test.3565499645
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/25.adc_ctrl_intr_test.3461014661
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/26.adc_ctrl_intr_test.3104835447
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/27.adc_ctrl_intr_test.2488290022
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/28.adc_ctrl_intr_test.2866345423
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/29.adc_ctrl_intr_test.1368266476
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/3.adc_ctrl_csr_aliasing.1276722406
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/3.adc_ctrl_csr_bit_bash.563872270
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/3.adc_ctrl_csr_hw_reset.4289342752
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/3.adc_ctrl_csr_mem_rw_with_rand_reset.1816678049
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/3.adc_ctrl_csr_rw.2250044271
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/3.adc_ctrl_intr_test.860095563
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/3.adc_ctrl_same_csr_outstanding.2076401051
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/3.adc_ctrl_tl_errors.3789805511
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/3.adc_ctrl_tl_intg_err.68219430
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/30.adc_ctrl_intr_test.2968207764
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/31.adc_ctrl_intr_test.4212110500
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/32.adc_ctrl_intr_test.523993680
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/33.adc_ctrl_intr_test.4240183054
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/34.adc_ctrl_intr_test.262177113
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/35.adc_ctrl_intr_test.2201579892
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/36.adc_ctrl_intr_test.2101904982
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/37.adc_ctrl_intr_test.3609348494
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/38.adc_ctrl_intr_test.1061674912
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/39.adc_ctrl_intr_test.1690060590
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/4.adc_ctrl_csr_aliasing.1163662647
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/4.adc_ctrl_csr_bit_bash.664357420
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/4.adc_ctrl_csr_hw_reset.943880814
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/4.adc_ctrl_csr_mem_rw_with_rand_reset.3197641541
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/4.adc_ctrl_csr_rw.1348615199
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/4.adc_ctrl_intr_test.770373732
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/4.adc_ctrl_same_csr_outstanding.3091065068
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/4.adc_ctrl_tl_errors.570717908
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/4.adc_ctrl_tl_intg_err.1359426436
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/40.adc_ctrl_intr_test.1335250767
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/41.adc_ctrl_intr_test.2448595962
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/42.adc_ctrl_intr_test.2660388437
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/43.adc_ctrl_intr_test.3441241454
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/44.adc_ctrl_intr_test.380139156
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/45.adc_ctrl_intr_test.4230364611
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/46.adc_ctrl_intr_test.982364195
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/47.adc_ctrl_intr_test.1919810806
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/48.adc_ctrl_intr_test.2017838214
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/49.adc_ctrl_intr_test.2519145199
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/5.adc_ctrl_csr_mem_rw_with_rand_reset.1221646590
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/5.adc_ctrl_csr_rw.2415860697
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/5.adc_ctrl_intr_test.3705185929
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/5.adc_ctrl_same_csr_outstanding.3295369572
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/5.adc_ctrl_tl_errors.2676822367
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/5.adc_ctrl_tl_intg_err.3589054768
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/6.adc_ctrl_csr_mem_rw_with_rand_reset.3021340320
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/6.adc_ctrl_csr_rw.1056638828
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/6.adc_ctrl_intr_test.567949773
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/6.adc_ctrl_same_csr_outstanding.1328816147
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/6.adc_ctrl_tl_errors.4115930690
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/6.adc_ctrl_tl_intg_err.2865286016
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/7.adc_ctrl_csr_mem_rw_with_rand_reset.335278289
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/7.adc_ctrl_csr_rw.3010037426
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/7.adc_ctrl_intr_test.1054939726
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/7.adc_ctrl_same_csr_outstanding.2048409712
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/7.adc_ctrl_tl_errors.2170557959
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/7.adc_ctrl_tl_intg_err.4190986652
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/8.adc_ctrl_csr_mem_rw_with_rand_reset.609342145
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/8.adc_ctrl_csr_rw.3739681405
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/8.adc_ctrl_intr_test.4127896493
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/8.adc_ctrl_same_csr_outstanding.3835229154
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/8.adc_ctrl_tl_errors.4122914110
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/8.adc_ctrl_tl_intg_err.1530700509
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/9.adc_ctrl_csr_mem_rw_with_rand_reset.1464920746
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/9.adc_ctrl_csr_rw.2607833392
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/9.adc_ctrl_intr_test.2213083809
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/9.adc_ctrl_same_csr_outstanding.1231269036
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/9.adc_ctrl_tl_errors.1366935058
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/cover_reg_top/9.adc_ctrl_tl_intg_err.2353096756
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_clock_gating.2773568020
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_both.3067692825
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_polled.1866908532
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_polled_fixed.2063868958
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_wakeup.3154189100
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_lowpower_counter.3852800723
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_poweron_counter.3467673932
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_smoke.3257807107
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_stress_all.510831818
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_alert_test.1506302746
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_both.2052707281
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_interrupt.3780033875
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_interrupt_fixed.2518019420
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_polled.1945915927
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_polled_fixed.3758715285
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_wakeup.2964551225
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_wakeup_fixed.456207459
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_fsm_reset.2771333595
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_lowpower_counter.1616744130
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_poweron_counter.601703018
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_sec_cm.4268721243
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_smoke.812368439
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_alert_test.3379114897
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_clock_gating.2818192284
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_both.324654193
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_interrupt.954035114
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_interrupt_fixed.1854974547
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_polled.1885296699
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_polled_fixed.1650741316
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_wakeup.1026146219
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_wakeup_fixed.3352002178
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_fsm_reset.2935481822
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_lowpower_counter.510790331
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_poweron_counter.2378752912
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_smoke.3209247724
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all.1616379524
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all_with_rand_reset.1412005198
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_alert_test.2015173585
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_interrupt.2141867992
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_interrupt_fixed.2612446876
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_polled.4002354709
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_polled_fixed.1239057950
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_wakeup_fixed.1714040191
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_fsm_reset.528804710
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_lowpower_counter.1625404723
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_poweron_counter.2497937897
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_smoke.838114253
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_stress_all.817488479
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_stress_all_with_rand_reset.505322176
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_alert_test.1597875437
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_clock_gating.3054953560
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_interrupt.836895417
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_interrupt_fixed.615277083
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled.2842867650
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled_fixed.3977283119
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_wakeup.1394832824
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_wakeup_fixed.1697578126
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_fsm_reset.3677983170
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_lowpower_counter.590685087
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_poweron_counter.3073433105
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_smoke.1646965626
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_stress_all.3418590310
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_alert_test.688927145
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_clock_gating.2238516196
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_both.2860557684
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_interrupt.2644072236
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_interrupt_fixed.2085230477
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled.293160084
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled_fixed.1908967946
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup.612034231
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup_fixed.255734813
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_fsm_reset.3753360923
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_lowpower_counter.3313847302
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_poweron_counter.2285365035
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_smoke.2239452221
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_stress_all_with_rand_reset.3099507262
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_alert_test.2111059297
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_clock_gating.3645308717
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt_fixed.2087771369
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled.1006044165
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled_fixed.1325117069
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup.3507988866
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup_fixed.2882579245
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_fsm_reset.1077038221
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_lowpower_counter.2248113365
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_poweron_counter.3522454330
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_smoke.3249431786
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all_with_rand_reset.3094053474
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_alert_test.2599543763
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_clock_gating.3165186705
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt.1323787888
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt_fixed.3892209446
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled.1697511634
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled_fixed.3205772555
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup.4284046892
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup_fixed.4252248680
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_fsm_reset.427014115
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_lowpower_counter.1184540184
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_poweron_counter.2323684022
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_smoke.1816161512
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_stress_all.4246744444
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_stress_all_with_rand_reset.2276409874
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_alert_test.1773683516
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_both.2238825958
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt_fixed.1995096546
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled.3594967397
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled_fixed.3915923323
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.2077432541
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.3904957281
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_lowpower_counter.2248039905
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_poweron_counter.2012431762
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_smoke.1987684490
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all.2194532131
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all_with_rand_reset.4175540838
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_alert_test.1576484652
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_clock_gating.3766697699
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt_fixed.3562499877
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.4048580860
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled_fixed.1518539699
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup.3325353405
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.3205115526
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.107843261
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_lowpower_counter.2512336439
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_poweron_counter.3223303497
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_smoke.2589480423
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_stress_all.3511663426
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_stress_all_with_rand_reset.339693711
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_alert_test.1880680488
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_clock_gating.1557221396
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.2570884966
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt_fixed.3535669688
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.3999091640
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled_fixed.3715247094
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.3878380844
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.2709161163
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.3181916286
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_lowpower_counter.971494198
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_poweron_counter.1660169949
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_smoke.80476125
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.2456675117
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_alert_test.1408036396
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_clock_gating.207880300
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.1389836568
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.587283925
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.981004588
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled.554536708
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.4043413485
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup.1974283204
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.2636204810
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_lowpower_counter.2303674348
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_poweron_counter.3185519368
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_smoke.474262635
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.827956477
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all_with_rand_reset.1767105207
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_alert_test.2168036548
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_clock_gating.1679206461
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_interrupt.3554509464
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_interrupt_fixed.946557360
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_polled.2833335749
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_polled_fixed.1658656343
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_wakeup.3019112133
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_wakeup_fixed.4290670746
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_lowpower_counter.3027343364
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_poweron_counter.3293046038
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_sec_cm.2336405405
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_smoke.3275435323
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_stress_all.178388235
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_stress_all_with_rand_reset.3659287337
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.1064567419
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.3058454009
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.1923926051
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.1649867790
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.3442636949
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.3381306438
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.3773450837
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.1586848586
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.4292448975
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.602248636
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_smoke.2521642321
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.3409423349
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.1335831824
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.3189806026
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.74713628
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.456933069
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.2352890119
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.2640914515
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.700318250
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.3928418389
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.4261649711
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.3649415899
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.335848428
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.4251531750
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.2778087453
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.969810593
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.3498969178
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.1685546322
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.1995736116
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.939318002
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.79462398
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.1622938717
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.1642505053
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.2289903690
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.137011758
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.1936520569
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.1137463575
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.1579954124
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.137350719
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.1745609326
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.2972907584
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.2994182204
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.2717820593
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.874962168
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.1549348424
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.4208142326
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.3823575071
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.434656386
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.1807190498
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.406937768
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.41311938
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.301496669
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.2907529351
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.3481717291
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.1914953723
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.3470341404
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.3124880218
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt_fixed.3706776684
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.3318456079
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.1651948330
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.868273799
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.1790681077
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.635697155
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.3015131263
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.784272375
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.1859885790
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.2551152902
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.2641993037
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.3421031718
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.1154642876
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.2757892412
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.2425009580
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.3660918201
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.3903019645
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.3182323060
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.3561599780
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.347638573
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.2133809077
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.2125569997
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.2533787374
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.3886714343
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.1133702421
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.1482651295
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.2180180717
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.2429606919
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.4204245084
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.970854476
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.1445532047
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.2897989838
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.588014165
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.2028259609
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.853268062
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.2609823321
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.1066488544
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.1011045406
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.4261535186
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.3788044863
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.2730144363
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.372801626
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.1628685609
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.2192645700
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.3075256800
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.1710344691
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.3394870719
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.605128281
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.924196712
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.1963861663
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.1943606200
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.2188997269
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.2306724776
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.3505982911
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.3289478360
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.3014768054
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.85113172
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.1447409925
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled.289344338
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.4018162037
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.2258068809
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.2172939270
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.1570876493
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.182001127
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.1318637006
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.3919610297
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all.2463345214
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.712734356
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.3027618541
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.2614642503
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.1336469530
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.2312802344
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.3720507377
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.3499463332
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.1516758944
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.4214528115
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup_fixed.2382781217
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.354071510
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.1859223604
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.3888944527
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.2851709504
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.1591495159
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_alert_test.2182508633
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_clock_gating.2305389559
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_interrupt.3867136230
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_interrupt_fixed.1473451180
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_polled_fixed.1823762219
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_wakeup.197834192
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_wakeup_fixed.2305229130
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_fsm_reset.2973832025
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_lowpower_counter.1997809893
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_poweron_counter.2601684805
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_sec_cm.63588732
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_smoke.2331219151
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.1281654528
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.3232520951
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.3204563404
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt_fixed.3506226124
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.3932950735
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.3180140541
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.493883016
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.917003684
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.2170394660
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.4051374243
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.2007995850
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all.2853826869
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.538351910
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.3932694237
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.2174110213
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.1965716669
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.3640289199
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.2862591366
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled.1556971270
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled_fixed.146600915
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.288143768
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup_fixed.564461431
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.2681521615
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.3193658612
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.216407538
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.70285411
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all.3048400569
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.3975310384
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.2719135499
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.2812597613
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.338918276
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.851204707
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.3883200814
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.1549617474
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled_fixed.1826381941
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.196253204
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup_fixed.3191349979
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.2987081148
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.3244769328
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.3305859855
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.3909008915
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.234910885
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.908763801
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_both.3013362815
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.3982754151
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt_fixed.1374669258
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled.2939853508
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.2223404227
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup.1381026720
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup_fixed.1828318549
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_fsm_reset.4244288696
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.488999244
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.1459479880
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.2021734005
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.3206347362
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.577401115
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.4027819331
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt.3124101642
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt_fixed.421994504
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled_fixed.1789338312
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup.678647283
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup_fixed.1495445329
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_fsm_reset.1687256480
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.3759262745
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.1967763637
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.3240722965
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all.2648291398
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.35336982
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.1758479034
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_clock_gating.3249946218
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_both.3132868734
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt.385623911
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt_fixed.2541495555
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled.2606806306
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled_fixed.3304962228
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup.2657201823
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup_fixed.3940545955
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_fsm_reset.148713144
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.2810980246
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.1903574592
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.2623066362
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all.257275068
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.360044085
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.3520332746
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_both.2808976096
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt.116857120
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt_fixed.2144224472
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled.97634652
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled_fixed.3730023649
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup.2982784905
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup_fixed.4108651556
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_fsm_reset.540711863
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_lowpower_counter.1899249904
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.3881060719
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.547800307
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all_with_rand_reset.1651044607
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_alert_test.300776295
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_clock_gating.1323446467
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_both.4245587903
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt.1798702782
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt_fixed.3233079133
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled.2399194596
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled_fixed.386666068
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup.598418316
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup_fixed.851348679
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_fsm_reset.1049897824
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_lowpower_counter.2903476795
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_poweron_counter.3711920235
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_smoke.166271242
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all.2873521909
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all_with_rand_reset.3328312400
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_alert_test.2522199548
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_clock_gating.198400253
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_both.2093327206
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt.1439699587
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt_fixed.3013847715
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled.980325864
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled_fixed.2156380002
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup.1917967570
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup_fixed.520550469
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_fsm_reset.3952535060
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_lowpower_counter.3833776497
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_poweron_counter.590429376
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_smoke.823862967
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all_with_rand_reset.58860851
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_alert_test.76953069
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_clock_gating.2308974340
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_both.3128355275
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt.2698099253
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt_fixed.1282213468
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled.2597539238
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled_fixed.3350101503
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup_fixed.2964127956
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_fsm_reset.369811212
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_lowpower_counter.3123099954
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_poweron_counter.3225416002
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_smoke.1821682764
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all.2724719399
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_alert_test.2513938258
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_both.2180299402
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_interrupt_fixed.3686824038
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_polled.3727744350
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_polled_fixed.2061254532
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_wakeup.182121649
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_wakeup_fixed.363326770
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_fsm_reset.2027818974
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_lowpower_counter.2821761028
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_poweron_counter.2245790532
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_sec_cm.2539123068
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_smoke.3017614512
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_stress_all_with_rand_reset.2367265023
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_alert_test.3885379636
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_clock_gating.2226800086
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_both.372943449
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt.1622566049
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt_fixed.1735111685
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled.1469664778
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled_fixed.69489853
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup.3564852938
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup_fixed.827214806
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_fsm_reset.559873331
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_lowpower_counter.2795017913
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_poweron_counter.3508501698
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_smoke.659430451
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all.1956198894
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all_with_rand_reset.1731859484
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_alert_test.1773782663
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_clock_gating.310543822
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_both.2642373932
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt.3619736273
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt_fixed.1097158301
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled.1206332900
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled_fixed.209316872
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup.1183727473
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup_fixed.1927523993
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_fsm_reset.1363478946
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_lowpower_counter.4207985106
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_poweron_counter.1573915354
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_smoke.2531417906
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all.1331371863
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all_with_rand_reset.195399390
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_alert_test.2132402527
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_clock_gating.1753431685
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_both.1859160658
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt.2164565393
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt_fixed.3289459966
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled.2859647125
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled_fixed.1309073707
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup.1191619470
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup_fixed.1994236953
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_fsm_reset.3218643064
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_lowpower_counter.2418561395
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_poweron_counter.1400188904
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_smoke.1329036035
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all_with_rand_reset.3184857966
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_alert_test.972436336
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_clock_gating.2863136768
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_both.3739034261
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt.2991867224
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt_fixed.3432224243
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled.1257011070
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled_fixed.4280035557
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup.1115661739
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup_fixed.3719400657
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_fsm_reset.357141199
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_lowpower_counter.2405772847
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_poweron_counter.871039015
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_smoke.1240110489
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all_with_rand_reset.497753062
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_alert_test.4290417904
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt.3838680650
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt_fixed.4288657181
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled.24788452
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled_fixed.337366927
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup.161734781
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup_fixed.132874997
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_fsm_reset.3111351089
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_lowpower_counter.3304861068
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_poweron_counter.2735435005
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_smoke.2527563737
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all.3480664146
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all_with_rand_reset.513695782
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_alert_test.1648712256
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_clock_gating.3643184639
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_both.201489902
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt_fixed.1479385000
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled.739631424
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled_fixed.4111625043
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup.1647704847
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup_fixed.314633023
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_fsm_reset.2543071396
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_lowpower_counter.767731088
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_poweron_counter.3829931657
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_smoke.934169931
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all.1698854490
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all_with_rand_reset.1826604403
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_alert_test.4165662676
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_both.2566425639
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt.1880470388
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt_fixed.2759316761
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled.1604413216
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled_fixed.1820196370
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup.1633174041
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup_fixed.3881789213
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_fsm_reset.267215642
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_lowpower_counter.2928096019
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_poweron_counter.2459314114
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_smoke.2870431736
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all.795236424
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all_with_rand_reset.3434129726
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_alert_test.1157618025
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_clock_gating.2118346706
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_both.4225494186
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt.2105117229
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt_fixed.3243664118
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled.1091922608
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled_fixed.3482029235
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup.1758381491
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup_fixed.3891707716
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_fsm_reset.264867910
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_lowpower_counter.3549318881
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_poweron_counter.3840893505
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_smoke.3989720138
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all.113276001
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all_with_rand_reset.4282030401
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_alert_test.1320288516
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_clock_gating.1461642939
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_both.1815021063
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt.2924808034
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt_fixed.2879768565
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled.4268184191
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled_fixed.3655109487
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup.3626342543
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup_fixed.1639286814
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_fsm_reset.2943546154
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_lowpower_counter.4255812095
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_poweron_counter.1280941125
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_smoke.2797090523
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all_with_rand_reset.2848794485
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_alert_test.896057290
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_clock_gating.528442243
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_both.2474986059
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt.10782060
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt_fixed.1754317567
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled.2477891946
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled_fixed.3539298084
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup_fixed.3890736381
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_fsm_reset.4071529997
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_lowpower_counter.3522891679
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_poweron_counter.3744069014
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_smoke.3343916387
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all.2279403457
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all_with_rand_reset.2453180992
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_alert_test.2282048001
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_clock_gating.1816239831
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_both.3469529762
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_interrupt.2991048774
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_interrupt_fixed.1242841472
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_polled.1963676731
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_polled_fixed.568677010
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_wakeup_fixed.2560912296
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_fsm_reset.2542109402
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_lowpower_counter.2513116160
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_poweron_counter.843851254
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_smoke.2517370503
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_stress_all.1649862217
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_stress_all_with_rand_reset.1798765967
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_alert_test.2568368827
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_clock_gating.1869917467
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_both.3362559168
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_interrupt_fixed.2678828857
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_polled.186466922
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_polled_fixed.3847730072
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_wakeup_fixed.1183507937
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_fsm_reset.848092093
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_lowpower_counter.1111459903
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_poweron_counter.1124193911
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_smoke.1821594951
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_stress_all_with_rand_reset.4053530265
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_alert_test.1434776193
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_interrupt.452163328
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_interrupt_fixed.2159740391
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_polled.3325324632
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_polled_fixed.3333002603
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_wakeup.1010791686
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_wakeup_fixed.2902550722
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_fsm_reset.1900655694
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_lowpower_counter.3163946312
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_poweron_counter.23941825
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_smoke.961010339
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_stress_all.2798532290
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_stress_all_with_rand_reset.827818638
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_alert_test.2367335162
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_both.1366616520
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_interrupt.2735585729
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_interrupt_fixed.2785259765
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_polled.3306832349
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_polled_fixed.2232222935
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_wakeup.1375005715
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_wakeup_fixed.211345009
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_fsm_reset.1869077121
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_lowpower_counter.1721205044
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_poweron_counter.1456356146
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_smoke.3433510712
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_stress_all.2785396088
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_stress_all_with_rand_reset.2583985363
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_alert_test.3487443416
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_clock_gating.2756037184
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_both.2712250928
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_interrupt.3315380090
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_interrupt_fixed.352027726
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_polled.561718853
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_polled_fixed.285781869
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_wakeup.1445569248
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_wakeup_fixed.1299547256
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_fsm_reset.1695821777
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_lowpower_counter.3780926391
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_poweron_counter.1649609761
/workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_smoke.3182895807



Total test records in report: 918
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_smoke.3257807107 Sep 04 12:43:24 AM UTC 24 Sep 04 12:43:36 AM UTC 24 5992639380 ps
T2 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_alert_test.1936556447 Sep 04 12:43:38 AM UTC 24 Sep 04 12:43:41 AM UTC 24 536745336 ps
T3 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_poweron_counter.3467673932 Sep 04 12:43:30 AM UTC 24 Sep 04 12:43:41 AM UTC 24 3669363797 ps
T21 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_sec_cm.1244883569 Sep 04 12:43:38 AM UTC 24 Sep 04 12:43:46 AM UTC 24 4501120695 ps
T4 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_smoke.812368439 Sep 04 12:43:41 AM UTC 24 Sep 04 12:43:48 AM UTC 24 6233962724 ps
T5 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_stress_all_with_rand_reset.2629968620 Sep 04 12:43:35 AM UTC 24 Sep 04 12:44:00 AM UTC 24 3215447074 ps
T6 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_poweron_counter.601703018 Sep 04 12:43:51 AM UTC 24 Sep 04 12:44:04 AM UTC 24 3377015370 ps
T22 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_alert_test.1506302746 Sep 04 12:44:05 AM UTC 24 Sep 04 12:44:07 AM UTC 24 377648583 ps
T23 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_sec_cm.4268721243 Sep 04 12:44:03 AM UTC 24 Sep 04 12:44:10 AM UTC 24 4738779661 ps
T7 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_smoke.3275435323 Sep 04 12:44:05 AM UTC 24 Sep 04 12:44:15 AM UTC 24 5771542140 ps
T8 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_lowpower_counter.1616744130 Sep 04 12:43:59 AM UTC 24 Sep 04 12:44:16 AM UTC 24 32337989308 ps
T9 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_lowpower_counter.3852800723 Sep 04 12:43:31 AM UTC 24 Sep 04 12:44:36 AM UTC 24 23562649625 ps
T10 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_poweron_counter.3293046038 Sep 04 12:44:28 AM UTC 24 Sep 04 12:44:45 AM UTC 24 3877531086 ps
T11 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_stress_all_with_rand_reset.3659287337 Sep 04 12:44:46 AM UTC 24 Sep 04 12:44:52 AM UTC 24 9394125891 ps
T24 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_alert_test.2168036548 Sep 04 12:44:52 AM UTC 24 Sep 04 12:44:55 AM UTC 24 530808878 ps
T12 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_stress_all_with_rand_reset.454505599 Sep 04 12:44:01 AM UTC 24 Sep 04 12:44:57 AM UTC 24 48045703306 ps
T25 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_sec_cm.2336405405 Sep 04 12:44:52 AM UTC 24 Sep 04 12:44:57 AM UTC 24 4221030617 ps
T26 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_smoke.2331219151 Sep 04 12:44:53 AM UTC 24 Sep 04 12:45:01 AM UTC 24 5787803870 ps
T13 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_clock_gating.4212213383 Sep 04 12:43:49 AM UTC 24 Sep 04 12:45:15 AM UTC 24 349824917453 ps
T14 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_interrupt.3780033875 Sep 04 12:43:43 AM UTC 24 Sep 04 12:45:30 AM UTC 24 164996962801 ps
T27 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_lowpower_counter.3027343364 Sep 04 12:44:37 AM UTC 24 Sep 04 12:45:32 AM UTC 24 37431795712 ps
T28 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_poweron_counter.2601684805 Sep 04 12:45:28 AM UTC 24 Sep 04 12:45:39 AM UTC 24 3600056912 ps
T29 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_sec_cm.63588732 Sep 04 12:45:36 AM UTC 24 Sep 04 12:45:43 AM UTC 24 4199072973 ps
T47 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_alert_test.2182508633 Sep 04 12:45:41 AM UTC 24 Sep 04 12:45:45 AM UTC 24 459270310 ps
T15 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_both.3067692825 Sep 04 12:43:28 AM UTC 24 Sep 04 12:45:50 AM UTC 24 193433168679 ps
T16 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_stress_all.3587734773 Sep 04 12:44:01 AM UTC 24 Sep 04 12:45:52 AM UTC 24 177441295648 ps
T17 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_clock_gating.2773568020 Sep 04 12:43:28 AM UTC 24 Sep 04 12:45:56 AM UTC 24 189789607582 ps
T18 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_polled_fixed.3758715285 Sep 04 12:43:42 AM UTC 24 Sep 04 12:46:08 AM UTC 24 329988704296 ps
T103 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_smoke.3017614512 Sep 04 12:45:44 AM UTC 24 Sep 04 12:46:08 AM UTC 24 5535380552 ps
T19 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_stress_all_with_rand_reset.3451935856 Sep 04 12:45:33 AM UTC 24 Sep 04 12:46:12 AM UTC 24 23497886094 ps
T104 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_poweron_counter.2245790532 Sep 04 12:46:10 AM UTC 24 Sep 04 12:46:17 AM UTC 24 4924138715 ps
T145 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_lowpower_counter.1997809893 Sep 04 12:45:31 AM UTC 24 Sep 04 12:46:18 AM UTC 24 38544911453 ps
T20 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_wakeup.197834192 Sep 04 12:45:02 AM UTC 24 Sep 04 12:46:35 AM UTC 24 183937673457 ps
T40 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_stress_all_with_rand_reset.2367265023 Sep 04 12:46:19 AM UTC 24 Sep 04 12:46:43 AM UTC 24 23612313940 ps
T197 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_alert_test.2513938258 Sep 04 12:46:45 AM UTC 24 Sep 04 12:46:47 AM UTC 24 535235664 ps
T78 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_sec_cm.2539123068 Sep 04 12:46:37 AM UTC 24 Sep 04 12:46:56 AM UTC 24 4297936688 ps
T198 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_smoke.2517370503 Sep 04 12:46:49 AM UTC 24 Sep 04 12:47:03 AM UTC 24 5847633562 ps
T79 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_polled.3727744350 Sep 04 12:45:46 AM UTC 24 Sep 04 12:47:10 AM UTC 24 326518866887 ps
T80 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_interrupt_fixed.946557360 Sep 04 12:44:16 AM UTC 24 Sep 04 12:47:33 AM UTC 24 165055109547 ps
T46 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_wakeup_fixed.2305229130 Sep 04 12:45:04 AM UTC 24 Sep 04 12:47:43 AM UTC 24 207359684408 ps
T136 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_interrupt_fixed.1324203165 Sep 04 12:43:27 AM UTC 24 Sep 04 12:47:48 AM UTC 24 319084603120 ps
T199 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_lowpower_counter.2821761028 Sep 04 12:46:12 AM UTC 24 Sep 04 12:47:54 AM UTC 24 23097105768 ps
T380 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_poweron_counter.843851254 Sep 04 12:47:54 AM UTC 24 Sep 04 12:48:04 AM UTC 24 3095582691 ps
T130 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_interrupt.3473730500 Sep 04 12:43:26 AM UTC 24 Sep 04 12:48:22 AM UTC 24 491146816931 ps
T41 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_stress_all_with_rand_reset.1798765967 Sep 04 12:48:23 AM UTC 24 Sep 04 12:48:47 AM UTC 24 13547882470 ps
T49 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_wakeup_fixed.456207459 Sep 04 12:43:48 AM UTC 24 Sep 04 12:49:00 AM UTC 24 404443572021 ps
T171 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_alert_test.2282048001 Sep 04 12:49:01 AM UTC 24 Sep 04 12:49:04 AM UTC 24 389917736 ps
T172 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_smoke.1821594951 Sep 04 12:49:05 AM UTC 24 Sep 04 12:49:09 AM UTC 24 5957509049 ps
T173 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_lowpower_counter.2513116160 Sep 04 12:48:05 AM UTC 24 Sep 04 12:49:24 AM UTC 24 25349060431 ps
T48 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_fsm_reset.2273297227 Sep 04 12:43:33 AM UTC 24 Sep 04 12:49:48 AM UTC 24 95533858413 ps
T128 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_both.2052707281 Sep 04 12:43:50 AM UTC 24 Sep 04 12:49:58 AM UTC 24 336332128153 ps
T174 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_wakeup_fixed.2560912296 Sep 04 12:47:33 AM UTC 24 Sep 04 12:50:01 AM UTC 24 602035330990 ps
T175 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_interrupt_fixed.1242841472 Sep 04 12:47:04 AM UTC 24 Sep 04 12:50:03 AM UTC 24 496788199401 ps
T38 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_stress_all.1649862217 Sep 04 12:48:48 AM UTC 24 Sep 04 12:50:22 AM UTC 24 201252713929 ps
T131 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_polled.1383426563 Sep 04 12:44:55 AM UTC 24 Sep 04 12:50:25 AM UTC 24 494255287343 ps
T204 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_polled_fixed.568677010 Sep 04 12:46:58 AM UTC 24 Sep 04 12:50:34 AM UTC 24 164312561378 ps
T150 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_wakeup.4069626437 Sep 04 12:47:11 AM UTC 24 Sep 04 12:50:35 AM UTC 24 351589976936 ps
T158 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_poweron_counter.1124193911 Sep 04 12:50:26 AM UTC 24 Sep 04 12:50:39 AM UTC 24 5138429878 ps
T52 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_fsm_reset.2934246143 Sep 04 12:44:39 AM UTC 24 Sep 04 12:50:43 AM UTC 24 94943843377 ps
T159 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_interrupt_fixed.1473451180 Sep 04 12:45:01 AM UTC 24 Sep 04 12:50:44 AM UTC 24 500976381570 ps
T160 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_alert_test.2568368827 Sep 04 12:50:45 AM UTC 24 Sep 04 12:50:48 AM UTC 24 356621633 ps
T42 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_stress_all_with_rand_reset.4053530265 Sep 04 12:50:40 AM UTC 24 Sep 04 12:50:50 AM UTC 24 6689190217 ps
T161 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_smoke.961010339 Sep 04 12:50:48 AM UTC 24 Sep 04 12:50:56 AM UTC 24 5819015298 ps
T137 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_clock_gating.2305389559 Sep 04 12:45:04 AM UTC 24 Sep 04 12:51:37 AM UTC 24 163329923134 ps
T129 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_both.1410921641 Sep 04 12:45:15 AM UTC 24 Sep 04 12:51:40 AM UTC 24 568096784037 ps
T132 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_stress_all.510831818 Sep 04 12:43:37 AM UTC 24 Sep 04 12:51:55 AM UTC 24 173506333394 ps
T58 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_fsm_reset.2973832025 Sep 04 12:45:33 AM UTC 24 Sep 04 12:52:04 AM UTC 24 76511081107 ps
T188 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_lowpower_counter.1111459903 Sep 04 12:50:35 AM UTC 24 Sep 04 12:52:12 AM UTC 24 29876865801 ps
T189 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_polled_fixed.1823762219 Sep 04 12:44:57 AM UTC 24 Sep 04 12:52:12 AM UTC 24 156010473065 ps
T190 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_interrupt_fixed.2678828857 Sep 04 12:49:49 AM UTC 24 Sep 04 12:52:13 AM UTC 24 164184565009 ps
T191 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_clock_gating.1816239831 Sep 04 12:47:44 AM UTC 24 Sep 04 12:52:17 AM UTC 24 159218160945 ps
T192 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_poweron_counter.23941825 Sep 04 12:52:13 AM UTC 24 Sep 04 12:52:20 AM UTC 24 2952321443 ps
T193 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_both.2180299402 Sep 04 12:46:10 AM UTC 24 Sep 04 12:52:25 AM UTC 24 174064793615 ps
T194 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_wakeup_fixed.4290670746 Sep 04 12:44:17 AM UTC 24 Sep 04 12:52:37 AM UTC 24 204342282043 ps
T381 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_alert_test.1434776193 Sep 04 12:52:38 AM UTC 24 Sep 04 12:52:40 AM UTC 24 471049844 ps
T382 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_lowpower_counter.3163946312 Sep 04 12:52:14 AM UTC 24 Sep 04 12:52:42 AM UTC 24 40653686355 ps
T383 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_smoke.3433510712 Sep 04 12:52:41 AM UTC 24 Sep 04 12:52:56 AM UTC 24 5543360742 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_wakeup.2964551225 Sep 04 12:43:47 AM UTC 24 Sep 04 12:53:09 AM UTC 24 429622965212 ps
T30 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_stress_all_with_rand_reset.827818638 Sep 04 12:52:21 AM UTC 24 Sep 04 12:53:13 AM UTC 24 124633223227 ps
T178 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_interrupt.3554509464 Sep 04 12:44:10 AM UTC 24 Sep 04 12:53:30 AM UTC 24 319709431907 ps
T138 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_wakeup.3608918516 Sep 04 12:50:00 AM UTC 24 Sep 04 12:53:35 AM UTC 24 422433326957 ps
T53 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_fsm_reset.2027818974 Sep 04 12:46:18 AM UTC 24 Sep 04 12:53:47 AM UTC 24 94330208458 ps
T54 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_stress_all.178388235 Sep 04 12:44:50 AM UTC 24 Sep 04 12:54:34 AM UTC 24 286250422277 ps
T179 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_polled_fixed.2063868958 Sep 04 12:43:24 AM UTC 24 Sep 04 12:54:40 AM UTC 24 324897047721 ps
T180 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_poweron_counter.1456356146 Sep 04 12:54:22 AM UTC 24 Sep 04 12:54:41 AM UTC 24 4083778833 ps
T133 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_polled.1963676731 Sep 04 12:46:57 AM UTC 24 Sep 04 12:54:43 AM UTC 24 325144109096 ps
T181 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_lowpower_counter.1721205044 Sep 04 12:54:35 AM UTC 24 Sep 04 12:55:05 AM UTC 24 27762125563 ps
T177 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_clock_gating.2134087693 Sep 04 12:45:57 AM UTC 24 Sep 04 12:55:05 AM UTC 24 524085445514 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_alert_test.2367335162 Sep 04 12:55:06 AM UTC 24 Sep 04 12:55:08 AM UTC 24 343705835 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_smoke.3182895807 Sep 04 12:55:06 AM UTC 24 Sep 04 12:55:14 AM UTC 24 5871800217 ps
T146 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_interrupt.389185945 Sep 04 12:49:47 AM UTC 24 Sep 04 12:55:20 AM UTC 24 492457160478 ps
T43 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_stress_all_with_rand_reset.2583985363 Sep 04 12:54:41 AM UTC 24 Sep 04 12:55:23 AM UTC 24 76477974417 ps
T94 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_wakeup.3019112133 Sep 04 12:44:17 AM UTC 24 Sep 04 12:55:34 AM UTC 24 188137955617 ps
T95 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_stress_all.2785396088 Sep 04 12:54:43 AM UTC 24 Sep 04 12:55:50 AM UTC 24 33563334883 ps
T96 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_polled.1866908532 Sep 04 12:43:24 AM UTC 24 Sep 04 12:55:51 AM UTC 24 330247348079 ps
T97 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_both.256941284 Sep 04 12:44:25 AM UTC 24 Sep 04 12:55:53 AM UTC 24 504826780565 ps
T98 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_wakeup_fixed.2043022802 Sep 04 12:43:28 AM UTC 24 Sep 04 12:56:12 AM UTC 24 403843325574 ps
T99 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_poweron_counter.1649609761 Sep 04 12:55:54 AM UTC 24 Sep 04 12:56:14 AM UTC 24 4995920341 ps
T100 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_interrupt.2109577096 Sep 04 12:45:47 AM UTC 24 Sep 04 12:56:47 AM UTC 24 493030017976 ps
T101 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_interrupt.3867136230 Sep 04 12:44:58 AM UTC 24 Sep 04 12:56:50 AM UTC 24 321321278125 ps
T102 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_polled_fixed.3847730072 Sep 04 12:49:25 AM UTC 24 Sep 04 12:56:53 AM UTC 24 332230047412 ps
T386 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_alert_test.3487443416 Sep 04 12:56:54 AM UTC 24 Sep 04 12:56:57 AM UTC 24 334116869 ps
T286 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_polled.186466922 Sep 04 12:49:09 AM UTC 24 Sep 04 12:57:00 AM UTC 24 322893081091 ps
T387 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_interrupt_fixed.2159740391 Sep 04 12:51:40 AM UTC 24 Sep 04 12:57:07 AM UTC 24 320844253934 ps
T388 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_smoke.3209247724 Sep 04 12:56:57 AM UTC 24 Sep 04 12:57:13 AM UTC 24 5696291503 ps
T44 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_stress_all_with_rand_reset.293297660 Sep 04 12:56:48 AM UTC 24 Sep 04 12:57:23 AM UTC 24 76838474202 ps
T147 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_wakeup_fixed.211345009 Sep 04 12:53:36 AM UTC 24 Sep 04 12:57:26 AM UTC 24 594863173370 ps
T389 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_polled_fixed.3333002603 Sep 04 12:50:57 AM UTC 24 Sep 04 12:57:32 AM UTC 24 327809664759 ps
T148 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_polled_fixed.285781869 Sep 04 12:55:15 AM UTC 24 Sep 04 12:57:48 AM UTC 24 166850822530 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_lowpower_counter.3780926391 Sep 04 12:56:13 AM UTC 24 Sep 04 12:57:53 AM UTC 24 25288456258 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_polled_fixed.2061254532 Sep 04 12:45:47 AM UTC 24 Sep 04 12:57:59 AM UTC 24 163163361452 ps
T260 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_interrupt.452163328 Sep 04 12:51:39 AM UTC 24 Sep 04 12:58:01 AM UTC 24 163537595331 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_polled_fixed.1658656343 Sep 04 12:44:08 AM UTC 24 Sep 04 12:58:02 AM UTC 24 484294503602 ps
T45 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all_with_rand_reset.1412005198 Sep 04 12:58:03 AM UTC 24 Sep 04 12:58:10 AM UTC 24 4440793530 ps
T393 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_poweron_counter.2378752912 Sep 04 12:57:53 AM UTC 24 Sep 04 12:58:12 AM UTC 24 4235801229 ps
T394 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_alert_test.3379114897 Sep 04 12:58:12 AM UTC 24 Sep 04 12:58:14 AM UTC 24 483265226 ps
T134 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_stress_all.4054781583 Sep 04 12:50:43 AM UTC 24 Sep 04 12:58:15 AM UTC 24 408857701945 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all.1616379524 Sep 04 12:58:11 AM UTC 24 Sep 04 12:58:20 AM UTC 24 42590509039 ps
T396 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_interrupt_fixed.352027726 Sep 04 12:55:24 AM UTC 24 Sep 04 12:58:22 AM UTC 24 165210713452 ps
T149 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_clock_gating.3610634466 Sep 04 12:52:04 AM UTC 24 Sep 04 12:58:24 AM UTC 24 668694028030 ps
T397 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_lowpower_counter.510790331 Sep 04 12:58:00 AM UTC 24 Sep 04 12:58:31 AM UTC 24 29447229647 ps
T39 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_stress_all.2798532290 Sep 04 12:52:26 AM UTC 24 Sep 04 12:58:39 AM UTC 24 346308399378 ps
T398 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_smoke.838114253 Sep 04 12:58:15 AM UTC 24 Sep 04 12:58:41 AM UTC 24 5619914944 ps
T223 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_fsm_reset.2542109402 Sep 04 12:48:12 AM UTC 24 Sep 04 12:59:03 AM UTC 24 84987587008 ps
T182 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_polled.3306832349 Sep 04 12:52:42 AM UTC 24 Sep 04 12:59:18 AM UTC 24 486371282104 ps
T212 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_poweron_counter.2497937897 Sep 04 12:59:04 AM UTC 24 Sep 04 12:59:26 AM UTC 24 4705052010 ps
T151 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/0.adc_ctrl_filters_wakeup.3154189100 Sep 04 12:43:27 AM UTC 24 Sep 04 12:59:29 AM UTC 24 378319604658 ps
T213 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_both.2712250928 Sep 04 12:55:52 AM UTC 24 Sep 04 12:59:29 AM UTC 24 328326239571 ps
T214 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_interrupt_fixed.2785259765 Sep 04 12:53:13 AM UTC 24 Sep 04 12:59:39 AM UTC 24 486271088653 ps
T215 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_alert_test.2015173585 Sep 04 12:59:39 AM UTC 24 Sep 04 12:59:42 AM UTC 24 461549310 ps
T31 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_stress_all_with_rand_reset.505322176 Sep 04 12:59:29 AM UTC 24 Sep 04 12:59:51 AM UTC 24 14992652667 ps
T216 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_lowpower_counter.1625404723 Sep 04 12:59:18 AM UTC 24 Sep 04 12:59:52 AM UTC 24 30774166349 ps
T217 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_wakeup_fixed.2902550722 Sep 04 12:51:56 AM UTC 24 Sep 04 01:00:01 AM UTC 24 585779751410 ps
T218 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_smoke.1646965626 Sep 04 12:59:43 AM UTC 24 Sep 04 01:00:16 AM UTC 24 5853380685 ps
T293 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_polled.561718853 Sep 04 12:55:09 AM UTC 24 Sep 04 01:00:43 AM UTC 24 332375609741 ps
T250 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_clock_gating.2818192284 Sep 04 12:57:33 AM UTC 24 Sep 04 01:00:57 AM UTC 24 161818393773 ps
T139 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_polled.4002354709 Sep 04 12:58:15 AM UTC 24 Sep 04 01:01:00 AM UTC 24 159672718488 ps
T59 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_fsm_reset.848092093 Sep 04 12:50:36 AM UTC 24 Sep 04 01:01:05 AM UTC 24 91273910785 ps
T399 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_poweron_counter.3073433105 Sep 04 01:01:06 AM UTC 24 Sep 04 01:01:14 AM UTC 24 5006501259 ps
T135 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_polled.1885296699 Sep 04 12:57:01 AM UTC 24 Sep 04 01:01:15 AM UTC 24 331937051819 ps
T400 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_polled_fixed.1650741316 Sep 04 12:57:03 AM UTC 24 Sep 04 01:01:17 AM UTC 24 315427736980 ps
T401 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_polled_fixed.2232222935 Sep 04 12:52:56 AM UTC 24 Sep 04 01:01:19 AM UTC 24 328516200483 ps
T402 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_alert_test.1597875437 Sep 04 01:01:42 AM UTC 24 Sep 04 01:01:45 AM UTC 24 345227647 ps
T50 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_fsm_reset.2771333595 Sep 04 12:43:59 AM UTC 24 Sep 04 01:02:02 AM UTC 24 129115644853 ps
T403 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_smoke.2239452221 Sep 04 01:01:46 AM UTC 24 Sep 04 01:02:14 AM UTC 24 6006501968 ps
T243 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_interrupt.3315380090 Sep 04 12:55:21 AM UTC 24 Sep 04 01:02:19 AM UTC 24 167326037087 ps
T55 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_fsm_reset.1900655694 Sep 04 12:52:18 AM UTC 24 Sep 04 01:02:22 AM UTC 24 104562360915 ps
T51 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_fsm_reset.1869077121 Sep 04 12:54:40 AM UTC 24 Sep 04 01:02:26 AM UTC 24 89173613285 ps
T222 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_stress_all.2447568638 Sep 04 12:46:29 AM UTC 24 Sep 04 01:02:27 AM UTC 24 481774808430 ps
T279 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_clock_gating.1679206461 Sep 04 12:44:22 AM UTC 24 Sep 04 01:02:39 AM UTC 24 350535554331 ps
T162 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_polled_fixed.1239057950 Sep 04 12:58:16 AM UTC 24 Sep 04 01:02:51 AM UTC 24 329087762681 ps
T404 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_wakeup_fixed.363326770 Sep 04 12:45:53 AM UTC 24 Sep 04 01:03:07 AM UTC 24 408429341263 ps
T405 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_lowpower_counter.590685087 Sep 04 01:01:15 AM UTC 24 Sep 04 01:03:10 AM UTC 24 42083851622 ps
T152 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_both.3469529762 Sep 04 12:47:48 AM UTC 24 Sep 04 01:03:15 AM UTC 24 334028932846 ps
T406 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_poweron_counter.2285365035 Sep 04 01:03:08 AM UTC 24 Sep 04 01:03:17 AM UTC 24 3516051330 ps
T274 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_both.4110724324 Sep 04 12:52:13 AM UTC 24 Sep 04 01:03:23 AM UTC 24 501333596702 ps
T407 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_lowpower_counter.3313847302 Sep 04 01:03:11 AM UTC 24 Sep 04 01:03:30 AM UTC 24 25654010345 ps
T408 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_alert_test.688927145 Sep 04 01:03:31 AM UTC 24 Sep 04 01:03:34 AM UTC 24 459894113 ps
T264 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_wakeup.1445569248 Sep 04 12:55:35 AM UTC 24 Sep 04 01:03:43 AM UTC 24 585646606984 ps
T409 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_interrupt_fixed.2612446876 Sep 04 12:58:23 AM UTC 24 Sep 04 01:03:48 AM UTC 24 477475159898 ps
T410 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_smoke.3249431786 Sep 04 01:03:34 AM UTC 24 Sep 04 01:03:49 AM UTC 24 5754906629 ps
T140 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_polled.2833335749 Sep 04 12:44:05 AM UTC 24 Sep 04 01:04:06 AM UTC 24 494937706597 ps
T32 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_stress_all_with_rand_reset.3099507262 Sep 04 01:03:18 AM UTC 24 Sep 04 01:04:22 AM UTC 24 45873369526 ps
T251 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_stress_all.817488479 Sep 04 12:59:29 AM UTC 24 Sep 04 01:04:25 AM UTC 24 195877117872 ps
T203 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_clock_gating.3054953560 Sep 04 01:00:57 AM UTC 24 Sep 04 01:04:26 AM UTC 24 188914315365 ps
T141 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_both.2860557684 Sep 04 01:02:52 AM UTC 24 Sep 04 01:04:26 AM UTC 24 330644703167 ps
T275 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_interrupt.836895417 Sep 04 01:00:03 AM UTC 24 Sep 04 01:04:31 AM UTC 24 334401510513 ps
T411 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_poweron_counter.3522454330 Sep 04 01:04:27 AM UTC 24 Sep 04 01:04:38 AM UTC 24 3818049836 ps
T276 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_interrupt.954035114 Sep 04 12:57:08 AM UTC 24 Sep 04 01:04:39 AM UTC 24 320537860324 ps
T244 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_both.1436396946 Sep 04 01:01:00 AM UTC 24 Sep 04 01:04:44 AM UTC 24 532046489051 ps
T292 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all_with_rand_reset.3094053474 Sep 04 01:04:39 AM UTC 24 Sep 04 01:04:58 AM UTC 24 3001644578 ps
T230 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_fsm_reset.528804710 Sep 04 12:59:26 AM UTC 24 Sep 04 01:05:00 AM UTC 24 84974682530 ps
T412 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_alert_test.2111059297 Sep 04 01:04:58 AM UTC 24 Sep 04 01:05:01 AM UTC 24 467869474 ps
T413 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_interrupt_fixed.615277083 Sep 04 01:00:06 AM UTC 24 Sep 04 01:05:12 AM UTC 24 489591489734 ps
T414 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_smoke.1816161512 Sep 04 01:05:00 AM UTC 24 Sep 04 01:05:16 AM UTC 24 5763172519 ps
T415 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_interrupt_fixed.2518019420 Sep 04 12:43:47 AM UTC 24 Sep 04 01:05:21 AM UTC 24 496289662135 ps
T242 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_stress_all.415339772 Sep 04 12:45:34 AM UTC 24 Sep 04 01:05:27 AM UTC 24 508875452848 ps
T259 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_clock_gating.1660309503 Sep 04 12:58:40 AM UTC 24 Sep 04 01:05:40 AM UTC 24 587985934578 ps
T416 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_wakeup_fixed.3352002178 Sep 04 12:57:27 AM UTC 24 Sep 04 01:05:41 AM UTC 24 628705778084 ps
T142 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_clock_gating.2756037184 Sep 04 12:55:51 AM UTC 24 Sep 04 01:05:54 AM UTC 24 339233337332 ps
T143 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_stress_all.3969707160 Sep 04 01:03:23 AM UTC 24 Sep 04 01:06:00 AM UTC 24 345002805611 ps
T417 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_lowpower_counter.2248113365 Sep 04 01:04:32 AM UTC 24 Sep 04 01:06:08 AM UTC 24 45476485835 ps
T418 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_poweron_counter.2323684022 Sep 04 01:05:55 AM UTC 24 Sep 04 01:06:11 AM UTC 24 4133818888 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_stress_all_with_rand_reset.2276409874 Sep 04 01:06:12 AM UTC 24 Sep 04 01:06:22 AM UTC 24 6271483657 ps
T419 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_interrupt_fixed.1854974547 Sep 04 12:57:13 AM UTC 24 Sep 04 01:06:22 AM UTC 24 489467467268 ps
T420 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_alert_test.2599543763 Sep 04 01:06:23 AM UTC 24 Sep 04 01:06:25 AM UTC 24 383598167 ps
T205 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled.2842867650 Sep 04 12:59:52 AM UTC 24 Sep 04 01:06:27 AM UTC 24 483608207559 ps
T163 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_wakeup.182121649 Sep 04 12:45:53 AM UTC 24 Sep 04 01:06:40 AM UTC 24 367061321173 ps
T421 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_lowpower_counter.1184540184 Sep 04 01:06:01 AM UTC 24 Sep 04 01:06:44 AM UTC 24 38380124972 ps
T422 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_smoke.1987684490 Sep 04 01:06:26 AM UTC 24 Sep 04 01:06:53 AM UTC 24 5692165579 ps
T423 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_interrupt_fixed.2085230477 Sep 04 01:02:22 AM UTC 24 Sep 04 01:06:57 AM UTC 24 327560272028 ps
T424 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled_fixed.3977283119 Sep 04 12:59:53 AM UTC 24 Sep 04 01:06:58 AM UTC 24 490812851982 ps
T425 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled_fixed.3205772555 Sep 04 01:05:14 AM UTC 24 Sep 04 01:07:04 AM UTC 24 159682065346 ps
T426 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_wakeup_fixed.1183507937 Sep 04 12:50:02 AM UTC 24 Sep 04 01:07:09 AM UTC 24 593525631424 ps
T144 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup.4284046892 Sep 04 01:05:22 AM UTC 24 Sep 04 01:07:11 AM UTC 24 191569387737 ps
T239 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_interrupt.2735585729 Sep 04 12:53:10 AM UTC 24 Sep 04 01:07:11 AM UTC 24 327901099864 ps
T252 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_interrupt.2141867992 Sep 04 12:58:22 AM UTC 24 Sep 04 01:07:14 AM UTC 24 159501344598 ps
T427 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_poweron_counter.2012431762 Sep 04 01:07:11 AM UTC 24 Sep 04 01:07:22 AM UTC 24 4930879740 ps
T428 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled_fixed.1325117069 Sep 04 01:03:49 AM UTC 24 Sep 04 01:07:28 AM UTC 24 327082028844 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_interrupt_fixed.3686824038 Sep 04 12:45:50 AM UTC 24 Sep 04 01:07:35 AM UTC 24 484596288948 ps
T430 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_alert_test.1773683516 Sep 04 01:07:37 AM UTC 24 Sep 04 01:07:39 AM UTC 24 349356221 ps
T195 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all_with_rand_reset.4175540838 Sep 04 01:07:24 AM UTC 24 Sep 04 01:07:42 AM UTC 24 12257750063 ps
T249 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_both.324654193 Sep 04 12:57:49 AM UTC 24 Sep 04 01:07:43 AM UTC 24 161912436631 ps
T431 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_smoke.2589480423 Sep 04 01:07:40 AM UTC 24 Sep 04 01:07:48 AM UTC 24 5974572827 ps
T432 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_lowpower_counter.2248039905 Sep 04 01:07:12 AM UTC 24 Sep 04 01:07:58 AM UTC 24 40808244767 ps
T288 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt.1997715192 Sep 04 01:03:49 AM UTC 24 Sep 04 01:07:59 AM UTC 24 162070524570 ps
T219 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_fsm_reset.1695821777 Sep 04 12:56:15 AM UTC 24 Sep 04 01:08:00 AM UTC 24 103645315588 ps
T343 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_both.1750552854 Sep 04 01:05:42 AM UTC 24 Sep 04 01:08:04 AM UTC 24 165530380985 ps
T433 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled_fixed.1908967946 Sep 04 01:02:15 AM UTC 24 Sep 04 01:08:11 AM UTC 24 501967421106 ps
T284 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_wakeup.1026146219 Sep 04 12:57:24 AM UTC 24 Sep 04 01:08:24 AM UTC 24 446188912657 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_poweron_counter.3223303497 Sep 04 01:08:25 AM UTC 24 Sep 04 01:08:31 AM UTC 24 2791367466 ps
T435 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup_fixed.2882579245 Sep 04 01:04:23 AM UTC 24 Sep 04 01:08:34 AM UTC 24 601279518706 ps
T196 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_clock_gating.2229628404 Sep 04 12:53:48 AM UTC 24 Sep 04 01:08:38 AM UTC 24 339315830346 ps
T436 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.2077432541 Sep 04 01:06:59 AM UTC 24 Sep 04 01:08:50 AM UTC 24 200917333117 ps
T437 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_stress_all_with_rand_reset.339693711 Sep 04 01:08:39 AM UTC 24 Sep 04 01:08:51 AM UTC 24 2694984758 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_alert_test.1576484652 Sep 04 01:08:52 AM UTC 24 Sep 04 01:08:55 AM UTC 24 325307946 ps
T263 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_wakeup.1010791686 Sep 04 12:51:41 AM UTC 24 Sep 04 01:09:08 AM UTC 24 365824827742 ps
T278 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_both.1366616520 Sep 04 12:54:16 AM UTC 24 Sep 04 01:09:13 AM UTC 24 338117191699 ps
T439 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_smoke.80476125 Sep 04 01:08:56 AM UTC 24 Sep 04 01:09:23 AM UTC 24 5709508397 ps
T311 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup.612034231 Sep 04 01:02:27 AM UTC 24 Sep 04 01:09:38 AM UTC 24 182505584886 ps
T287 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_polled.1945915927 Sep 04 12:43:42 AM UTC 24 Sep 04 01:09:43 AM UTC 24 483700495997 ps
T255 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_clock_gating.3165186705 Sep 04 01:05:41 AM UTC 24 Sep 04 01:09:46 AM UTC 24 365872776404 ps
T257 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_interrupt.2991048774 Sep 04 12:47:04 AM UTC 24 Sep 04 01:10:03 AM UTC 24 485955188724 ps
T301 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_stress_all.3418590310 Sep 04 01:01:20 AM UTC 24 Sep 04 01:10:19 AM UTC 24 331885010333 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_lowpower_counter.2512336439 Sep 04 01:08:32 AM UTC 24 Sep 04 01:10:32 AM UTC 24 32073854560 ps
T248 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_clock_gating.205271483 Sep 04 01:07:05 AM UTC 24 Sep 04 01:10:37 AM UTC 24 342852819692 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_poweron_counter.1660169949 Sep 04 01:10:33 AM UTC 24 Sep 04 01:10:38 AM UTC 24 3476894756 ps
T231 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_fsm_reset.3677983170 Sep 04 01:01:16 AM UTC 24 Sep 04 01:10:43 AM UTC 24 105324037726 ps
T442 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled.1006044165 Sep 04 01:03:44 AM UTC 24 Sep 04 01:10:51 AM UTC 24 168141939340 ps
T443 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_alert_test.1880680488 Sep 04 01:10:52 AM UTC 24 Sep 04 01:10:55 AM UTC 24 388060165 ps
T164 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.2830265223 Sep 04 01:08:12 AM UTC 24 Sep 04 01:10:58 AM UTC 24 567864534125 ps
T294 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_both.2238825958 Sep 04 01:07:09 AM UTC 24 Sep 04 01:11:03 AM UTC 24 164156079106 ps
T444 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt_fixed.3562499877 Sep 04 01:07:58 AM UTC 24 Sep 04 01:11:09 AM UTC 24 329311486941 ps
T236 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_fsm_reset.2935481822 Sep 04 12:58:02 AM UTC 24 Sep 04 01:11:11 AM UTC 24 126886264592 ps
T445 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_smoke.474262635 Sep 04 01:10:55 AM UTC 24 Sep 04 01:11:21 AM UTC 24 5856463482 ps
T266 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_clock_gating.1557221396 Sep 04 01:10:04 AM UTC 24 Sep 04 01:11:28 AM UTC 24 327929648887 ps
T232 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_fsm_reset.1077038221 Sep 04 01:04:39 AM UTC 24 Sep 04 01:11:32 AM UTC 24 71261125700 ps
T153 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_polled.3325324632 Sep 04 12:50:50 AM UTC 24 Sep 04 01:11:42 AM UTC 24 492462916173 ps
T446 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_lowpower_counter.971494198 Sep 04 01:10:38 AM UTC 24 Sep 04 01:11:50 AM UTC 24 40514893719 ps
T291 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.3114783882 Sep 04 01:06:58 AM UTC 24 Sep 04 01:11:53 AM UTC 24 179589152743 ps
T447 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_poweron_counter.3185519368 Sep 04 01:11:51 AM UTC 24 Sep 04 01:11:54 AM UTC 24 2922300537 ps
T280 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all_with_rand_reset.4093784187 Sep 04 01:10:44 AM UTC 24 Sep 04 01:12:00 AM UTC 24 22852038121 ps
T261 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_clock_gating.1869917467 Sep 04 12:50:05 AM UTC 24 Sep 04 01:12:15 AM UTC 24 544056000421 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt_fixed.3892209446 Sep 04 01:05:16 AM UTC 24 Sep 04 01:12:17 AM UTC 24 329329025409 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_alert_test.1408036396 Sep 04 01:12:17 AM UTC 24 Sep 04 01:12:20 AM UTC 24 386299277 ps
T265 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_wakeup.1375005715 Sep 04 12:53:30 AM UTC 24 Sep 04 01:12:22 AM UTC 24 638761142760 ps
T450 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled_fixed.3915923323 Sep 04 01:06:41 AM UTC 24 Sep 04 01:12:28 AM UTC 24 168547390917 ps
T33 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all_with_rand_reset.1767105207 Sep 04 01:12:00 AM UTC 24 Sep 04 01:12:30 AM UTC 24 13696874402 ps
T270 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.3878380844 Sep 04 01:09:43 AM UTC 24 Sep 04 01:12:39 AM UTC 24 185074209540 ps
T451 /workspaces/repo/scratch/os_regression_2024_09_03/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_lowpower_counter.2303674348 Sep 04 01:11:54 AM UTC 24 Sep 04 01:12:43 AM UTC 24 44957192823 ps
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