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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.72 99.07 96.67 100.00 100.00 98.83 98.33 91.14


Total test records in report: 920
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T256 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.167028342 Sep 09 05:42:41 AM UTC 24 Sep 09 05:44:46 AM UTC 24 169602039057 ps
T245 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt.3179456223 Sep 09 05:36:14 AM UTC 24 Sep 09 05:44:58 AM UTC 24 334073330054 ps
T287 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_clock_gating.3318705202 Sep 09 05:42:23 AM UTC 24 Sep 09 05:45:15 AM UTC 24 357202800448 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.3541961467 Sep 09 05:40:32 AM UTC 24 Sep 09 05:45:18 AM UTC 24 164423764551 ps
T462 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.104547130 Sep 09 05:45:15 AM UTC 24 Sep 09 05:45:19 AM UTC 24 3638828974 ps
T212 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_fsm_reset.4271491235 Sep 09 05:35:37 AM UTC 24 Sep 09 05:45:20 AM UTC 24 118790826943 ps
T337 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.3628789058 Sep 09 05:45:20 AM UTC 24 Sep 09 05:45:31 AM UTC 24 9565239680 ps
T343 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.1182715236 Sep 09 05:42:01 AM UTC 24 Sep 09 05:45:34 AM UTC 24 329001001582 ps
T166 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled.172591664 Sep 09 05:37:14 AM UTC 24 Sep 09 05:45:36 AM UTC 24 163299023152 ps
T463 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.1533774156 Sep 09 05:45:35 AM UTC 24 Sep 09 05:45:38 AM UTC 24 398346025 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.3032506759 Sep 09 05:45:19 AM UTC 24 Sep 09 05:45:55 AM UTC 24 34277452854 ps
T465 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_fsm_reset.2183167547 Sep 09 05:39:07 AM UTC 24 Sep 09 05:46:01 AM UTC 24 102023889054 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.2804727518 Sep 09 05:45:38 AM UTC 24 Sep 09 05:46:03 AM UTC 24 5788617703 ps
T467 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_wakeup_fixed.3315763380 Sep 09 05:29:41 AM UTC 24 Sep 09 05:46:14 AM UTC 24 600730109513 ps
T215 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_stress_all.1526621070 Sep 09 05:32:27 AM UTC 24 Sep 09 05:46:15 AM UTC 24 461280644141 ps
T468 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.116262505 Sep 09 05:40:44 AM UTC 24 Sep 09 05:46:22 AM UTC 24 608461445390 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_interrupt.3971314601 Sep 09 05:21:22 AM UTC 24 Sep 09 05:46:33 AM UTC 24 503036731722 ps
T190 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.360992228 Sep 09 05:39:47 AM UTC 24 Sep 09 05:46:36 AM UTC 24 539069635778 ps
T294 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_both.621443777 Sep 09 05:33:27 AM UTC 24 Sep 09 05:46:44 AM UTC 24 344666464756 ps
T469 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.1401723225 Sep 09 05:43:05 AM UTC 24 Sep 09 05:46:48 AM UTC 24 325262880907 ps
T470 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.3935621935 Sep 09 05:46:36 AM UTC 24 Sep 09 05:46:48 AM UTC 24 4513938015 ps
T254 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.740461177 Sep 09 05:46:02 AM UTC 24 Sep 09 05:46:57 AM UTC 24 159529658866 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.4100926894 Sep 09 05:46:50 AM UTC 24 Sep 09 05:47:01 AM UTC 24 8516864121 ps
T471 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.274923616 Sep 09 05:47:02 AM UTC 24 Sep 09 05:47:04 AM UTC 24 502201006 ps
T223 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.2832200288 Sep 09 05:42:56 AM UTC 24 Sep 09 05:47:09 AM UTC 24 69384201601 ps
T472 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.663636068 Sep 09 05:43:32 AM UTC 24 Sep 09 05:47:23 AM UTC 24 409977826168 ps
T175 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_both.4075164144 Sep 09 05:38:40 AM UTC 24 Sep 09 05:47:28 AM UTC 24 491121434136 ps
T295 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt.1853961651 Sep 09 05:40:35 AM UTC 24 Sep 09 05:47:28 AM UTC 24 324792151714 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.3004400402 Sep 09 05:47:05 AM UTC 24 Sep 09 05:47:33 AM UTC 24 5950403647 ps
T308 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup.1124278081 Sep 09 05:34:42 AM UTC 24 Sep 09 05:47:35 AM UTC 24 206763867834 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled_fixed.3188433287 Sep 09 05:40:32 AM UTC 24 Sep 09 05:47:38 AM UTC 24 326441328007 ps
T475 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_wakeup_fixed.3927230365 Sep 09 05:19:41 AM UTC 24 Sep 09 05:47:40 AM UTC 24 591385056904 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.1884701222 Sep 09 05:45:56 AM UTC 24 Sep 09 05:47:48 AM UTC 24 330690235004 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.127159009 Sep 09 05:40:17 AM UTC 24 Sep 09 05:47:52 AM UTC 24 129568006829 ps
T262 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup.202556212 Sep 09 05:43:27 AM UTC 24 Sep 09 05:47:52 AM UTC 24 264114972156 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.2014883503 Sep 09 05:46:44 AM UTC 24 Sep 09 05:47:53 AM UTC 24 34620605061 ps
T478 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.1706392134 Sep 09 05:46:16 AM UTC 24 Sep 09 05:47:54 AM UTC 24 403533611108 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.4203995001 Sep 09 05:47:49 AM UTC 24 Sep 09 05:47:58 AM UTC 24 3469233735 ps
T480 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.3752775281 Sep 09 05:47:59 AM UTC 24 Sep 09 05:48:01 AM UTC 24 391884581 ps
T255 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_clock_gating.865866477 Sep 09 05:39:53 AM UTC 24 Sep 09 05:48:01 AM UTC 24 335950267420 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.1315118214 Sep 09 05:48:02 AM UTC 24 Sep 09 05:48:06 AM UTC 24 6034239932 ps
T252 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_interrupt.1326073639 Sep 09 05:24:58 AM UTC 24 Sep 09 05:48:06 AM UTC 24 494557453155 ps
T276 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.3491598739 Sep 09 05:47:54 AM UTC 24 Sep 09 05:48:14 AM UTC 24 79292973948 ps
T482 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.3725810412 Sep 09 05:43:12 AM UTC 24 Sep 09 05:48:18 AM UTC 24 165478991780 ps
T483 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_interrupt_fixed.795912185 Sep 09 05:32:51 AM UTC 24 Sep 09 05:48:31 AM UTC 24 331021134467 ps
T484 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_wakeup_fixed.2407035595 Sep 09 05:20:38 AM UTC 24 Sep 09 05:48:36 AM UTC 24 586810982212 ps
T268 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.1309553021 Sep 09 05:46:23 AM UTC 24 Sep 09 05:48:43 AM UTC 24 352710412100 ps
T257 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.1164686491 Sep 09 05:44:47 AM UTC 24 Sep 09 05:48:50 AM UTC 24 345570352840 ps
T485 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.771065181 Sep 09 05:45:39 AM UTC 24 Sep 09 05:48:52 AM UTC 24 327010904794 ps
T486 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.2531406789 Sep 09 05:48:50 AM UTC 24 Sep 09 05:48:56 AM UTC 24 3408566273 ps
T316 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.536428250 Sep 09 05:47:28 AM UTC 24 Sep 09 05:48:59 AM UTC 24 497832973675 ps
T241 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.559073623 Sep 09 05:43:41 AM UTC 24 Sep 09 05:49:16 AM UTC 24 539006318857 ps
T351 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.3460828676 Sep 09 05:48:19 AM UTC 24 Sep 09 05:49:17 AM UTC 24 189221162274 ps
T246 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_both.3300072151 Sep 09 05:36:44 AM UTC 24 Sep 09 05:49:20 AM UTC 24 553800594407 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.3854617561 Sep 09 05:49:18 AM UTC 24 Sep 09 05:49:20 AM UTC 24 476908064 ps
T488 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.3648367374 Sep 09 05:43:08 AM UTC 24 Sep 09 05:49:27 AM UTC 24 162472623438 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled.2436903375 Sep 09 05:34:14 AM UTC 24 Sep 09 05:49:29 AM UTC 24 323364926421 ps
T86 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.3753720859 Sep 09 05:49:00 AM UTC 24 Sep 09 05:49:33 AM UTC 24 7009346490 ps
T98 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.4200282942 Sep 09 05:48:07 AM UTC 24 Sep 09 05:49:34 AM UTC 24 325721921173 ps
T99 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.1986345742 Sep 09 05:41:30 AM UTC 24 Sep 09 05:49:34 AM UTC 24 100264916506 ps
T100 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.4004630247 Sep 09 05:48:53 AM UTC 24 Sep 09 05:49:37 AM UTC 24 42731942320 ps
T101 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.867450103 Sep 09 05:47:53 AM UTC 24 Sep 09 05:49:43 AM UTC 24 26564387886 ps
T102 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.1762320930 Sep 09 05:49:21 AM UTC 24 Sep 09 05:49:47 AM UTC 24 5495014335 ps
T103 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_clock_gating.1245264513 Sep 09 05:43:35 AM UTC 24 Sep 09 05:49:49 AM UTC 24 163766253966 ps
T104 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.2650736800 Sep 09 05:44:23 AM UTC 24 Sep 09 05:50:01 AM UTC 24 327239639686 ps
T105 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.1204449288 Sep 09 05:46:04 AM UTC 24 Sep 09 05:50:02 AM UTC 24 327220307424 ps
T106 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.822927993 Sep 09 05:47:34 AM UTC 24 Sep 09 05:50:02 AM UTC 24 202971210487 ps
T490 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.821676823 Sep 09 05:49:48 AM UTC 24 Sep 09 05:50:07 AM UTC 24 3879653175 ps
T491 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.925370861 Sep 09 05:50:08 AM UTC 24 Sep 09 05:50:11 AM UTC 24 524503002 ps
T492 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.17431848 Sep 09 05:50:12 AM UTC 24 Sep 09 05:50:36 AM UTC 24 5718199770 ps
T224 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_fsm_reset.1060630184 Sep 09 05:33:39 AM UTC 24 Sep 09 05:50:43 AM UTC 24 137797231972 ps
T352 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.2452789167 Sep 09 05:50:03 AM UTC 24 Sep 09 05:50:45 AM UTC 24 70144746830 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled_fixed.429302671 Sep 09 05:39:29 AM UTC 24 Sep 09 05:50:47 AM UTC 24 488016582325 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.1198802666 Sep 09 05:39:50 AM UTC 24 Sep 09 05:50:47 AM UTC 24 207559004319 ps
T495 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.1975221105 Sep 09 05:49:50 AM UTC 24 Sep 09 05:50:55 AM UTC 24 30361438804 ps
T275 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.240249362 Sep 09 05:45:33 AM UTC 24 Sep 09 05:50:56 AM UTC 24 495393677153 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.3747359527 Sep 09 05:47:55 AM UTC 24 Sep 09 05:51:09 AM UTC 24 333332493065 ps
T226 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled.2493028639 Sep 09 05:36:07 AM UTC 24 Sep 09 05:51:10 AM UTC 24 330817997203 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.3134382866 Sep 09 05:51:11 AM UTC 24 Sep 09 05:51:18 AM UTC 24 3867127421 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_polled_fixed.2937328878 Sep 09 05:23:12 AM UTC 24 Sep 09 05:51:32 AM UTC 24 499890607388 ps
T498 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.3752788740 Sep 09 05:51:19 AM UTC 24 Sep 09 05:51:40 AM UTC 24 42399190037 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.2684081896 Sep 09 05:44:26 AM UTC 24 Sep 09 05:51:46 AM UTC 24 550951069488 ps
T499 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.587331478 Sep 09 05:49:35 AM UTC 24 Sep 09 05:51:53 AM UTC 24 194468849689 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.2118907360 Sep 09 05:51:41 AM UTC 24 Sep 09 05:51:53 AM UTC 24 2346512311 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.698560531 Sep 09 05:51:53 AM UTC 24 Sep 09 05:51:56 AM UTC 24 278713587 ps
T330 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_clock_gating.1955121283 Sep 09 05:36:35 AM UTC 24 Sep 09 05:51:59 AM UTC 24 329270420621 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.258033313 Sep 09 05:51:54 AM UTC 24 Sep 09 05:51:59 AM UTC 24 5953332295 ps
T503 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_wakeup.2891012399 Sep 09 05:28:33 AM UTC 24 Sep 09 05:52:03 AM UTC 24 567296318751 ps
T325 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.2702539579 Sep 09 05:48:02 AM UTC 24 Sep 09 05:52:21 AM UTC 24 328541300984 ps
T283 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.149457698 Sep 09 05:50:57 AM UTC 24 Sep 09 05:52:43 AM UTC 24 329570315424 ps
T194 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.24958977 Sep 09 05:44:59 AM UTC 24 Sep 09 05:52:46 AM UTC 24 517992748459 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_clock_gating.1545028286 Sep 09 05:25:17 AM UTC 24 Sep 09 05:52:57 AM UTC 24 484789162044 ps
T364 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.1872403323 Sep 09 05:50:45 AM UTC 24 Sep 09 05:53:20 AM UTC 24 167311851622 ps
T504 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled_fixed.211666490 Sep 09 05:37:15 AM UTC 24 Sep 09 05:53:21 AM UTC 24 326084031824 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.394292738 Sep 09 05:48:36 AM UTC 24 Sep 09 05:53:23 AM UTC 24 165379313813 ps
T350 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.360798080 Sep 09 05:49:30 AM UTC 24 Sep 09 05:53:27 AM UTC 24 163742711095 ps
T313 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.1465590853 Sep 09 05:51:59 AM UTC 24 Sep 09 05:53:34 AM UTC 24 163847938925 ps
T269 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all.795901640 Sep 09 05:30:47 AM UTC 24 Sep 09 05:53:42 AM UTC 24 497990801551 ps
T31 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.2176754658 Sep 09 05:53:28 AM UTC 24 Sep 09 05:53:42 AM UTC 24 13551104047 ps
T506 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.3941977112 Sep 09 05:53:42 AM UTC 24 Sep 09 05:53:45 AM UTC 24 318937555 ps
T507 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.1591732854 Sep 09 05:53:21 AM UTC 24 Sep 09 05:53:46 AM UTC 24 4069272101 ps
T240 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.752760147 Sep 09 05:48:07 AM UTC 24 Sep 09 05:53:53 AM UTC 24 328949509061 ps
T335 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.4055908807 Sep 09 05:41:21 AM UTC 24 Sep 09 05:54:06 AM UTC 24 496699441586 ps
T508 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.991136467 Sep 09 05:53:42 AM UTC 24 Sep 09 05:54:07 AM UTC 24 5712785269 ps
T509 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.3059833564 Sep 09 05:53:22 AM UTC 24 Sep 09 05:54:10 AM UTC 24 39191124041 ps
T510 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.2557661530 Sep 09 05:51:59 AM UTC 24 Sep 09 05:54:21 AM UTC 24 331236339507 ps
T511 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.790860421 Sep 09 05:50:37 AM UTC 24 Sep 09 05:54:33 AM UTC 24 163195963029 ps
T278 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.3294002917 Sep 09 05:42:18 AM UTC 24 Sep 09 05:54:34 AM UTC 24 540440176242 ps
T512 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.446287214 Sep 09 05:44:33 AM UTC 24 Sep 09 05:54:35 AM UTC 24 192832517930 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.2726537475 Sep 09 05:52:04 AM UTC 24 Sep 09 05:54:37 AM UTC 24 164444962590 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt_fixed.2260542367 Sep 09 05:49:34 AM UTC 24 Sep 09 05:54:41 AM UTC 24 166225261785 ps
T515 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.2702435256 Sep 09 05:54:35 AM UTC 24 Sep 09 05:54:43 AM UTC 24 3181651637 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.416003311 Sep 09 05:47:40 AM UTC 24 Sep 09 05:54:46 AM UTC 24 337415498964 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.1828267110 Sep 09 05:54:47 AM UTC 24 Sep 09 05:54:52 AM UTC 24 475937979 ps
T517 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.228399848 Sep 09 05:54:42 AM UTC 24 Sep 09 05:54:56 AM UTC 24 5219202272 ps
T518 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.3491242404 Sep 09 05:54:35 AM UTC 24 Sep 09 05:54:57 AM UTC 24 24587575296 ps
T519 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup_fixed.1054284512 Sep 09 05:38:19 AM UTC 24 Sep 09 05:55:00 AM UTC 24 400023629653 ps
T221 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.2908054270 Sep 09 05:44:10 AM UTC 24 Sep 09 05:55:01 AM UTC 24 124613842753 ps
T292 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.3416691441 Sep 09 05:49:37 AM UTC 24 Sep 09 05:55:09 AM UTC 24 349122426545 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.2322843324 Sep 09 05:54:53 AM UTC 24 Sep 09 05:55:17 AM UTC 24 5806049726 ps
T281 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.1953746710 Sep 09 05:46:58 AM UTC 24 Sep 09 05:55:27 AM UTC 24 343110893615 ps
T521 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.3060105563 Sep 09 05:51:57 AM UTC 24 Sep 09 05:55:45 AM UTC 24 331241062909 ps
T297 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.1968047735 Sep 09 05:53:35 AM UTC 24 Sep 09 05:55:57 AM UTC 24 394720473551 ps
T522 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.475968071 Sep 09 05:47:24 AM UTC 24 Sep 09 05:55:58 AM UTC 24 168889313355 ps
T523 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.2740713117 Sep 09 05:55:58 AM UTC 24 Sep 09 05:56:02 AM UTC 24 2881838053 ps
T368 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.2613885301 Sep 09 05:55:28 AM UTC 24 Sep 09 05:56:10 AM UTC 24 161492163395 ps
T524 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.4021037154 Sep 09 05:55:10 AM UTC 24 Sep 09 05:56:18 AM UTC 24 185811690718 ps
T525 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.1868520453 Sep 09 05:49:28 AM UTC 24 Sep 09 05:56:23 AM UTC 24 326458676246 ps
T526 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.2725366899 Sep 09 05:42:21 AM UTC 24 Sep 09 05:56:27 AM UTC 24 614868069151 ps
T527 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.4026378509 Sep 09 05:56:25 AM UTC 24 Sep 09 05:56:28 AM UTC 24 350748212 ps
T87 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.3592807990 Sep 09 05:56:11 AM UTC 24 Sep 09 05:56:28 AM UTC 24 56946940147 ps
T89 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.4192090762 Sep 09 05:49:44 AM UTC 24 Sep 09 05:56:38 AM UTC 24 343458206336 ps
T90 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.1129640379 Sep 09 05:45:19 AM UTC 24 Sep 09 05:56:44 AM UTC 24 129399180850 ps
T91 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.3484117613 Sep 09 05:53:54 AM UTC 24 Sep 09 05:56:43 AM UTC 24 166055394804 ps
T92 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.3663094232 Sep 09 05:44:15 AM UTC 24 Sep 09 05:56:54 AM UTC 24 521540554010 ps
T93 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.2942455436 Sep 09 05:56:28 AM UTC 24 Sep 09 05:56:55 AM UTC 24 6056652902 ps
T94 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.3630213273 Sep 09 05:55:02 AM UTC 24 Sep 09 05:57:01 AM UTC 24 167061586476 ps
T95 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.2194312771 Sep 09 05:52:58 AM UTC 24 Sep 09 05:57:02 AM UTC 24 346037961775 ps
T96 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.1637933567 Sep 09 05:55:58 AM UTC 24 Sep 09 05:57:07 AM UTC 24 32772444267 ps
T97 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.3266442006 Sep 09 05:57:03 AM UTC 24 Sep 09 05:57:08 AM UTC 24 3486654623 ps
T528 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.3509644668 Sep 09 05:44:23 AM UTC 24 Sep 09 05:57:14 AM UTC 24 492013810894 ps
T32 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.3984418551 Sep 09 05:57:15 AM UTC 24 Sep 09 05:57:22 AM UTC 24 5445560519 ps
T529 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.1954215838 Sep 09 05:57:08 AM UTC 24 Sep 09 05:57:24 AM UTC 24 26478963313 ps
T530 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.2314754716 Sep 09 05:48:32 AM UTC 24 Sep 09 05:57:24 AM UTC 24 403270320951 ps
T531 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.2871517334 Sep 09 05:57:22 AM UTC 24 Sep 09 05:57:24 AM UTC 24 413286634 ps
T329 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.1317568988 Sep 09 05:52:47 AM UTC 24 Sep 09 05:57:25 AM UTC 24 585681010583 ps
T532 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.2648056641 Sep 09 05:57:24 AM UTC 24 Sep 09 05:57:29 AM UTC 24 5816954511 ps
T533 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.2219062476 Sep 09 05:54:11 AM UTC 24 Sep 09 05:57:35 AM UTC 24 404427169940 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.2879038153 Sep 09 05:47:39 AM UTC 24 Sep 09 05:57:38 AM UTC 24 489989815687 ps
T338 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.2592378378 Sep 09 05:53:47 AM UTC 24 Sep 09 05:57:39 AM UTC 24 325985897594 ps
T534 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.2103962668 Sep 09 05:50:55 AM UTC 24 Sep 09 05:57:43 AM UTC 24 406399259282 ps
T535 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.3622352803 Sep 09 05:49:21 AM UTC 24 Sep 09 05:58:00 AM UTC 24 492014381259 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt_fixed.3682654333 Sep 09 05:36:16 AM UTC 24 Sep 09 05:58:01 AM UTC 24 489426060037 ps
T359 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.2189062181 Sep 09 05:43:00 AM UTC 24 Sep 09 05:58:10 AM UTC 24 358324405451 ps
T537 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.2847625418 Sep 09 05:55:18 AM UTC 24 Sep 09 05:58:11 AM UTC 24 201059148762 ps
T538 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.2103698010 Sep 09 05:58:01 AM UTC 24 Sep 09 05:58:12 AM UTC 24 4818364885 ps
T539 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.124555583 Sep 09 05:53:47 AM UTC 24 Sep 09 05:58:14 AM UTC 24 491752430105 ps
T314 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.3564481896 Sep 09 05:49:17 AM UTC 24 Sep 09 05:58:14 AM UTC 24 336588900354 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.3670593845 Sep 09 05:57:01 AM UTC 24 Sep 09 05:58:17 AM UTC 24 170236985329 ps
T540 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.3745684887 Sep 09 05:58:15 AM UTC 24 Sep 09 05:58:18 AM UTC 24 288993657 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.930044226 Sep 09 05:49:34 AM UTC 24 Sep 09 05:58:25 AM UTC 24 353272647787 ps
T33 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.306940033 Sep 09 05:58:12 AM UTC 24 Sep 09 05:58:30 AM UTC 24 2625095555 ps
T541 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.3269182605 Sep 09 05:51:10 AM UTC 24 Sep 09 05:58:31 AM UTC 24 168320707179 ps
T360 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.175514570 Sep 09 05:50:03 AM UTC 24 Sep 09 05:58:32 AM UTC 24 385939858754 ps
T542 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.4163017201 Sep 09 05:50:47 AM UTC 24 Sep 09 05:58:34 AM UTC 24 161754431218 ps
T282 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.3990667295 Sep 09 05:42:06 AM UTC 24 Sep 09 05:58:35 AM UTC 24 497060311410 ps
T543 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.368638184 Sep 09 05:58:15 AM UTC 24 Sep 09 05:58:40 AM UTC 24 6201559795 ps
T544 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all.3628910598 Sep 09 05:36:58 AM UTC 24 Sep 09 05:58:40 AM UTC 24 329994943208 ps
T545 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.323833810 Sep 09 05:54:58 AM UTC 24 Sep 09 05:58:48 AM UTC 24 329147187282 ps
T546 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.828459418 Sep 09 05:58:41 AM UTC 24 Sep 09 05:58:55 AM UTC 24 4693879515 ps
T547 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.3024961376 Sep 09 05:50:43 AM UTC 24 Sep 09 05:59:11 AM UTC 24 324712630600 ps
T548 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.3455496060 Sep 09 05:58:56 AM UTC 24 Sep 09 05:59:18 AM UTC 24 33036662580 ps
T549 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.1489548763 Sep 09 05:59:18 AM UTC 24 Sep 09 05:59:20 AM UTC 24 426576430 ps
T550 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.3967633222 Sep 09 05:47:36 AM UTC 24 Sep 09 05:59:46 AM UTC 24 393457726385 ps
T551 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.2327443718 Sep 09 05:59:21 AM UTC 24 Sep 09 05:59:47 AM UTC 24 5952950614 ps
T552 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.1064292474 Sep 09 05:46:48 AM UTC 24 Sep 09 05:59:48 AM UTC 24 117987534926 ps
T553 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_interrupt_fixed.663283862 Sep 09 05:34:35 AM UTC 24 Sep 09 05:59:49 AM UTC 24 491554632506 ps
T216 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.1362019374 Sep 09 05:48:57 AM UTC 24 Sep 09 05:59:49 AM UTC 24 127565311144 ps
T554 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.2277835149 Sep 09 05:58:42 AM UTC 24 Sep 09 05:59:50 AM UTC 24 32228455643 ps
T555 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.106707350 Sep 09 05:58:02 AM UTC 24 Sep 09 05:59:56 AM UTC 24 30222841955 ps
T336 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.1235607629 Sep 09 05:58:36 AM UTC 24 Sep 09 05:59:57 AM UTC 24 163851989475 ps
T191 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.4271428562 Sep 09 05:55:45 AM UTC 24 Sep 09 06:00:11 AM UTC 24 492526174443 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.3910988861 Sep 09 05:51:33 AM UTC 24 Sep 09 06:00:28 AM UTC 24 89912693182 ps
T556 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.3493595514 Sep 09 06:00:12 AM UTC 24 Sep 09 06:00:35 AM UTC 24 4635847302 ps
T357 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.3459019026 Sep 09 05:57:26 AM UTC 24 Sep 09 06:00:41 AM UTC 24 331530971080 ps
T557 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt_fixed.3396738007 Sep 09 05:57:29 AM UTC 24 Sep 09 06:00:42 AM UTC 24 329714585113 ps
T558 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.1205752969 Sep 09 05:50:02 AM UTC 24 Sep 09 06:00:46 AM UTC 24 80852046015 ps
T559 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.3020254282 Sep 09 06:00:47 AM UTC 24 Sep 09 06:00:50 AM UTC 24 444063565 ps
T560 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.1599277494 Sep 09 06:00:29 AM UTC 24 Sep 09 06:00:56 AM UTC 24 29689355857 ps
T561 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.2821767619 Sep 09 06:00:51 AM UTC 24 Sep 09 06:01:00 AM UTC 24 6114501523 ps
T39 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.720890537 Sep 09 06:00:42 AM UTC 24 Sep 09 06:01:01 AM UTC 24 51439421018 ps
T562 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.3143339732 Sep 09 05:59:49 AM UTC 24 Sep 09 06:01:20 AM UTC 24 165198048109 ps
T563 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.2933934252 Sep 09 05:52:44 AM UTC 24 Sep 09 06:01:35 AM UTC 24 191196593741 ps
T564 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.366781693 Sep 09 05:56:02 AM UTC 24 Sep 09 06:01:47 AM UTC 24 84083681066 ps
T565 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled_fixed.2070126445 Sep 09 05:59:47 AM UTC 24 Sep 09 06:02:02 AM UTC 24 323152472056 ps
T376 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.175516744 Sep 09 05:47:53 AM UTC 24 Sep 09 06:02:16 AM UTC 24 128125453917 ps
T566 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.111909424 Sep 09 05:54:07 AM UTC 24 Sep 09 06:02:20 AM UTC 24 164770211474 ps
T567 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.1900769423 Sep 09 06:02:20 AM UTC 24 Sep 09 06:02:41 AM UTC 24 4318683361 ps
T568 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.2402955956 Sep 09 05:47:10 AM UTC 24 Sep 09 06:03:01 AM UTC 24 323371751600 ps
T192 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.2669934006 Sep 09 05:59:47 AM UTC 24 Sep 09 06:03:08 AM UTC 24 487940285923 ps
T569 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.3476457014 Sep 09 06:03:09 AM UTC 24 Sep 09 06:03:16 AM UTC 24 1701979095 ps
T570 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.3506817418 Sep 09 06:02:42 AM UTC 24 Sep 09 06:03:27 AM UTC 24 40972981154 ps
T571 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.1709256614 Sep 09 06:03:28 AM UTC 24 Sep 09 06:03:31 AM UTC 24 448039940 ps
T307 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.1131324673 Sep 09 06:02:03 AM UTC 24 Sep 09 06:03:35 AM UTC 24 236765103839 ps
T572 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.1969300805 Sep 09 05:58:11 AM UTC 24 Sep 09 06:03:37 AM UTC 24 86686429936 ps
T573 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.2773599427 Sep 09 06:03:31 AM UTC 24 Sep 09 06:03:37 AM UTC 24 6002716709 ps
T574 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.2520094657 Sep 09 05:56:44 AM UTC 24 Sep 09 06:03:42 AM UTC 24 487937403533 ps
T575 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.3729781913 Sep 09 05:44:22 AM UTC 24 Sep 09 06:04:05 AM UTC 24 490582637062 ps
T576 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.1251121120 Sep 09 05:57:25 AM UTC 24 Sep 09 06:04:16 AM UTC 24 321810312229 ps
T195 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.2725638155 Sep 09 05:57:40 AM UTC 24 Sep 09 06:04:19 AM UTC 24 504555058508 ps
T577 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.2925436152 Sep 09 05:58:30 AM UTC 24 Sep 09 06:04:19 AM UTC 24 160107713147 ps
T284 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.847619664 Sep 09 05:46:33 AM UTC 24 Sep 09 06:04:24 AM UTC 24 430905925993 ps
T578 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.3428008545 Sep 09 06:01:02 AM UTC 24 Sep 09 06:04:26 AM UTC 24 160612375715 ps
T579 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.2754553166 Sep 09 06:04:25 AM UTC 24 Sep 09 06:04:33 AM UTC 24 5218853486 ps
T580 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.1079013524 Sep 09 05:58:26 AM UTC 24 Sep 09 06:04:49 AM UTC 24 165139651724 ps
T581 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.1836473674 Sep 09 05:54:38 AM UTC 24 Sep 09 06:04:58 AM UTC 24 118144152132 ps
T582 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.3127301415 Sep 09 06:04:49 AM UTC 24 Sep 09 06:04:58 AM UTC 24 3853903896 ps
T583 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.1043437465 Sep 09 06:04:59 AM UTC 24 Sep 09 06:05:02 AM UTC 24 532620118 ps
T177 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.3022499031 Sep 09 05:59:58 AM UTC 24 Sep 09 06:05:07 AM UTC 24 499833981594 ps
T584 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup_fixed.1643019288 Sep 09 06:01:48 AM UTC 24 Sep 09 06:05:11 AM UTC 24 200589281995 ps
T585 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.4094202955 Sep 09 05:59:57 AM UTC 24 Sep 09 06:05:16 AM UTC 24 338218110631 ps
T586 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled_fixed.2488553253 Sep 09 05:58:19 AM UTC 24 Sep 09 06:05:19 AM UTC 24 165221899273 ps
T587 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.3447524621 Sep 09 06:05:04 AM UTC 24 Sep 09 06:05:29 AM UTC 24 5959869465 ps
T588 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all.151375633 Sep 09 05:56:19 AM UTC 24 Sep 09 06:05:36 AM UTC 24 265882303842 ps
T589 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.2644835170 Sep 09 06:04:27 AM UTC 24 Sep 09 06:05:39 AM UTC 24 28031859555 ps
T222 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.3124303925 Sep 09 05:57:17 AM UTC 24 Sep 09 06:05:43 AM UTC 24 820565467994 ps
T339 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.829876781 Sep 09 05:56:45 AM UTC 24 Sep 09 06:05:46 AM UTC 24 666483831039 ps
T193 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.1104740744 Sep 09 05:59:50 AM UTC 24 Sep 09 06:05:46 AM UTC 24 540801335284 ps
T590 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.2528385064 Sep 09 06:05:46 AM UTC 24 Sep 09 06:05:55 AM UTC 24 2986328494 ps
T369 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.124329335 Sep 09 05:50:48 AM UTC 24 Sep 09 06:06:01 AM UTC 24 565269243796 ps
T311 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.3837248432 Sep 09 06:06:03 AM UTC 24 Sep 09 06:06:11 AM UTC 24 5298737617 ps
T371 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.314339820 Sep 09 05:56:56 AM UTC 24 Sep 09 06:06:13 AM UTC 24 330827450086 ps
T591 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.1317642901 Sep 09 06:06:14 AM UTC 24 Sep 09 06:06:16 AM UTC 24 423770347 ps
T380 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_fsm_reset.1345311386 Sep 09 06:00:36 AM UTC 24 Sep 09 06:06:22 AM UTC 24 74833549063 ps
T592 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.3853822562 Sep 09 05:58:49 AM UTC 24 Sep 09 06:06:35 AM UTC 24 115533964103 ps
T593 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.282700126 Sep 09 06:06:17 AM UTC 24 Sep 09 06:06:43 AM UTC 24 6053410652 ps
T594 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.896435669 Sep 09 06:01:00 AM UTC 24 Sep 09 06:07:06 AM UTC 24 482331856629 ps
T198 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled.3851483608 Sep 09 06:00:57 AM UTC 24 Sep 09 06:07:15 AM UTC 24 488567464111 ps
T326 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.2997202581 Sep 09 05:54:22 AM UTC 24 Sep 09 06:07:29 AM UTC 24 487469444822 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_both.334435156 Sep 09 06:04:20 AM UTC 24 Sep 09 06:07:40 AM UTC 24 331126032441 ps
T595 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.1998541195 Sep 09 06:05:47 AM UTC 24 Sep 09 06:07:45 AM UTC 24 28072968770 ps
T596 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt_fixed.67412926 Sep 09 06:05:19 AM UTC 24 Sep 09 06:08:01 AM UTC 24 163211720012 ps
T341 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.4018931403 Sep 09 05:59:49 AM UTC 24 Sep 09 06:08:05 AM UTC 24 157928612784 ps
T597 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.1285179130 Sep 09 06:08:02 AM UTC 24 Sep 09 06:08:08 AM UTC 24 4233109076 ps
T598 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.4101314613 Sep 09 05:53:23 AM UTC 24 Sep 09 06:08:09 AM UTC 24 138828127451 ps
T599 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.2334954767 Sep 09 05:57:24 AM UTC 24 Sep 09 06:08:11 AM UTC 24 496895068538 ps
T309 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled.1576349339 Sep 09 06:05:08 AM UTC 24 Sep 09 06:08:14 AM UTC 24 163161459704 ps
T600 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.3830469729 Sep 09 06:08:15 AM UTC 24 Sep 09 06:08:17 AM UTC 24 359384954 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.342237591 Sep 09 05:54:44 AM UTC 24 Sep 09 06:08:18 AM UTC 24 696213962023 ps
T601 /workspaces/repo/scratch/os_regression_2024_09_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.4064282857 Sep 09 05:48:15 AM UTC 24 Sep 09 06:08:25 AM UTC 24 492748156698 ps
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