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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.70 99.07 96.67 100.00 100.00 98.82 98.33 90.99


Total test records in report: 919
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T222 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_fsm_reset.3575571180 Sep 18 06:50:30 AM UTC 24 Sep 18 06:58:04 AM UTC 24 82613735089 ps
T283 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_both.607901055 Sep 18 06:52:32 AM UTC 24 Sep 18 06:58:05 AM UTC 24 167338875186 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_clock_gating.1733994090 Sep 18 06:55:51 AM UTC 24 Sep 18 06:58:06 AM UTC 24 176380861426 ps
T247 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_both.1828261983 Sep 18 06:51:09 AM UTC 24 Sep 18 06:58:06 AM UTC 24 558116320844 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.3727771437 Sep 18 06:58:07 AM UTC 24 Sep 18 06:58:17 AM UTC 24 3411572405 ps
T430 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled_fixed.547727225 Sep 18 06:51:52 AM UTC 24 Sep 18 06:58:20 AM UTC 24 496359415847 ps
T431 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_lowpower_counter.2076257416 Sep 18 06:57:14 AM UTC 24 Sep 18 06:58:20 AM UTC 24 32953718285 ps
T223 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_fsm_reset.203042501 Sep 18 06:44:58 AM UTC 24 Sep 18 06:58:23 AM UTC 24 120205779991 ps
T157 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.518208898 Sep 18 06:58:21 AM UTC 24 Sep 18 06:58:39 AM UTC 24 10286299956 ps
T432 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.246639441 Sep 18 06:58:40 AM UTC 24 Sep 18 06:58:44 AM UTC 24 363892867 ps
T433 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.1184080842 Sep 18 06:56:32 AM UTC 24 Sep 18 06:59:00 AM UTC 24 325989387328 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.4189669894 Sep 18 06:58:44 AM UTC 24 Sep 18 06:59:11 AM UTC 24 5834812337 ps
T435 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.2675143492 Sep 18 06:55:53 AM UTC 24 Sep 18 06:59:26 AM UTC 24 166961375833 ps
T436 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.2031736496 Sep 18 06:58:18 AM UTC 24 Sep 18 06:59:31 AM UTC 24 37929540346 ps
T260 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_stress_all.3570328351 Sep 18 06:51:36 AM UTC 24 Sep 18 06:59:35 AM UTC 24 182853886663 ps
T259 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_clock_gating.3729995051 Sep 18 06:36:33 AM UTC 24 Sep 18 07:00:12 AM UTC 24 506286290528 ps
T437 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_fsm_reset.681180609 Sep 18 06:51:28 AM UTC 24 Sep 18 07:00:25 AM UTC 24 128467128944 ps
T255 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_stress_all.2206017200 Sep 18 06:55:16 AM UTC 24 Sep 18 07:00:33 AM UTC 24 405163120918 ps
T296 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_wakeup.2903254744 Sep 18 06:36:19 AM UTC 24 Sep 18 07:00:49 AM UTC 24 554671215535 ps
T326 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.448827125 Sep 18 06:57:58 AM UTC 24 Sep 18 07:00:51 AM UTC 24 164565469343 ps
T263 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup.3950365496 Sep 18 06:49:52 AM UTC 24 Sep 18 07:00:52 AM UTC 24 193155789165 ps
T276 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_clock_gating.3939586203 Sep 18 06:50:04 AM UTC 24 Sep 18 07:00:54 AM UTC 24 563856455453 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.3128757912 Sep 18 06:58:05 AM UTC 24 Sep 18 07:00:56 AM UTC 24 165436062672 ps
T439 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.2399772973 Sep 18 07:00:50 AM UTC 24 Sep 18 07:01:01 AM UTC 24 3814576388 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.3794186885 Sep 18 07:01:02 AM UTC 24 Sep 18 07:01:05 AM UTC 24 364151449 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.240046738 Sep 18 07:00:51 AM UTC 24 Sep 18 07:01:07 AM UTC 24 32582669098 ps
T442 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled.2249215346 Sep 18 06:56:27 AM UTC 24 Sep 18 07:01:09 AM UTC 24 331391811219 ps
T443 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.1394128140 Sep 18 07:00:54 AM UTC 24 Sep 18 07:01:11 AM UTC 24 3296451913 ps
T174 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_polled.696466493 Sep 18 06:41:44 AM UTC 24 Sep 18 07:01:26 AM UTC 24 490608036492 ps
T444 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.2514429260 Sep 18 07:01:05 AM UTC 24 Sep 18 07:01:29 AM UTC 24 6021161752 ps
T207 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_fsm_reset.3839905766 Sep 18 06:49:23 AM UTC 24 Sep 18 07:01:45 AM UTC 24 121884800935 ps
T445 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.2230988845 Sep 18 06:58:00 AM UTC 24 Sep 18 07:01:45 AM UTC 24 165512914620 ps
T446 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.1827302926 Sep 18 06:58:24 AM UTC 24 Sep 18 07:02:20 AM UTC 24 194458884602 ps
T43 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all.3237634456 Sep 18 06:52:57 AM UTC 24 Sep 18 07:02:33 AM UTC 24 165538207766 ps
T447 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.1104359373 Sep 18 06:56:36 AM UTC 24 Sep 18 07:02:35 AM UTC 24 500918430986 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.1677590626 Sep 18 07:02:34 AM UTC 24 Sep 18 07:02:46 AM UTC 24 4754129441 ps
T302 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.939493145 Sep 18 06:54:13 AM UTC 24 Sep 18 07:02:54 AM UTC 24 165439766005 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.3335522362 Sep 18 07:01:46 AM UTC 24 Sep 18 07:03:09 AM UTC 24 215913878952 ps
T450 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.1091167018 Sep 18 07:02:55 AM UTC 24 Sep 18 07:03:12 AM UTC 24 3740253978 ps
T451 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.1926746410 Sep 18 07:03:14 AM UTC 24 Sep 18 07:03:16 AM UTC 24 517033090 ps
T211 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.667462013 Sep 18 06:52:42 AM UTC 24 Sep 18 07:03:20 AM UTC 24 111332426035 ps
T452 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.2767750817 Sep 18 07:03:17 AM UTC 24 Sep 18 07:03:23 AM UTC 24 6093303730 ps
T453 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.3680319968 Sep 18 06:55:24 AM UTC 24 Sep 18 07:03:37 AM UTC 24 334310749116 ps
T275 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup.2502930686 Sep 18 06:53:32 AM UTC 24 Sep 18 07:03:41 AM UTC 24 421082263659 ps
T189 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.2669061017 Sep 18 06:59:27 AM UTC 24 Sep 18 07:03:44 AM UTC 24 495806460084 ps
T454 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.2117621059 Sep 18 07:01:46 AM UTC 24 Sep 18 07:03:47 AM UTC 24 165111772230 ps
T455 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.458997358 Sep 18 06:53:40 AM UTC 24 Sep 18 07:03:51 AM UTC 24 407505811127 ps
T316 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_clock_gating.3963684267 Sep 18 06:56:50 AM UTC 24 Sep 18 07:03:59 AM UTC 24 162756189479 ps
T456 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.1906493714 Sep 18 07:02:35 AM UTC 24 Sep 18 07:04:21 AM UTC 24 31418805100 ps
T158 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_clock_gating.16445303 Sep 18 06:44:32 AM UTC 24 Sep 18 07:04:27 AM UTC 24 529862111311 ps
T457 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.107480728 Sep 18 07:04:22 AM UTC 24 Sep 18 07:04:33 AM UTC 24 4236679887 ps
T458 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.4101261304 Sep 18 06:59:00 AM UTC 24 Sep 18 07:04:36 AM UTC 24 326736599137 ps
T327 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.1357005335 Sep 18 06:58:06 AM UTC 24 Sep 18 07:05:03 AM UTC 24 164912418045 ps
T24 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.3601123765 Sep 18 07:04:37 AM UTC 24 Sep 18 07:05:04 AM UTC 24 11785502458 ps
T238 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.1566359581 Sep 18 06:56:33 AM UTC 24 Sep 18 07:05:05 AM UTC 24 328084178524 ps
T459 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.4287142289 Sep 18 07:05:05 AM UTC 24 Sep 18 07:05:07 AM UTC 24 486124331 ps
T282 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.4245200695 Sep 18 06:56:54 AM UTC 24 Sep 18 07:05:11 AM UTC 24 369069700894 ps
T460 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.1838432511 Sep 18 07:05:05 AM UTC 24 Sep 18 07:05:13 AM UTC 24 6730840068 ps
T257 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all.1656621962 Sep 18 06:50:36 AM UTC 24 Sep 18 07:05:16 AM UTC 24 327223165305 ps
T330 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.1036506566 Sep 18 06:58:07 AM UTC 24 Sep 18 07:05:17 AM UTC 24 157816931998 ps
T303 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_clock_gating.2343244090 Sep 18 06:50:57 AM UTC 24 Sep 18 07:05:20 AM UTC 24 399225705817 ps
T234 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt.103745831 Sep 18 06:49:49 AM UTC 24 Sep 18 07:05:22 AM UTC 24 322655586957 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.2622740801 Sep 18 07:05:06 AM UTC 24 Sep 18 07:05:26 AM UTC 24 6037609691 ps
T462 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.2196940268 Sep 18 07:01:10 AM UTC 24 Sep 18 07:05:35 AM UTC 24 501439650479 ps
T463 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.2894315660 Sep 18 07:05:36 AM UTC 24 Sep 18 07:05:41 AM UTC 24 2880953539 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup_fixed.476471368 Sep 18 06:47:57 AM UTC 24 Sep 18 07:05:46 AM UTC 24 401451535331 ps
T261 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_clock_gating.269497069 Sep 18 06:54:02 AM UTC 24 Sep 18 07:05:52 AM UTC 24 530484121241 ps
T465 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.3725599733 Sep 18 07:05:42 AM UTC 24 Sep 18 07:05:59 AM UTC 24 35712730504 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.1573638724 Sep 18 07:05:53 AM UTC 24 Sep 18 07:06:03 AM UTC 24 10785509103 ps
T467 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.4278142995 Sep 18 07:06:04 AM UTC 24 Sep 18 07:06:06 AM UTC 24 325249441 ps
T468 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled_fixed.2433402567 Sep 18 06:50:44 AM UTC 24 Sep 18 07:06:12 AM UTC 24 327229288053 ps
T469 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.264699363 Sep 18 07:06:07 AM UTC 24 Sep 18 07:06:15 AM UTC 24 5724951444 ps
T240 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.1915953544 Sep 18 07:03:09 AM UTC 24 Sep 18 07:06:17 AM UTC 24 187082619654 ps
T470 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.2717732360 Sep 18 07:04:28 AM UTC 24 Sep 18 07:06:17 AM UTC 24 41030640626 ps
T471 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled_fixed.3125730559 Sep 18 06:45:34 AM UTC 24 Sep 18 07:06:21 AM UTC 24 489731591507 ps
T225 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.696698470 Sep 18 07:03:51 AM UTC 24 Sep 18 07:06:41 AM UTC 24 333522036909 ps
T472 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.4159329464 Sep 18 07:01:12 AM UTC 24 Sep 18 07:06:43 AM UTC 24 167365140535 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_interrupt_fixed.862136997 Sep 18 06:47:47 AM UTC 24 Sep 18 07:06:47 AM UTC 24 502780816552 ps
T251 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.3396001614 Sep 18 06:52:06 AM UTC 24 Sep 18 07:06:49 AM UTC 24 377554599180 ps
T345 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.4187799748 Sep 18 06:57:22 AM UTC 24 Sep 18 07:06:50 AM UTC 24 108687504239 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.1345051595 Sep 18 07:06:49 AM UTC 24 Sep 18 07:07:11 AM UTC 24 4744180251 ps
T475 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.1878282746 Sep 18 07:03:38 AM UTC 24 Sep 18 07:07:28 AM UTC 24 163192252961 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.1205901602 Sep 18 06:58:21 AM UTC 24 Sep 18 07:07:32 AM UTC 24 120480587134 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.1580863045 Sep 18 07:00:13 AM UTC 24 Sep 18 07:07:35 AM UTC 24 592859908104 ps
T478 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.1571667905 Sep 18 07:03:42 AM UTC 24 Sep 18 07:07:37 AM UTC 24 326226710315 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.3904973490 Sep 18 07:07:36 AM UTC 24 Sep 18 07:07:38 AM UTC 24 323884207 ps
T480 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.1322105489 Sep 18 07:06:52 AM UTC 24 Sep 18 07:07:45 AM UTC 24 25196686682 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.2889915112 Sep 18 07:03:48 AM UTC 24 Sep 18 07:07:50 AM UTC 24 213502899566 ps
T344 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.1567941783 Sep 18 06:56:08 AM UTC 24 Sep 18 07:07:50 AM UTC 24 112295353745 ps
T262 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.1593780752 Sep 18 07:00:33 AM UTC 24 Sep 18 07:07:53 AM UTC 24 185700758371 ps
T482 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.1175540855 Sep 18 07:07:38 AM UTC 24 Sep 18 07:08:03 AM UTC 24 5716501429 ps
T175 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.2464635815 Sep 18 07:07:29 AM UTC 24 Sep 18 07:08:05 AM UTC 24 157074932711 ps
T241 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_interrupt.1034646333 Sep 18 06:45:43 AM UTC 24 Sep 18 07:08:13 AM UTC 24 494684149466 ps
T347 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_stress_all.3749251656 Sep 18 06:41:34 AM UTC 24 Sep 18 07:08:21 AM UTC 24 409181762541 ps
T483 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.1401276983 Sep 18 07:08:22 AM UTC 24 Sep 18 07:08:29 AM UTC 24 4685229612 ps
T484 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.2651809030 Sep 18 06:59:32 AM UTC 24 Sep 18 07:08:58 AM UTC 24 163971941979 ps
T485 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.2868491110 Sep 18 07:06:13 AM UTC 24 Sep 18 07:09:05 AM UTC 24 334226966252 ps
T486 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.3198244163 Sep 18 07:09:06 AM UTC 24 Sep 18 07:09:21 AM UTC 24 10832778421 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.4276002449 Sep 18 07:03:21 AM UTC 24 Sep 18 07:09:41 AM UTC 24 158883695372 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.1860151957 Sep 18 07:09:42 AM UTC 24 Sep 18 07:09:45 AM UTC 24 533627261 ps
T488 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.2276727408 Sep 18 07:09:45 AM UTC 24 Sep 18 07:09:50 AM UTC 24 5926213993 ps
T246 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.2234704610 Sep 18 07:01:30 AM UTC 24 Sep 18 07:09:52 AM UTC 24 177067907700 ps
T264 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup.2679158646 Sep 18 06:50:56 AM UTC 24 Sep 18 07:10:01 AM UTC 24 509865227318 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.1597914493 Sep 18 07:06:41 AM UTC 24 Sep 18 07:10:04 AM UTC 24 197958935604 ps
T490 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.2403351713 Sep 18 07:08:30 AM UTC 24 Sep 18 07:10:21 AM UTC 24 40410396492 ps
T212 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.3296329249 Sep 18 07:00:52 AM UTC 24 Sep 18 07:10:26 AM UTC 24 107880593215 ps
T295 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled.240736908 Sep 18 06:45:34 AM UTC 24 Sep 18 07:10:29 AM UTC 24 489714080661 ps
T491 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.2750053525 Sep 18 07:07:45 AM UTC 24 Sep 18 07:10:30 AM UTC 24 164377002862 ps
T492 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.2267741357 Sep 18 07:07:51 AM UTC 24 Sep 18 07:10:32 AM UTC 24 161286843082 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.37100273 Sep 18 07:00:26 AM UTC 24 Sep 18 07:10:39 AM UTC 24 504958659147 ps
T194 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.1102787917 Sep 18 07:03:45 AM UTC 24 Sep 18 07:10:44 AM UTC 24 530811901817 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.3700671757 Sep 18 07:10:33 AM UTC 24 Sep 18 07:10:52 AM UTC 24 4275805750 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.1961760600 Sep 18 07:03:24 AM UTC 24 Sep 18 07:10:56 AM UTC 24 159922909556 ps
T495 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.1154681228 Sep 18 07:10:39 AM UTC 24 Sep 18 07:11:05 AM UTC 24 28919434338 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.4282388896 Sep 18 07:11:05 AM UTC 24 Sep 18 07:11:08 AM UTC 24 294945983 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.404515229 Sep 18 07:10:53 AM UTC 24 Sep 18 07:11:11 AM UTC 24 20214320817 ps
T498 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.658853464 Sep 18 06:52:20 AM UTC 24 Sep 18 07:11:19 AM UTC 24 406853298027 ps
T209 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.3544409938 Sep 18 06:54:55 AM UTC 24 Sep 18 07:11:20 AM UTC 24 129625244758 ps
T499 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.2048046648 Sep 18 07:11:08 AM UTC 24 Sep 18 07:11:26 AM UTC 24 6054625901 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.2947649230 Sep 18 07:05:47 AM UTC 24 Sep 18 07:11:37 AM UTC 24 91082228472 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.1912349929 Sep 18 07:02:46 AM UTC 24 Sep 18 07:11:38 AM UTC 24 101588740586 ps
T290 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.3318574864 Sep 18 07:00:57 AM UTC 24 Sep 18 07:11:55 AM UTC 24 573883307277 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.3860921760 Sep 18 07:07:51 AM UTC 24 Sep 18 07:11:57 AM UTC 24 330559324325 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.1415224485 Sep 18 07:10:04 AM UTC 24 Sep 18 07:12:00 AM UTC 24 498802270415 ps
T503 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.1619271458 Sep 18 07:12:01 AM UTC 24 Sep 18 07:12:05 AM UTC 24 3230027225 ps
T504 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.252391767 Sep 18 07:08:14 AM UTC 24 Sep 18 07:12:17 AM UTC 24 163137286837 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.145618237 Sep 18 07:06:43 AM UTC 24 Sep 18 07:12:23 AM UTC 24 635867520164 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.4233053754 Sep 18 07:07:39 AM UTC 24 Sep 18 07:12:28 AM UTC 24 325910608368 ps
T289 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.27768107 Sep 18 06:56:20 AM UTC 24 Sep 18 07:12:31 AM UTC 24 249266080684 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.1956762159 Sep 18 07:06:48 AM UTC 24 Sep 18 07:12:34 AM UTC 24 320155109250 ps
T506 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.3320180559 Sep 18 07:12:32 AM UTC 24 Sep 18 07:12:36 AM UTC 24 282895472 ps
T177 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_clock_gating.1660004818 Sep 18 06:52:28 AM UTC 24 Sep 18 07:12:38 AM UTC 24 373074502769 ps
T507 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.3567414000 Sep 18 07:12:35 AM UTC 24 Sep 18 07:12:41 AM UTC 24 6086297968 ps
T508 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.801641177 Sep 18 07:10:23 AM UTC 24 Sep 18 07:12:44 AM UTC 24 240750153644 ps
T509 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.1983097679 Sep 18 06:57:29 AM UTC 24 Sep 18 07:12:48 AM UTC 24 283425973260 ps
T510 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.1120899898 Sep 18 07:12:23 AM UTC 24 Sep 18 07:12:51 AM UTC 24 7919714907 ps
T511 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.985529683 Sep 18 07:09:51 AM UTC 24 Sep 18 07:12:59 AM UTC 24 166230324398 ps
T190 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.4042303213 Sep 18 07:08:06 AM UTC 24 Sep 18 07:13:02 AM UTC 24 341226578305 ps
T512 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.1959060616 Sep 18 07:12:06 AM UTC 24 Sep 18 07:13:08 AM UTC 24 45358604997 ps
T333 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled.399446248 Sep 18 06:50:44 AM UTC 24 Sep 18 07:13:18 AM UTC 24 495539315614 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.894364913 Sep 18 07:13:09 AM UTC 24 Sep 18 07:13:19 AM UTC 24 3827128252 ps
T274 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.2720527473 Sep 18 07:07:33 AM UTC 24 Sep 18 07:13:28 AM UTC 24 504993723405 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.436061043 Sep 18 07:13:28 AM UTC 24 Sep 18 07:13:39 AM UTC 24 1374717217 ps
T515 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.3807155812 Sep 18 07:06:22 AM UTC 24 Sep 18 07:13:44 AM UTC 24 172605215217 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.1442439045 Sep 18 07:13:44 AM UTC 24 Sep 18 07:13:48 AM UTC 24 415168595 ps
T517 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.587629201 Sep 18 06:55:49 AM UTC 24 Sep 18 07:13:48 AM UTC 24 395296781296 ps
T518 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.3738236033 Sep 18 07:06:18 AM UTC 24 Sep 18 07:13:55 AM UTC 24 328247400240 ps
T519 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt_fixed.3111792156 Sep 18 06:51:58 AM UTC 24 Sep 18 07:14:00 AM UTC 24 496724475093 ps
T334 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.3500586922 Sep 18 06:58:02 AM UTC 24 Sep 18 07:14:05 AM UTC 24 333637402956 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.3254999564 Sep 18 07:13:46 AM UTC 24 Sep 18 07:14:08 AM UTC 24 6139377570 ps
T521 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup_fixed.1499391318 Sep 18 06:49:52 AM UTC 24 Sep 18 07:14:10 AM UTC 24 585986667862 ps
T522 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.1584351528 Sep 18 06:58:05 AM UTC 24 Sep 18 07:14:10 AM UTC 24 594291054853 ps
T523 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.2797975473 Sep 18 07:06:18 AM UTC 24 Sep 18 07:14:14 AM UTC 24 163122354294 ps
T284 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.1695985663 Sep 18 07:11:38 AM UTC 24 Sep 18 07:14:19 AM UTC 24 406420382705 ps
T524 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.3100206475 Sep 18 07:14:14 AM UTC 24 Sep 18 07:14:21 AM UTC 24 4456214352 ps
T525 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled.3228361623 Sep 18 07:11:12 AM UTC 24 Sep 18 07:14:35 AM UTC 24 326039802612 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.3508551832 Sep 18 07:05:23 AM UTC 24 Sep 18 07:14:37 AM UTC 24 166824315421 ps
T299 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.646195756 Sep 18 07:14:37 AM UTC 24 Sep 18 07:14:42 AM UTC 24 4260786589 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.3141951527 Sep 18 07:05:18 AM UTC 24 Sep 18 07:14:43 AM UTC 24 172839960616 ps
T526 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.2255492364 Sep 18 07:14:44 AM UTC 24 Sep 18 07:14:47 AM UTC 24 363710095 ps
T527 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.3513722507 Sep 18 07:14:44 AM UTC 24 Sep 18 07:14:57 AM UTC 24 5719640854 ps
T528 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.491615655 Sep 18 07:13:19 AM UTC 24 Sep 18 07:15:01 AM UTC 24 38827785558 ps
T529 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.858849089 Sep 18 06:59:12 AM UTC 24 Sep 18 07:15:04 AM UTC 24 493853221505 ps
T298 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all.4239850596 Sep 18 07:12:29 AM UTC 24 Sep 18 07:15:10 AM UTC 24 215974722126 ps
T178 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.729992208 Sep 18 07:13:00 AM UTC 24 Sep 18 07:15:25 AM UTC 24 602242089987 ps
T530 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.3160170700 Sep 18 06:58:04 AM UTC 24 Sep 18 07:15:28 AM UTC 24 333039874215 ps
T531 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.360560140 Sep 18 07:14:19 AM UTC 24 Sep 18 07:15:29 AM UTC 24 33225828471 ps
T532 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.368871911 Sep 18 07:01:08 AM UTC 24 Sep 18 07:15:31 AM UTC 24 328009400474 ps
T533 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.1727652603 Sep 18 07:13:49 AM UTC 24 Sep 18 07:15:34 AM UTC 24 163302765374 ps
T534 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.2234894683 Sep 18 07:15:31 AM UTC 24 Sep 18 07:15:39 AM UTC 24 4379653882 ps
T280 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.3612095827 Sep 18 07:11:56 AM UTC 24 Sep 18 07:16:08 AM UTC 24 548907309048 ps
T535 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.3319096272 Sep 18 07:06:00 AM UTC 24 Sep 18 07:16:14 AM UTC 24 209397083350 ps
T25 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.1685188181 Sep 18 07:16:09 AM UTC 24 Sep 18 07:16:27 AM UTC 24 7389765358 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.4278608717 Sep 18 07:12:45 AM UTC 24 Sep 18 07:16:29 AM UTC 24 164705461028 ps
T537 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.44697572 Sep 18 07:16:27 AM UTC 24 Sep 18 07:16:30 AM UTC 24 291586705 ps
T538 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.2848473500 Sep 18 07:13:55 AM UTC 24 Sep 18 07:16:31 AM UTC 24 165449502374 ps
T539 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.2196859652 Sep 18 07:16:29 AM UTC 24 Sep 18 07:16:34 AM UTC 24 5911432013 ps
T540 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.2959774304 Sep 18 07:11:20 AM UTC 24 Sep 18 07:16:35 AM UTC 24 491043020686 ps
T541 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.2100679318 Sep 18 07:01:27 AM UTC 24 Sep 18 07:16:36 AM UTC 24 328255431590 ps
T542 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.1434371509 Sep 18 07:10:45 AM UTC 24 Sep 18 07:16:49 AM UTC 24 73229481826 ps
T543 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.4099057970 Sep 18 07:15:35 AM UTC 24 Sep 18 07:17:12 AM UTC 24 26911175423 ps
T544 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup.1026189941 Sep 18 07:14:06 AM UTC 24 Sep 18 07:17:16 AM UTC 24 185031009023 ps
T304 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.3803844215 Sep 18 07:11:21 AM UTC 24 Sep 18 07:17:28 AM UTC 24 484830450755 ps
T545 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.641770516 Sep 18 07:12:38 AM UTC 24 Sep 18 07:17:37 AM UTC 24 159726711125 ps
T546 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.994527186 Sep 18 07:17:29 AM UTC 24 Sep 18 07:17:39 AM UTC 24 5480582014 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.2336241898 Sep 18 07:07:54 AM UTC 24 Sep 18 07:17:49 AM UTC 24 174006427147 ps
T547 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.3838313167 Sep 18 07:10:01 AM UTC 24 Sep 18 07:17:51 AM UTC 24 170869254410 ps
T226 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.2125306825 Sep 18 07:15:30 AM UTC 24 Sep 18 07:17:56 AM UTC 24 189953916761 ps
T548 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.2481422995 Sep 18 07:10:31 AM UTC 24 Sep 18 07:17:59 AM UTC 24 160755990033 ps
T549 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.2366906705 Sep 18 07:17:57 AM UTC 24 Sep 18 07:18:00 AM UTC 24 382779442 ps
T191 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.3873935234 Sep 18 07:12:49 AM UTC 24 Sep 18 07:18:00 AM UTC 24 544472729882 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.1364679509 Sep 18 07:07:12 AM UTC 24 Sep 18 07:18:10 AM UTC 24 84214484305 ps
T550 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.4288135159 Sep 18 07:05:14 AM UTC 24 Sep 18 07:18:11 AM UTC 24 321853176719 ps
T551 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.2852285466 Sep 18 07:17:38 AM UTC 24 Sep 18 07:18:11 AM UTC 24 37686072474 ps
T552 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.4006381381 Sep 18 07:11:58 AM UTC 24 Sep 18 07:18:14 AM UTC 24 551318794895 ps
T553 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.1535907973 Sep 18 07:18:00 AM UTC 24 Sep 18 07:18:27 AM UTC 24 6023563623 ps
T554 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.1257106529 Sep 18 07:17:50 AM UTC 24 Sep 18 07:18:27 AM UTC 24 6470042324 ps
T555 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.3974919290 Sep 18 07:05:08 AM UTC 24 Sep 18 07:18:28 AM UTC 24 335918563564 ps
T556 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.2095150454 Sep 18 07:14:10 AM UTC 24 Sep 18 07:18:37 AM UTC 24 325835136806 ps
T557 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.1078860997 Sep 18 07:18:29 AM UTC 24 Sep 18 07:18:38 AM UTC 24 3347319345 ps
T252 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.829999864 Sep 18 07:16:34 AM UTC 24 Sep 18 07:18:39 AM UTC 24 164126345278 ps
T558 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup_fixed.3286130689 Sep 18 07:15:26 AM UTC 24 Sep 18 07:18:41 AM UTC 24 192038962592 ps
T293 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.1758638175 Sep 18 07:02:21 AM UTC 24 Sep 18 07:18:51 AM UTC 24 325662973427 ps
T559 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.2397472718 Sep 18 07:18:52 AM UTC 24 Sep 18 07:18:54 AM UTC 24 436412519 ps
T285 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.2552174617 Sep 18 07:16:37 AM UTC 24 Sep 18 07:18:56 AM UTC 24 179506530930 ps
T560 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.2373129982 Sep 18 07:12:39 AM UTC 24 Sep 18 07:18:57 AM UTC 24 493162771017 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.466521821 Sep 18 07:18:40 AM UTC 24 Sep 18 07:18:59 AM UTC 24 109598084538 ps
T561 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.3788607929 Sep 18 07:18:55 AM UTC 24 Sep 18 07:19:00 AM UTC 24 6023388764 ps
T562 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.1794267287 Sep 18 07:18:38 AM UTC 24 Sep 18 07:19:03 AM UTC 24 25645759622 ps
T563 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.1869749032 Sep 18 07:10:57 AM UTC 24 Sep 18 07:19:04 AM UTC 24 172656981668 ps
T564 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt_fixed.3693827814 Sep 18 06:55:31 AM UTC 24 Sep 18 07:19:07 AM UTC 24 500286366893 ps
T565 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.2615899753 Sep 18 07:04:34 AM UTC 24 Sep 18 07:19:13 AM UTC 24 98327539243 ps
T566 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup_fixed.1768194292 Sep 18 07:18:15 AM UTC 24 Sep 18 07:19:14 AM UTC 24 194503389578 ps
T567 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup_fixed.1451583423 Sep 18 07:12:52 AM UTC 24 Sep 18 07:19:18 AM UTC 24 207745708670 ps
T568 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.1087041679 Sep 18 07:14:09 AM UTC 24 Sep 18 07:19:22 AM UTC 24 398089550698 ps
T569 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.4258907734 Sep 18 07:19:16 AM UTC 24 Sep 18 07:19:27 AM UTC 24 4516634346 ps
T26 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.578742691 Sep 18 07:19:28 AM UTC 24 Sep 18 07:19:46 AM UTC 24 4174146460 ps
T570 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.1932587264 Sep 18 07:13:39 AM UTC 24 Sep 18 07:19:50 AM UTC 24 167885209978 ps
T571 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.828542761 Sep 18 07:19:51 AM UTC 24 Sep 18 07:19:53 AM UTC 24 291690721 ps
T336 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.2264232413 Sep 18 07:15:11 AM UTC 24 Sep 18 07:20:13 AM UTC 24 350190757507 ps
T572 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.799662565 Sep 18 07:11:39 AM UTC 24 Sep 18 07:20:14 AM UTC 24 195545551066 ps
T573 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.3863390410 Sep 18 07:19:54 AM UTC 24 Sep 18 07:20:18 AM UTC 24 5652875915 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.3986782157 Sep 18 07:12:42 AM UTC 24 Sep 18 07:20:34 AM UTC 24 502053032247 ps
T574 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.231410256 Sep 18 07:13:49 AM UTC 24 Sep 18 07:20:39 AM UTC 24 493237113816 ps
T270 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.3316458977 Sep 18 06:59:36 AM UTC 24 Sep 18 07:20:39 AM UTC 24 364968677209 ps
T575 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.836101559 Sep 18 06:55:37 AM UTC 24 Sep 18 07:20:58 AM UTC 24 509268688582 ps
T576 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.3086543107 Sep 18 07:18:42 AM UTC 24 Sep 18 07:20:58 AM UTC 24 195263921165 ps
T577 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.1008298339 Sep 18 07:18:28 AM UTC 24 Sep 18 07:21:01 AM UTC 24 161826729863 ps
T578 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.2245785716 Sep 18 07:06:16 AM UTC 24 Sep 18 07:21:06 AM UTC 24 326354157547 ps
T579 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.778677442 Sep 18 07:20:59 AM UTC 24 Sep 18 07:21:11 AM UTC 24 5171516676 ps
T580 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.1511147510 Sep 18 07:19:19 AM UTC 24 Sep 18 07:21:11 AM UTC 24 29338633322 ps
T581 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.3775205388 Sep 18 07:21:02 AM UTC 24 Sep 18 07:21:12 AM UTC 24 29969640499 ps
T582 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.1881836768 Sep 18 07:05:21 AM UTC 24 Sep 18 07:21:12 AM UTC 24 382407235290 ps
T583 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.2242596680 Sep 18 07:21:13 AM UTC 24 Sep 18 07:21:16 AM UTC 24 532791330 ps
T584 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_both.1966599593 Sep 18 07:19:14 AM UTC 24 Sep 18 07:21:21 AM UTC 24 184938386954 ps
T585 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.3183465557 Sep 18 07:21:13 AM UTC 24 Sep 18 07:21:22 AM UTC 24 5802038437 ps
T192 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.1278262369 Sep 18 07:17:18 AM UTC 24 Sep 18 07:21:24 AM UTC 24 542582276977 ps
T586 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.255913854 Sep 18 07:13:20 AM UTC 24 Sep 18 07:21:24 AM UTC 24 88808944353 ps
T329 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.1782127128 Sep 18 07:16:31 AM UTC 24 Sep 18 07:21:46 AM UTC 24 488608168975 ps
T587 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.3725104502 Sep 18 07:21:12 AM UTC 24 Sep 18 07:21:48 AM UTC 24 57476894783 ps
T588 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.1250709345 Sep 18 07:09:22 AM UTC 24 Sep 18 07:21:57 AM UTC 24 138734980631 ps
T341 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.333808416 Sep 18 07:12:18 AM UTC 24 Sep 18 07:22:00 AM UTC 24 92136168906 ps
T589 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup_fixed.593932961 Sep 18 07:20:40 AM UTC 24 Sep 18 07:22:07 AM UTC 24 197130877875 ps
T590 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.4085667009 Sep 18 07:22:01 AM UTC 24 Sep 18 07:22:17 AM UTC 24 5072448204 ps
T591 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.2850843317 Sep 18 07:19:08 AM UTC 24 Sep 18 07:22:22 AM UTC 24 342688257802 ps
T592 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt.3532884859 Sep 18 07:20:18 AM UTC 24 Sep 18 07:22:26 AM UTC 24 164688596431 ps
T593 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt_fixed.3075146937 Sep 18 07:19:01 AM UTC 24 Sep 18 07:22:33 AM UTC 24 335092455549 ps
T594 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.2378763338 Sep 18 07:22:33 AM UTC 24 Sep 18 07:22:36 AM UTC 24 378326146 ps
T220 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.1061616403 Sep 18 07:15:40 AM UTC 24 Sep 18 07:22:50 AM UTC 24 70305980571 ps
T595 /workspaces/repo/scratch/os_regression_2024_09_17/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_smoke.3738052972 Sep 18 07:22:36 AM UTC 24 Sep 18 07:22:51 AM UTC 24 6078057142 ps
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