| T242 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.4102446311 |
|
|
Oct 02 09:33:48 PM UTC 24 |
Oct 02 09:41:25 PM UTC 24 |
335620868535 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_interrupt.727126282 |
|
|
Oct 02 09:23:00 PM UTC 24 |
Oct 02 09:41:28 PM UTC 24 |
325892921490 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup.3403298542 |
|
|
Oct 02 09:35:20 PM UTC 24 |
Oct 02 09:41:36 PM UTC 24 |
574785455878 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_clock_gating.3382329123 |
|
|
Oct 02 09:23:14 PM UTC 24 |
Oct 02 09:41:43 PM UTC 24 |
331783836498 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_stress_all.1487707762 |
|
|
Oct 02 09:36:40 PM UTC 24 |
Oct 02 09:41:47 PM UTC 24 |
359456718341 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_interrupt.678619336 |
|
|
Oct 02 09:28:15 PM UTC 24 |
Oct 02 09:41:48 PM UTC 24 |
331244780568 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.3178996171 |
|
|
Oct 02 09:41:44 PM UTC 24 |
Oct 02 09:41:52 PM UTC 24 |
5256310891 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.1738402517 |
|
|
Oct 02 09:33:58 PM UTC 24 |
Oct 02 09:42:02 PM UTC 24 |
396053842442 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.869865468 |
|
|
Oct 02 09:37:16 PM UTC 24 |
Oct 02 09:42:02 PM UTC 24 |
344272276381 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.1724065349 |
|
|
Oct 02 09:42:04 PM UTC 24 |
Oct 02 09:42:07 PM UTC 24 |
364842936 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.3945941731 |
|
|
Oct 02 09:41:53 PM UTC 24 |
Oct 02 09:42:09 PM UTC 24 |
28826054820 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.2305335427 |
|
|
Oct 02 09:42:08 PM UTC 24 |
Oct 02 09:42:20 PM UTC 24 |
5894500199 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup_fixed.2995155227 |
|
|
Oct 02 09:28:27 PM UTC 24 |
Oct 02 09:42:29 PM UTC 24 |
590544428002 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.1123474533 |
|
|
Oct 02 09:36:58 PM UTC 24 |
Oct 02 09:42:32 PM UTC 24 |
495333192300 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_stress_all.1445378673 |
|
|
Oct 02 09:19:51 PM UTC 24 |
Oct 02 09:42:44 PM UTC 24 |
565350518942 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.3140941927 |
|
|
Oct 02 09:37:21 PM UTC 24 |
Oct 02 09:42:50 PM UTC 24 |
346366276043 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.2083745869 |
|
|
Oct 02 09:37:09 PM UTC 24 |
Oct 02 09:42:50 PM UTC 24 |
320696032979 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt_fixed.608851894 |
|
|
Oct 02 09:33:40 PM UTC 24 |
Oct 02 09:42:57 PM UTC 24 |
498512268476 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.3546852903 |
|
|
Oct 02 09:41:48 PM UTC 24 |
Oct 02 09:43:08 PM UTC 24 |
41491604630 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.15391789 |
|
|
Oct 02 09:43:09 PM UTC 24 |
Oct 02 09:43:24 PM UTC 24 |
3298494138 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.954602322 |
|
|
Oct 02 09:43:25 PM UTC 24 |
Oct 02 09:43:43 PM UTC 24 |
20810708073 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup.1609248121 |
|
|
Oct 02 09:31:48 PM UTC 24 |
Oct 02 09:44:14 PM UTC 24 |
559018036852 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_stress_all.761586268 |
|
|
Oct 02 09:26:21 PM UTC 24 |
Oct 02 09:44:21 PM UTC 24 |
261588483285 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.1366337589 |
|
|
Oct 02 09:36:06 PM UTC 24 |
Oct 02 09:44:22 PM UTC 24 |
605625803657 ps |
| T60 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_stress_all.3495822576 |
|
|
Oct 02 09:14:17 PM UTC 24 |
Oct 02 09:44:23 PM UTC 24 |
513998715453 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.866646978 |
|
|
Oct 02 09:44:22 PM UTC 24 |
Oct 02 09:44:27 PM UTC 24 |
529838442 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled.2981507188 |
|
|
Oct 02 09:38:31 PM UTC 24 |
Oct 02 09:44:30 PM UTC 24 |
489318769665 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.414663291 |
|
|
Oct 02 09:44:15 PM UTC 24 |
Oct 02 09:44:33 PM UTC 24 |
3906904483 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.2178171580 |
|
|
Oct 02 09:44:24 PM UTC 24 |
Oct 02 09:44:40 PM UTC 24 |
5940134463 ps |
| T39 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all.3398881160 |
|
|
Oct 02 09:24:24 PM UTC 24 |
Oct 02 09:44:46 PM UTC 24 |
392869768679 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_interrupt.2603553145 |
|
|
Oct 02 09:24:42 PM UTC 24 |
Oct 02 09:44:47 PM UTC 24 |
479259666906 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_both.184592137 |
|
|
Oct 02 09:23:41 PM UTC 24 |
Oct 02 09:44:48 PM UTC 24 |
506882054710 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.3855182460 |
|
|
Oct 02 09:44:49 PM UTC 24 |
Oct 02 09:45:02 PM UTC 24 |
297966906995 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.2327649998 |
|
|
Oct 02 09:40:19 PM UTC 24 |
Oct 02 09:45:06 PM UTC 24 |
333211773198 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.191443954 |
|
|
Oct 02 09:45:06 PM UTC 24 |
Oct 02 09:45:11 PM UTC 24 |
2753026545 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.701313633 |
|
|
Oct 02 09:41:29 PM UTC 24 |
Oct 02 09:45:11 PM UTC 24 |
158109239707 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.1858872646 |
|
|
Oct 02 09:38:57 PM UTC 24 |
Oct 02 09:45:17 PM UTC 24 |
412121311867 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.1099641768 |
|
|
Oct 02 09:38:47 PM UTC 24 |
Oct 02 09:45:19 PM UTC 24 |
325072346075 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.1737326064 |
|
|
Oct 02 09:42:30 PM UTC 24 |
Oct 02 09:45:24 PM UTC 24 |
159497120050 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.2035135785 |
|
|
Oct 02 09:45:25 PM UTC 24 |
Oct 02 09:45:28 PM UTC 24 |
351640917 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.115384678 |
|
|
Oct 02 09:45:18 PM UTC 24 |
Oct 02 09:45:29 PM UTC 24 |
24028697150 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.3158219706 |
|
|
Oct 02 09:36:20 PM UTC 24 |
Oct 02 09:45:29 PM UTC 24 |
114188387889 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_clock_gating.4281383441 |
|
|
Oct 02 09:36:12 PM UTC 24 |
Oct 02 09:45:32 PM UTC 24 |
602640132254 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.2292385172 |
|
|
Oct 02 09:41:20 PM UTC 24 |
Oct 02 09:45:33 PM UTC 24 |
170503420604 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.2724779170 |
|
|
Oct 02 09:38:35 PM UTC 24 |
Oct 02 09:45:38 PM UTC 24 |
172348000975 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.2215443625 |
|
|
Oct 02 09:45:11 PM UTC 24 |
Oct 02 09:45:39 PM UTC 24 |
33577423130 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.1758770746 |
|
|
Oct 02 09:45:29 PM UTC 24 |
Oct 02 09:45:42 PM UTC 24 |
5735069329 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.1939191936 |
|
|
Oct 02 09:40:24 PM UTC 24 |
Oct 02 09:45:43 PM UTC 24 |
481697389043 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_wakeup.1007877367 |
|
|
Oct 02 09:20:30 PM UTC 24 |
Oct 02 09:45:45 PM UTC 24 |
575356393325 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.2247990921 |
|
|
Oct 02 09:38:35 PM UTC 24 |
Oct 02 09:45:58 PM UTC 24 |
165600366794 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.3214787539 |
|
|
Oct 02 09:42:33 PM UTC 24 |
Oct 02 09:45:59 PM UTC 24 |
490034255853 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt_fixed.3687940459 |
|
|
Oct 02 09:31:48 PM UTC 24 |
Oct 02 09:45:59 PM UTC 24 |
491677255524 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.3839422401 |
|
|
Oct 02 09:45:46 PM UTC 24 |
Oct 02 09:46:06 PM UTC 24 |
3902836008 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.1355106647 |
|
|
Oct 02 09:44:34 PM UTC 24 |
Oct 02 09:46:06 PM UTC 24 |
159467070777 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.949298442 |
|
|
Oct 02 09:46:07 PM UTC 24 |
Oct 02 09:46:09 PM UTC 24 |
512600270 ps |
| T29 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.887177429 |
|
|
Oct 02 09:46:00 PM UTC 24 |
Oct 02 09:46:12 PM UTC 24 |
2425347502 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.3070024054 |
|
|
Oct 02 09:46:10 PM UTC 24 |
Oct 02 09:46:21 PM UTC 24 |
5997312996 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.206314452 |
|
|
Oct 02 09:45:58 PM UTC 24 |
Oct 02 09:46:27 PM UTC 24 |
35165544871 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.3386659480 |
|
|
Oct 02 09:34:41 PM UTC 24 |
Oct 02 09:46:50 PM UTC 24 |
102930256948 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.1787724876 |
|
|
Oct 02 09:42:58 PM UTC 24 |
Oct 02 09:46:52 PM UTC 24 |
536387976622 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.2332105381 |
|
|
Oct 02 09:44:48 PM UTC 24 |
Oct 02 09:46:55 PM UTC 24 |
200562709880 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup.3828611558 |
|
|
Oct 02 09:38:51 PM UTC 24 |
Oct 02 09:47:10 PM UTC 24 |
610182592209 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.3684406641 |
|
|
Oct 02 09:42:03 PM UTC 24 |
Oct 02 09:47:14 PM UTC 24 |
443215978789 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.2002720069 |
|
|
Oct 02 09:45:30 PM UTC 24 |
Oct 02 09:47:20 PM UTC 24 |
327303923287 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.2069713946 |
|
|
Oct 02 09:45:31 PM UTC 24 |
Oct 02 09:47:24 PM UTC 24 |
165644370498 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.846343330 |
|
|
Oct 02 09:47:21 PM UTC 24 |
Oct 02 09:47:33 PM UTC 24 |
3363042693 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.2281730876 |
|
|
Oct 02 09:44:27 PM UTC 24 |
Oct 02 09:47:47 PM UTC 24 |
493372144376 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_both.3333952887 |
|
|
Oct 02 09:45:44 PM UTC 24 |
Oct 02 09:47:48 PM UTC 24 |
515706561763 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.2167764241 |
|
|
Oct 02 09:47:49 PM UTC 24 |
Oct 02 09:47:52 PM UTC 24 |
426028719 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.2429943757 |
|
|
Oct 02 09:38:08 PM UTC 24 |
Oct 02 09:47:58 PM UTC 24 |
85528508649 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.360609001 |
|
|
Oct 02 09:47:52 PM UTC 24 |
Oct 02 09:47:58 PM UTC 24 |
5768159821 ps |
| T30 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.3979484409 |
|
|
Oct 02 09:47:37 PM UTC 24 |
Oct 02 09:48:04 PM UTC 24 |
3332363845 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.3484136076 |
|
|
Oct 02 09:44:31 PM UTC 24 |
Oct 02 09:48:12 PM UTC 24 |
164402515913 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.344201874 |
|
|
Oct 02 09:42:21 PM UTC 24 |
Oct 02 09:48:22 PM UTC 24 |
325020430888 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.2864517115 |
|
|
Oct 02 09:45:33 PM UTC 24 |
Oct 02 09:48:47 PM UTC 24 |
331988731037 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.2411919505 |
|
|
Oct 02 09:45:03 PM UTC 24 |
Oct 02 09:48:50 PM UTC 24 |
326273198530 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.2871281247 |
|
|
Oct 02 09:47:24 PM UTC 24 |
Oct 02 09:48:56 PM UTC 24 |
44581217564 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.2396366189 |
|
|
Oct 02 09:42:51 PM UTC 24 |
Oct 02 09:49:03 PM UTC 24 |
159398291217 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.2739601565 |
|
|
Oct 02 09:42:45 PM UTC 24 |
Oct 02 09:49:04 PM UTC 24 |
511053506118 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.1442957215 |
|
|
Oct 02 09:49:03 PM UTC 24 |
Oct 02 09:49:06 PM UTC 24 |
5191692034 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled_fixed.2512309897 |
|
|
Oct 02 09:31:33 PM UTC 24 |
Oct 02 09:49:12 PM UTC 24 |
327018660811 ps |
| T31 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.3311507395 |
|
|
Oct 02 09:49:13 PM UTC 24 |
Oct 02 09:49:21 PM UTC 24 |
6416620157 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.2939295522 |
|
|
Oct 02 09:42:50 PM UTC 24 |
Oct 02 09:49:28 PM UTC 24 |
606263986747 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.1421822124 |
|
|
Oct 02 09:49:29 PM UTC 24 |
Oct 02 09:49:32 PM UTC 24 |
424933281 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup_fixed.693045154 |
|
|
Oct 02 09:30:36 PM UTC 24 |
Oct 02 09:49:38 PM UTC 24 |
410753180527 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_both.2301095024 |
|
|
Oct 02 09:28:38 PM UTC 24 |
Oct 02 09:49:39 PM UTC 24 |
526989386672 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.1094989546 |
|
|
Oct 02 09:49:32 PM UTC 24 |
Oct 02 09:49:47 PM UTC 24 |
5554739277 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.3364636593 |
|
|
Oct 02 09:49:05 PM UTC 24 |
Oct 02 09:49:53 PM UTC 24 |
25409522957 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.395337604 |
|
|
Oct 02 09:46:28 PM UTC 24 |
Oct 02 09:50:04 PM UTC 24 |
331222531914 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_stress_all.3770040815 |
|
|
Oct 02 09:22:29 PM UTC 24 |
Oct 02 09:50:08 PM UTC 24 |
460779467514 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled.484304210 |
|
|
Oct 02 09:29:50 PM UTC 24 |
Oct 02 09:50:16 PM UTC 24 |
488386529561 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.1103861717 |
|
|
Oct 02 09:48:23 PM UTC 24 |
Oct 02 09:50:16 PM UTC 24 |
179698461990 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.771271714 |
|
|
Oct 02 09:46:22 PM UTC 24 |
Oct 02 09:50:25 PM UTC 24 |
163328071703 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.2308157045 |
|
|
Oct 02 09:50:25 PM UTC 24 |
Oct 02 09:50:30 PM UTC 24 |
3022122461 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.1279013132 |
|
|
Oct 02 09:42:09 PM UTC 24 |
Oct 02 09:50:39 PM UTC 24 |
328731739646 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.1725609289 |
|
|
Oct 02 09:50:31 PM UTC 24 |
Oct 02 09:51:08 PM UTC 24 |
31403267337 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.1861260878 |
|
|
Oct 02 09:39:52 PM UTC 24 |
Oct 02 09:51:08 PM UTC 24 |
102190976443 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.1150334039 |
|
|
Oct 02 09:51:09 PM UTC 24 |
Oct 02 09:51:28 PM UTC 24 |
6227366301 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.1887915982 |
|
|
Oct 02 09:51:29 PM UTC 24 |
Oct 02 09:51:31 PM UTC 24 |
422742434 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.4014695311 |
|
|
Oct 02 09:49:40 PM UTC 24 |
Oct 02 09:51:38 PM UTC 24 |
165941046614 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_wakeup_fixed.729087243 |
|
|
Oct 02 09:25:14 PM UTC 24 |
Oct 02 09:51:56 PM UTC 24 |
595108677422 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.3269303025 |
|
|
Oct 02 09:51:32 PM UTC 24 |
Oct 02 09:51:56 PM UTC 24 |
5635226008 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.1874467817 |
|
|
Oct 02 09:41:36 PM UTC 24 |
Oct 02 09:52:04 PM UTC 24 |
346689213214 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.447838142 |
|
|
Oct 02 09:40:32 PM UTC 24 |
Oct 02 09:52:05 PM UTC 24 |
483585384221 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt_fixed.61368496 |
|
|
Oct 02 09:46:50 PM UTC 24 |
Oct 02 09:52:26 PM UTC 24 |
494848389425 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_clock_gating.915506601 |
|
|
Oct 02 09:37:19 PM UTC 24 |
Oct 02 09:52:51 PM UTC 24 |
329865793215 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.2356008896 |
|
|
Oct 02 09:44:47 PM UTC 24 |
Oct 02 09:52:51 PM UTC 24 |
195456544640 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_wakeup_fixed.2094378772 |
|
|
Oct 02 09:16:36 PM UTC 24 |
Oct 02 09:53:03 PM UTC 24 |
593379767214 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.2883630867 |
|
|
Oct 02 09:47:14 PM UTC 24 |
Oct 02 09:53:14 PM UTC 24 |
490438134559 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.2275582957 |
|
|
Oct 02 09:53:04 PM UTC 24 |
Oct 02 09:53:16 PM UTC 24 |
3012542944 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.2079554225 |
|
|
Oct 02 09:45:43 PM UTC 24 |
Oct 02 09:53:19 PM UTC 24 |
180704672598 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.3859025345 |
|
|
Oct 02 09:53:15 PM UTC 24 |
Oct 02 09:53:30 PM UTC 24 |
24647199842 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.1304247091 |
|
|
Oct 02 09:45:40 PM UTC 24 |
Oct 02 09:53:36 PM UTC 24 |
394171208048 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.1457811064 |
|
|
Oct 02 09:53:36 PM UTC 24 |
Oct 02 09:53:38 PM UTC 24 |
318436699 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.1700527073 |
|
|
Oct 02 09:53:20 PM UTC 24 |
Oct 02 09:53:41 PM UTC 24 |
4142713210 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.1535069314 |
|
|
Oct 02 09:41:49 PM UTC 24 |
Oct 02 09:53:53 PM UTC 24 |
92516472396 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.3221873272 |
|
|
Oct 02 09:53:39 PM UTC 24 |
Oct 02 09:54:10 PM UTC 24 |
5899399875 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.3534364974 |
|
|
Oct 02 09:51:39 PM UTC 24 |
Oct 02 09:54:11 PM UTC 24 |
329477530006 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.805418069 |
|
|
Oct 02 09:34:57 PM UTC 24 |
Oct 02 09:54:14 PM UTC 24 |
492526604438 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.3801121281 |
|
|
Oct 02 09:52:06 PM UTC 24 |
Oct 02 09:54:44 PM UTC 24 |
220306247258 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.3452829308 |
|
|
Oct 02 09:43:44 PM UTC 24 |
Oct 02 09:54:45 PM UTC 24 |
136488895231 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.2278847359 |
|
|
Oct 02 09:48:57 PM UTC 24 |
Oct 02 09:54:50 PM UTC 24 |
163602506737 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.2552714645 |
|
|
Oct 02 09:54:51 PM UTC 24 |
Oct 02 09:54:56 PM UTC 24 |
3982954210 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.873015604 |
|
|
Oct 02 09:44:41 PM UTC 24 |
Oct 02 09:54:58 PM UTC 24 |
493602220960 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.80599636 |
|
|
Oct 02 09:45:20 PM UTC 24 |
Oct 02 09:55:03 PM UTC 24 |
272559231708 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.616376586 |
|
|
Oct 02 09:55:04 PM UTC 24 |
Oct 02 09:55:11 PM UTC 24 |
1042444376 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.873226574 |
|
|
Oct 02 09:36:12 PM UTC 24 |
Oct 02 09:55:15 PM UTC 24 |
328506292224 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.1353770029 |
|
|
Oct 02 09:55:16 PM UTC 24 |
Oct 02 09:55:19 PM UTC 24 |
433336591 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.3826530353 |
|
|
Oct 02 09:46:06 PM UTC 24 |
Oct 02 09:55:19 PM UTC 24 |
336654548147 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.729841032 |
|
|
Oct 02 09:55:19 PM UTC 24 |
Oct 02 09:55:24 PM UTC 24 |
5724240372 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.3067498606 |
|
|
Oct 02 09:45:59 PM UTC 24 |
Oct 02 09:55:33 PM UTC 24 |
103379091517 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.1421558539 |
|
|
Oct 02 09:47:59 PM UTC 24 |
Oct 02 09:55:44 PM UTC 24 |
165231593964 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.1952442884 |
|
|
Oct 02 09:52:52 PM UTC 24 |
Oct 02 09:55:48 PM UTC 24 |
165647064138 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.1446800511 |
|
|
Oct 02 09:38:26 PM UTC 24 |
Oct 02 09:55:56 PM UTC 24 |
376788982678 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.1477496644 |
|
|
Oct 02 09:48:13 PM UTC 24 |
Oct 02 09:56:01 PM UTC 24 |
498350236554 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.3383873096 |
|
|
Oct 02 09:40:52 PM UTC 24 |
Oct 02 09:56:04 PM UTC 24 |
328444623935 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.4171074414 |
|
|
Oct 02 09:49:21 PM UTC 24 |
Oct 02 09:56:30 PM UTC 24 |
339612566308 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.4024344700 |
|
|
Oct 02 09:56:31 PM UTC 24 |
Oct 02 09:56:40 PM UTC 24 |
3499942449 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt_fixed.766220663 |
|
|
Oct 02 09:35:18 PM UTC 24 |
Oct 02 09:56:45 PM UTC 24 |
491619261708 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.1482741665 |
|
|
Oct 02 09:51:10 PM UTC 24 |
Oct 02 09:56:46 PM UTC 24 |
438123537642 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt.1980816100 |
|
|
Oct 02 09:35:11 PM UTC 24 |
Oct 02 09:56:54 PM UTC 24 |
494871051774 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_clock_gating.2906206975 |
|
|
Oct 02 09:39:13 PM UTC 24 |
Oct 02 09:57:00 PM UTC 24 |
326051123116 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.4123676828 |
|
|
Oct 02 09:47:34 PM UTC 24 |
Oct 02 09:57:01 PM UTC 24 |
124720376654 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.1603696685 |
|
|
Oct 02 09:57:02 PM UTC 24 |
Oct 02 09:57:04 PM UTC 24 |
308834316 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.3256656195 |
|
|
Oct 02 09:56:47 PM UTC 24 |
Oct 02 09:57:05 PM UTC 24 |
6560173730 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.1690019093 |
|
|
Oct 02 09:50:09 PM UTC 24 |
Oct 02 09:57:10 PM UTC 24 |
199627636464 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.384594987 |
|
|
Oct 02 09:47:11 PM UTC 24 |
Oct 02 09:57:10 PM UTC 24 |
170439883928 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.3400816048 |
|
|
Oct 02 09:57:03 PM UTC 24 |
Oct 02 09:57:12 PM UTC 24 |
5744055551 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.4077054840 |
|
|
Oct 02 09:45:12 PM UTC 24 |
Oct 02 09:57:13 PM UTC 24 |
102445755832 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.3109359561 |
|
|
Oct 02 09:52:05 PM UTC 24 |
Oct 02 09:57:19 PM UTC 24 |
488742085032 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.3350735990 |
|
|
Oct 02 09:56:41 PM UTC 24 |
Oct 02 09:57:24 PM UTC 24 |
45175137114 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.1898957953 |
|
|
Oct 02 09:44:21 PM UTC 24 |
Oct 02 09:57:27 PM UTC 24 |
840179179077 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.382677643 |
|
|
Oct 02 09:54:57 PM UTC 24 |
Oct 02 09:57:34 PM UTC 24 |
47309250011 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled_fixed.3426900786 |
|
|
Oct 02 09:28:05 PM UTC 24 |
Oct 02 09:57:34 PM UTC 24 |
502315426796 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.4016212015 |
|
|
Oct 02 09:57:30 PM UTC 24 |
Oct 02 09:57:51 PM UTC 24 |
4730194368 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.2114229125 |
|
|
Oct 02 09:48:05 PM UTC 24 |
Oct 02 09:57:55 PM UTC 24 |
329679533356 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.1899014767 |
|
|
Oct 02 09:57:56 PM UTC 24 |
Oct 02 09:57:58 PM UTC 24 |
499087969 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.3752697979 |
|
|
Oct 02 09:53:54 PM UTC 24 |
Oct 02 09:58:03 PM UTC 24 |
157919565198 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.279099621 |
|
|
Oct 02 09:57:48 PM UTC 24 |
Oct 02 09:58:04 PM UTC 24 |
90284190545 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.4218229165 |
|
|
Oct 02 09:51:56 PM UTC 24 |
Oct 02 09:58:05 PM UTC 24 |
488050148736 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.1913430067 |
|
|
Oct 02 09:39:31 PM UTC 24 |
Oct 02 09:58:05 PM UTC 24 |
546795920872 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.2357888980 |
|
|
Oct 02 09:57:59 PM UTC 24 |
Oct 02 09:58:09 PM UTC 24 |
5775099194 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.3868009601 |
|
|
Oct 02 09:50:05 PM UTC 24 |
Oct 02 09:58:10 PM UTC 24 |
179876239680 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.1890763922 |
|
|
Oct 02 09:46:53 PM UTC 24 |
Oct 02 09:58:13 PM UTC 24 |
378723700999 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled_fixed.1295693477 |
|
|
Oct 02 09:34:58 PM UTC 24 |
Oct 02 09:58:18 PM UTC 24 |
497568605336 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.2751853841 |
|
|
Oct 02 09:54:15 PM UTC 24 |
Oct 02 09:58:22 PM UTC 24 |
193792734774 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.2801121139 |
|
|
Oct 02 09:54:10 PM UTC 24 |
Oct 02 09:58:26 PM UTC 24 |
170639599591 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.3402296877 |
|
|
Oct 02 09:58:23 PM UTC 24 |
Oct 02 09:58:29 PM UTC 24 |
4850314701 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.3631998743 |
|
|
Oct 02 09:54:44 PM UTC 24 |
Oct 02 09:58:31 PM UTC 24 |
165664217828 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.698751669 |
|
|
Oct 02 09:58:32 PM UTC 24 |
Oct 02 09:58:38 PM UTC 24 |
1851272195 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.2325905751 |
|
|
Oct 02 09:55:20 PM UTC 24 |
Oct 02 09:58:41 PM UTC 24 |
158391789873 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.18011156 |
|
|
Oct 02 09:57:19 PM UTC 24 |
Oct 02 09:58:41 PM UTC 24 |
334894293725 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.1446769367 |
|
|
Oct 02 09:58:42 PM UTC 24 |
Oct 02 09:58:45 PM UTC 24 |
417842339 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.4294811959 |
|
|
Oct 02 09:54:45 PM UTC 24 |
Oct 02 09:58:46 PM UTC 24 |
343981118576 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.4161140806 |
|
|
Oct 02 09:57:36 PM UTC 24 |
Oct 02 09:58:51 PM UTC 24 |
28055094229 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.2748869988 |
|
|
Oct 02 09:58:42 PM UTC 24 |
Oct 02 09:58:51 PM UTC 24 |
5867888548 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.981366580 |
|
|
Oct 02 09:45:38 PM UTC 24 |
Oct 02 09:58:54 PM UTC 24 |
427965213189 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.241898610 |
|
|
Oct 02 09:45:34 PM UTC 24 |
Oct 02 09:58:56 PM UTC 24 |
490068730759 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.3236207750 |
|
|
Oct 02 09:55:49 PM UTC 24 |
Oct 02 09:59:34 PM UTC 24 |
323273786800 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.2151287499 |
|
|
Oct 02 09:47:48 PM UTC 24 |
Oct 02 09:59:48 PM UTC 24 |
341240387845 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.2361230992 |
|
|
Oct 02 09:58:51 PM UTC 24 |
Oct 02 10:00:07 PM UTC 24 |
167511827505 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled.3059162289 |
|
|
Oct 02 09:58:04 PM UTC 24 |
Oct 02 10:00:08 PM UTC 24 |
164850209986 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all.132609206 |
|
|
Oct 02 09:31:12 PM UTC 24 |
Oct 02 10:00:18 PM UTC 24 |
538078341749 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.727442272 |
|
|
Oct 02 09:50:40 PM UTC 24 |
Oct 02 10:00:22 PM UTC 24 |
113190088687 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.3879874408 |
|
|
Oct 02 10:00:08 PM UTC 24 |
Oct 02 10:00:24 PM UTC 24 |
35369125622 ps |
| T32 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.762752601 |
|
|
Oct 02 10:00:23 PM UTC 24 |
Oct 02 10:00:31 PM UTC 24 |
5906266106 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.4219112124 |
|
|
Oct 02 10:00:07 PM UTC 24 |
Oct 02 10:00:31 PM UTC 24 |
5526320345 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.2596587714 |
|
|
Oct 02 10:00:32 PM UTC 24 |
Oct 02 10:00:35 PM UTC 24 |
551138277 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.4175528879 |
|
|
Oct 02 10:00:32 PM UTC 24 |
Oct 02 10:00:45 PM UTC 24 |
5735681148 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.1616844605 |
|
|
Oct 02 09:56:02 PM UTC 24 |
Oct 02 10:00:46 PM UTC 24 |
396189679100 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.1655191059 |
|
|
Oct 02 09:58:27 PM UTC 24 |
Oct 02 10:00:48 PM UTC 24 |
34397859442 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled_fixed.3618397038 |
|
|
Oct 02 09:37:00 PM UTC 24 |
Oct 02 10:01:13 PM UTC 24 |
490521457419 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.1579816370 |
|
|
Oct 02 09:53:43 PM UTC 24 |
Oct 02 10:01:30 PM UTC 24 |
162523279536 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.1170414047 |
|
|
Oct 02 09:50:16 PM UTC 24 |
Oct 02 10:01:40 PM UTC 24 |
334655510369 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.2625318860 |
|
|
Oct 02 09:49:39 PM UTC 24 |
Oct 02 10:01:58 PM UTC 24 |
487284931477 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.1251805852 |
|
|
Oct 02 09:58:14 PM UTC 24 |
Oct 02 10:02:07 PM UTC 24 |
368001396481 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.3231246095 |
|
|
Oct 02 09:56:55 PM UTC 24 |
Oct 02 10:02:13 PM UTC 24 |
327166882994 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.4145186266 |
|
|
Oct 02 09:40:44 PM UTC 24 |
Oct 02 10:02:20 PM UTC 24 |
502040816885 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.2713061101 |
|
|
Oct 02 09:57:11 PM UTC 24 |
Oct 02 10:02:21 PM UTC 24 |
500063763376 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.2353653606 |
|
|
Oct 02 10:02:08 PM UTC 24 |
Oct 02 10:02:23 PM UTC 24 |
4201242852 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.370445215 |
|
|
Oct 02 09:57:05 PM UTC 24 |
Oct 02 10:02:30 PM UTC 24 |
331768515994 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.2303008802 |
|
|
Oct 02 10:02:32 PM UTC 24 |
Oct 02 10:02:35 PM UTC 24 |
382624714 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.2847898888 |
|
|
Oct 02 10:02:36 PM UTC 24 |
Oct 02 10:02:40 PM UTC 24 |
6143181834 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.28530774 |
|
|
Oct 02 10:02:21 PM UTC 24 |
Oct 02 10:02:42 PM UTC 24 |
4560462743 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.1253979478 |
|
|
Oct 02 09:57:15 PM UTC 24 |
Oct 02 10:02:48 PM UTC 24 |
202061851243 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.1525987298 |
|
|
Oct 02 09:49:49 PM UTC 24 |
Oct 02 10:02:48 PM UTC 24 |
321995166431 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.3252439421 |
|
|
Oct 02 10:02:14 PM UTC 24 |
Oct 02 10:02:50 PM UTC 24 |
31150702569 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.1219182673 |
|
|
Oct 02 09:59:49 PM UTC 24 |
Oct 02 10:02:50 PM UTC 24 |
263956291111 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.305764288 |
|
|
Oct 02 09:54:12 PM UTC 24 |
Oct 02 10:03:14 PM UTC 24 |
205642346204 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.180679856 |
|
|
Oct 02 09:54:59 PM UTC 24 |
Oct 02 10:03:32 PM UTC 24 |
96527979945 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_both.1675633980 |
|
|
Oct 02 10:01:59 PM UTC 24 |
Oct 02 10:03:33 PM UTC 24 |
218908243214 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.3617291800 |
|
|
Oct 02 10:03:34 PM UTC 24 |
Oct 02 10:03:39 PM UTC 24 |
3257363433 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup.3586019050 |
|
|
Oct 02 09:57:13 PM UTC 24 |
Oct 02 10:03:55 PM UTC 24 |
526940349454 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt_fixed.525910880 |
|
|
Oct 02 10:02:49 PM UTC 24 |
Oct 02 10:03:55 PM UTC 24 |
165048147296 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.2451124925 |
|
|
Oct 02 09:58:30 PM UTC 24 |
Oct 02 10:03:55 PM UTC 24 |
75734060875 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.1165430412 |
|
|
Oct 02 09:46:56 PM UTC 24 |
Oct 02 10:03:55 PM UTC 24 |
418731927161 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.3223835858 |
|
|
Oct 02 09:49:07 PM UTC 24 |
Oct 02 10:04:01 PM UTC 24 |
99829350303 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.1443354221 |
|
|
Oct 02 10:03:57 PM UTC 24 |
Oct 02 10:04:01 PM UTC 24 |
511740901 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.461420410 |
|
|
Oct 02 09:58:06 PM UTC 24 |
Oct 02 10:04:06 PM UTC 24 |
163320441659 ps |
| T33 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.3063660758 |
|
|
Oct 02 10:03:56 PM UTC 24 |
Oct 02 10:04:17 PM UTC 24 |
22299465589 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup_fixed.1298545702 |
|
|
Oct 02 09:55:57 PM UTC 24 |
Oct 02 10:04:26 PM UTC 24 |
585702116087 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.2175324422 |
|
|
Oct 02 10:04:02 PM UTC 24 |
Oct 02 10:04:33 PM UTC 24 |
5569033366 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup_fixed.1318911655 |
|
|
Oct 02 09:58:57 PM UTC 24 |
Oct 02 10:04:36 PM UTC 24 |
201440058816 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.475677575 |
|
|
Oct 02 09:48:51 PM UTC 24 |
Oct 02 10:04:37 PM UTC 24 |
336553675612 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.1697685543 |
|
|
Oct 02 09:53:17 PM UTC 24 |
Oct 02 10:04:46 PM UTC 24 |
110497248273 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled.3571530207 |
|
|
Oct 02 10:00:35 PM UTC 24 |
Oct 02 10:05:00 PM UTC 24 |
324652559546 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.532599772 |
|
|
Oct 02 10:03:41 PM UTC 24 |
Oct 02 10:05:01 PM UTC 24 |
22889550897 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.1557420910 |
|
|
Oct 02 09:55:45 PM UTC 24 |
Oct 02 10:05:09 PM UTC 24 |
334939180266 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.1305693391 |
|
|
Oct 02 10:05:01 PM UTC 24 |
Oct 02 10:05:23 PM UTC 24 |
4395934707 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled.3321198510 |
|
|
Oct 02 10:02:41 PM UTC 24 |
Oct 02 10:05:35 PM UTC 24 |
163306321217 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.409208452 |
|
|
Oct 02 09:56:46 PM UTC 24 |
Oct 02 10:05:56 PM UTC 24 |
58672369406 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.3208327125 |
|
|
Oct 02 10:05:57 PM UTC 24 |
Oct 02 10:06:00 PM UTC 24 |
534441119 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.129318308 |
|
|
Oct 02 10:02:24 PM UTC 24 |
Oct 02 10:06:00 PM UTC 24 |
340423187753 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled_fixed.4035922725 |
|
|
Oct 02 10:04:06 PM UTC 24 |
Oct 02 10:06:02 PM UTC 24 |
325868489123 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.3639454732 |
|
|
Oct 02 10:05:24 PM UTC 24 |
Oct 02 10:06:07 PM UTC 24 |
12937495168 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled_fixed.4091977148 |
|
|
Oct 02 09:58:47 PM UTC 24 |
Oct 02 10:06:08 PM UTC 24 |
162242617890 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all.1357728886 |
|
|
Oct 02 09:57:52 PM UTC 24 |
Oct 02 10:06:10 PM UTC 24 |
450727020144 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.3702470740 |
|
|
Oct 02 09:59:36 PM UTC 24 |
Oct 02 10:06:12 PM UTC 24 |
505471105304 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.2206271548 |
|
|
Oct 02 10:06:01 PM UTC 24 |
Oct 02 10:06:12 PM UTC 24 |
5840020065 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.2390029047 |
|
|
Oct 02 09:37:16 PM UTC 24 |
Oct 02 10:06:19 PM UTC 24 |
597134787487 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.1007186600 |
|
|
Oct 02 10:05:02 PM UTC 24 |
Oct 02 10:06:24 PM UTC 24 |
40736029837 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.2276580943 |
|
|
Oct 02 10:06:25 PM UTC 24 |
Oct 02 10:06:34 PM UTC 24 |
3724859563 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.609715884 |
|
|
Oct 02 09:52:26 PM UTC 24 |
Oct 02 10:06:35 PM UTC 24 |
404033729902 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_lowpower_counter.589869758 |
|
|
Oct 02 10:06:35 PM UTC 24 |
Oct 02 10:07:02 PM UTC 24 |
45971727137 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all_with_rand_reset.3038191475 |
|
|
Oct 02 10:07:02 PM UTC 24 |
Oct 02 10:07:23 PM UTC 24 |
3295182705 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.443081862 |
|
|
Oct 02 09:46:13 PM UTC 24 |
Oct 02 10:07:26 PM UTC 24 |
486391184068 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.1832711782 |
|
|
Oct 02 10:07:26 PM UTC 24 |
Oct 02 10:07:30 PM UTC 24 |
394755054 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.251181925 |
|
|
Oct 02 09:52:51 PM UTC 24 |
Oct 02 10:07:37 PM UTC 24 |
353117286466 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.1515501098 |
|
|
Oct 02 10:00:48 PM UTC 24 |
Oct 02 10:07:42 PM UTC 24 |
505053149644 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_02/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.3204198920 |
|
|
Oct 02 10:03:15 PM UTC 24 |
Oct 02 10:07:44 PM UTC 24 |
169289434434 ps |