Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	421394	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	5650513	1		T1	208		T5	19		T6	814

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1508851	1		T1	81		T5	14		T6	749
values[0x0]	2150297	1		T1	61		T5	8		T6	408
values[0x1]	2412759	1		T1	67		T5	8		T6	399

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	190686	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	5881221	1		T1	208		T5	19		T6	931

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	22709	1		T6	12		T3	4		T4	10
valid_sources[0x01]	23649	1		T1	1		T6	26		T3	2
valid_sources[0x02]	23509	1		T1	2		T3	2		T4	4
valid_sources[0x03]	23111	1		T6	2		T3	1		T4	7
valid_sources[0x04]	25662	1		T6	4		T3	1		T4	13
valid_sources[0x05]	22374	1		T6	2		T3	1		T4	6
valid_sources[0x06]	23851	1		T6	10		T16	2		T3	1
valid_sources[0x07]	24553	1		T6	3		T3	2		T4	6
valid_sources[0x08]	22024	1		T6	8		T3	2		T4	1
valid_sources[0x09]	26589	1		T6	4		T16	2		T3	2
valid_sources[0x0a]	23269	1		T6	7		T4	7		T7	13
valid_sources[0x0b]	23184	1		T6	8		T3	1		T4	5
valid_sources[0x0c]	24970	1		T6	3		T3	5		T4	5
valid_sources[0x0d]	24760	1		T6	2		T3	3		T4	4
valid_sources[0x0e]	23469	1		T1	11		T3	3		T4	4
valid_sources[0x0f]	24238	1		T6	7		T3	4		T4	6
valid_sources[0x10]	26422	1		T1	1		T6	1		T4	10
valid_sources[0x11]	23205	1		T6	1		T3	1		T4	6
valid_sources[0x12]	21293	1		T6	6		T17	1		T3	4
valid_sources[0x13]	26020	1		T3	2		T4	8		T7	9
valid_sources[0x14]	25771	1		T1	8		T6	10		T3	3
valid_sources[0x15]	22869	1		T6	12		T17	1		T3	2
valid_sources[0x16]	26738	1		T6	3		T3	1		T4	10
valid_sources[0x17]	21413	1		T6	10		T3	4		T4	10
valid_sources[0x18]	23099	1		T6	1		T3	4		T4	3
valid_sources[0x19]	26702	1		T1	1		T6	5		T17	1
valid_sources[0x1a]	23954	1		T6	5		T3	1		T4	7
valid_sources[0x1b]	21224	1		T6	20		T3	4		T4	4
valid_sources[0x1c]	24400	1		T6	17		T4	11		T7	5
valid_sources[0x1d]	24000	1		T1	1		T6	6		T4	3
valid_sources[0x1e]	22371	1		T6	2		T2	1		T3	4
valid_sources[0x1f]	23689	1		T6	14		T3	3		T4	13
valid_sources[0x20]	24639	1		T1	2		T6	11		T3	1
valid_sources[0x21]	23724	1		T6	6		T4	8		T7	1
valid_sources[0x22]	24674	1		T1	4		T4	7		T7	1
valid_sources[0x23]	23731	1		T6	6		T3	1		T4	9
valid_sources[0x24]	23742	1		T6	3		T2	4		T3	1
valid_sources[0x25]	23453	1		T6	6		T17	3		T3	2
valid_sources[0x26]	24894	1		T6	12		T4	6		T7	4
valid_sources[0x27]	22886	1		T1	5		T6	3		T3	3
valid_sources[0x28]	23379	1		T1	8		T6	3		T3	1
valid_sources[0x29]	25967	1		T6	6		T3	5		T43	12
valid_sources[0x2a]	23202	1		T1	1		T6	12		T2	1
valid_sources[0x2b]	24553	1		T6	1		T3	1		T4	4
valid_sources[0x2c]	23853	1		T1	3		T6	11		T3	3
valid_sources[0x2d]	25392	1		T6	10		T15	12		T4	17
valid_sources[0x2e]	27259	1		T1	3		T6	5		T3	2
valid_sources[0x2f]	24167	1		T6	3		T17	1		T3	1
valid_sources[0x30]	23063	1		T6	3		T3	1		T4	12
valid_sources[0x31]	22818	1		T6	12		T3	2		T4	6
valid_sources[0x32]	23378	1		T6	7		T17	1		T3	3
valid_sources[0x33]	23730	1		T6	3		T3	2		T4	7
valid_sources[0x34]	24328	1		T6	5		T3	2		T4	8
valid_sources[0x35]	24856	1		T6	15		T3	1		T4	12
valid_sources[0x36]	25008	1		T6	21		T3	3		T4	8
valid_sources[0x37]	22461	1		T1	3		T6	2		T14	10
valid_sources[0x38]	23030	1		T6	5		T17	1		T3	3
valid_sources[0x39]	25495	1		T17	1		T3	2		T4	8
valid_sources[0x3a]	24719	1		T6	2		T3	4		T4	1
valid_sources[0x3b]	24583	1		T6	9		T16	1		T3	1
valid_sources[0x3c]	23548	1		T6	4		T3	1		T4	9
valid_sources[0x3d]	23667	1		T1	8		T6	6		T4	1
valid_sources[0x3e]	23828	1		T6	9		T3	1		T4	3
valid_sources[0x3f]	24549	1		T6	7		T17	1		T3	2
valid_sources[0x40]	24072	1		T6	10		T3	1		T4	11
valid_sources[0x41]	24303	1		T1	1		T17	1		T3	1
valid_sources[0x42]	26032	1		T6	4		T3	1		T4	10
valid_sources[0x43]	24003	1		T1	1		T6	5		T4	13
valid_sources[0x44]	24753	1		T6	1		T3	2		T4	3
valid_sources[0x45]	21522	1		T6	5		T2	1		T17	2
valid_sources[0x46]	21987	1		T1	3		T6	3		T3	2
valid_sources[0x47]	23395	1		T6	14		T3	3		T4	6
valid_sources[0x48]	22659	1		T6	7		T3	1		T4	4
valid_sources[0x49]	22076	1		T6	7		T17	1		T4	10
valid_sources[0x4a]	23023	1		T6	9		T2	1		T3	1
valid_sources[0x4b]	22873	1		T1	4		T6	18		T17	1
valid_sources[0x4c]	23617	1		T6	8		T4	12		T50	3
valid_sources[0x4d]	24259	1		T6	2		T3	1		T4	5
valid_sources[0x4e]	22056	1		T3	2		T4	9		T7	9
valid_sources[0x4f]	22068	1		T17	1		T3	1		T4	2
valid_sources[0x50]	23675	1		T6	8		T4	16		T50	3
valid_sources[0x51]	24093	1		T3	2		T4	6		T7	1
valid_sources[0x52]	26766	1		T6	9		T3	1		T4	6
valid_sources[0x53]	23273	1		T6	3		T3	3		T4	3
valid_sources[0x54]	24210	1		T6	11		T4	16		T7	1
valid_sources[0x55]	22436	1		T6	3		T3	5		T4	10
valid_sources[0x56]	25257	1		T1	3		T6	1		T3	2
valid_sources[0x57]	23480	1		T6	2		T3	1		T4	7
valid_sources[0x58]	22196	1		T1	1		T6	11		T3	3
valid_sources[0x59]	24625	1		T6	25		T3	2		T4	18
valid_sources[0x5a]	24311	1		T3	1		T4	6		T7	2
valid_sources[0x5b]	22803	1		T6	8		T17	1		T3	2
valid_sources[0x5c]	23545	1		T1	2		T6	6		T3	1
valid_sources[0x5d]	23233	1		T6	33		T3	3		T4	2
valid_sources[0x5e]	22768	1		T6	29		T17	1		T3	1
valid_sources[0x5f]	23314	1		T6	5		T9	2		T52	4
valid_sources[0x60]	25003	1		T6	3		T4	6		T50	3
valid_sources[0x61]	23563	1		T6	7		T3	1		T4	6
valid_sources[0x62]	23357	1		T6	8		T3	1		T4	4
valid_sources[0x63]	24155	1		T6	2		T3	2		T4	13
valid_sources[0x64]	24713	1		T6	13		T3	2		T4	2
valid_sources[0x65]	22987	1		T6	14		T4	16		T7	1
valid_sources[0x66]	24452	1		T1	4		T6	2		T3	2
valid_sources[0x67]	25068	1		T6	16		T3	2		T4	8
valid_sources[0x68]	24920	1		T6	24		T3	4		T4	8
valid_sources[0x69]	23199	1		T1	3		T6	3		T4	11
valid_sources[0x6a]	25059	1		T6	3		T3	2		T4	6
valid_sources[0x6b]	21825	1		T6	7		T3	2		T4	11
valid_sources[0x6c]	25129	1		T6	4		T3	5		T4	11
valid_sources[0x6d]	24961	1		T6	6		T17	1		T3	2
valid_sources[0x6e]	24619	1		T6	3		T2	2		T3	1
valid_sources[0x6f]	23482	1		T1	3		T6	3		T4	4
valid_sources[0x70]	23752	1		T6	2		T2	5		T17	2
valid_sources[0x71]	23093	1		T5	7		T6	1		T17	1
valid_sources[0x72]	22611	1		T4	13		T45	6		T7	4
valid_sources[0x73]	23604	1		T6	7		T17	2		T3	1
valid_sources[0x74]	24490	1		T6	4		T3	1		T4	2
valid_sources[0x75]	23267	1		T6	5		T17	1		T3	1
valid_sources[0x76]	21033	1		T6	4		T4	10		T7	5
valid_sources[0x77]	22445	1		T6	5		T4	9		T8	1
valid_sources[0x78]	24009	1		T6	6		T17	1		T3	3
valid_sources[0x79]	24214	1		T6	4		T3	1		T4	17
valid_sources[0x7a]	24158	1		T1	5		T6	6		T17	2
valid_sources[0x7b]	25566	1		T1	2		T6	1		T3	1
valid_sources[0x7c]	22640	1		T1	3		T6	9		T17	1
valid_sources[0x7d]	21893	1		T1	4		T2	2		T4	5
valid_sources[0x7e]	22829	1		T6	9		T3	3		T4	9
valid_sources[0x7f]	23292	1		T16	1		T4	10		T45	6
valid_sources[0x80]	23873	1		T1	5		T6	16		T16	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1415671

1

T1

80

T5

9

T6

388

values[0x0]

all_enables

biggest_size

2116222

1

T1

61

T5

6

T6

236

values[0x1]

all_enables

biggest_size

2118620

1

T1

67

T5

4

T6

190