Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 348981 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 4281537 1 T1 13 T2 13 T3 244



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 1137637 1 T1 1 T2 1 T3 45
values[0x0] 1637023 1 T1 6 T2 8 T3 153
values[0x1] 1855858 1 T1 12 T2 10 T3 159



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 155471 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 4475047 1 T1 13 T2 14 T3 266



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 17969 1 T9 179 T13 1031 T15 7
valid_sources[0x01] 18707 1 T5 1 T8 19 T9 293
valid_sources[0x02] 17225 1 T9 66 T11 4 T13 951
valid_sources[0x03] 18062 1 T9 32 T11 7 T13 920
valid_sources[0x04] 17309 1 T5 1 T7 1 T9 293
valid_sources[0x05] 19355 1 T9 510 T11 5 T13 1049
valid_sources[0x06] 16961 1 T9 45 T13 895 T17 280
valid_sources[0x07] 17342 1 T9 220 T13 933 T15 8
valid_sources[0x08] 18160 1 T5 1 T7 1 T9 275
valid_sources[0x09] 17703 1 T9 149 T11 3 T13 956
valid_sources[0x0a] 18373 1 T9 19 T11 2 T13 954
valid_sources[0x0b] 17842 1 T7 1 T9 15 T13 1010
valid_sources[0x0c] 18762 1 T7 3 T9 166 T13 933
valid_sources[0x0d] 18200 1 T9 19 T13 959 T16 1
valid_sources[0x0e] 17368 1 T9 100 T13 911 T17 255
valid_sources[0x0f] 18187 1 T9 589 T11 3 T13 1036
valid_sources[0x10] 18494 1 T9 185 T11 1 T13 951
valid_sources[0x11] 17681 1 T4 1 T9 17 T13 925
valid_sources[0x12] 18408 1 T9 186 T13 1025 T16 1
valid_sources[0x13] 17357 1 T9 317 T13 923 T17 283
valid_sources[0x14] 19111 1 T4 2 T9 220 T13 1055
valid_sources[0x15] 17944 1 T1 1 T9 372 T13 934
valid_sources[0x16] 18186 1 T9 49 T13 983 T16 1
valid_sources[0x17] 17599 1 T9 64 T13 848 T15 3
valid_sources[0x18] 18646 1 T9 301 T13 842 T17 286
valid_sources[0x19] 17423 1 T7 1 T9 71 T11 10
valid_sources[0x1a] 17960 1 T9 176 T13 972 T17 272
valid_sources[0x1b] 19159 1 T9 86 T13 955 T17 298
valid_sources[0x1c] 17917 1 T4 1 T9 329 T13 951
valid_sources[0x1d] 17973 1 T4 2 T9 711 T13 937
valid_sources[0x1e] 17650 1 T9 112 T11 1 T13 927
valid_sources[0x1f] 17945 1 T9 59 T13 1006 T17 277
valid_sources[0x20] 18328 1 T9 20 T13 896 T15 3
valid_sources[0x21] 18357 1 T9 171 T13 950 T15 5
valid_sources[0x22] 17648 1 T9 3 T13 955 T17 238
valid_sources[0x23] 17164 1 T9 13 T13 970 T17 258
valid_sources[0x24] 17668 1 T9 6 T13 945 T17 257
valid_sources[0x25] 17814 1 T9 5 T13 979 T17 261
valid_sources[0x26] 18393 1 T9 425 T11 1 T13 900
valid_sources[0x27] 18322 1 T9 196 T12 1 T13 900
valid_sources[0x28] 17480 1 T9 94 T13 864 T17 259
valid_sources[0x29] 18197 1 T1 1 T7 1 T9 46
valid_sources[0x2a] 18020 1 T9 88 T13 902 T17 273
valid_sources[0x2b] 19498 1 T9 560 T13 1064 T17 247
valid_sources[0x2c] 18526 1 T9 196 T11 12 T13 1005
valid_sources[0x2d] 18292 1 T7 1 T9 345 T13 1001
valid_sources[0x2e] 18142 1 T4 1 T9 14 T11 1
valid_sources[0x2f] 19172 1 T4 3 T9 84 T13 932
valid_sources[0x30] 18843 1 T9 164 T12 2 T13 975
valid_sources[0x31] 18345 1 T5 1 T9 17 T13 908
valid_sources[0x32] 18018 1 T9 5 T13 950 T17 297
valid_sources[0x33] 18404 1 T5 1 T9 9 T13 843
valid_sources[0x34] 17547 1 T7 1 T9 194 T13 927
valid_sources[0x35] 19034 1 T9 11 T13 999 T15 6
valid_sources[0x36] 17326 1 T9 3 T11 8 T13 1022
valid_sources[0x37] 17274 1 T9 230 T13 951 T17 275
valid_sources[0x38] 17030 1 T5 1 T9 97 T11 4
valid_sources[0x39] 19006 1 T5 1 T9 154 T13 864
valid_sources[0x3a] 18274 1 T5 1 T9 82 T11 3
valid_sources[0x3b] 18870 1 T1 1 T9 285 T11 4
valid_sources[0x3c] 18702 1 T2 19 T9 445 T13 958
valid_sources[0x3d] 17502 1 T9 171 T13 928 T15 1
valid_sources[0x3e] 18094 1 T9 5 T13 933 T17 291
valid_sources[0x3f] 18171 1 T9 10 T13 998 T17 268
valid_sources[0x40] 18663 1 T9 141 T13 1050 T17 274
valid_sources[0x41] 19153 1 T9 302 T13 946 T17 277
valid_sources[0x42] 17638 1 T9 29 T13 934 T15 3
valid_sources[0x43] 18510 1 T9 173 T12 1 T13 1129
valid_sources[0x44] 18365 1 T9 475 T11 7 T13 855
valid_sources[0x45] 18248 1 T1 1 T9 9 T13 1018
valid_sources[0x46] 17181 1 T9 70 T13 941 T17 267
valid_sources[0x47] 18291 1 T9 58 T13 1018 T17 288
valid_sources[0x48] 16915 1 T9 4 T11 1 T13 817
valid_sources[0x49] 17992 1 T9 349 T13 944 T17 255
valid_sources[0x4a] 18503 1 T9 155 T13 903 T15 2
valid_sources[0x4b] 17376 1 T9 229 T11 1 T13 917
valid_sources[0x4c] 19131 1 T9 514 T13 851 T17 296
valid_sources[0x4d] 18847 1 T9 77 T12 1 T13 1042
valid_sources[0x4e] 18347 1 T9 234 T13 949 T16 1
valid_sources[0x4f] 18867 1 T9 80 T11 1 T13 956
valid_sources[0x50] 18447 1 T9 366 T13 1021 T15 2
valid_sources[0x51] 17869 1 T9 413 T13 1071 T17 304
valid_sources[0x52] 17301 1 T5 1 T7 1 T9 125
valid_sources[0x53] 17381 1 T9 97 T13 983 T15 2
valid_sources[0x54] 17041 1 T9 11 T13 937 T16 1
valid_sources[0x55] 18337 1 T9 504 T13 1039 T17 237
valid_sources[0x56] 18299 1 T9 55 T13 988 T17 276
valid_sources[0x57] 18811 1 T9 584 T13 1003 T17 250
valid_sources[0x58] 19648 1 T9 9 T11 2 T13 885
valid_sources[0x59] 18332 1 T4 1 T9 356 T13 966
valid_sources[0x5a] 18816 1 T9 15 T13 947 T16 1
valid_sources[0x5b] 17015 1 T9 137 T13 1011 T17 271
valid_sources[0x5c] 17630 1 T9 198 T13 1043 T17 260
valid_sources[0x5d] 17851 1 T9 105 T13 968 T16 3
valid_sources[0x5e] 18542 1 T5 1 T9 518 T11 8
valid_sources[0x5f] 18138 1 T5 1 T9 135 T13 912
valid_sources[0x60] 17834 1 T9 92 T13 1007 T15 3
valid_sources[0x61] 18266 1 T9 225 T13 946 T17 272
valid_sources[0x62] 18178 1 T9 44 T13 1013 T17 268
valid_sources[0x63] 17039 1 T9 14 T13 934 T17 251
valid_sources[0x64] 16585 1 T7 1 T9 141 T13 970
valid_sources[0x65] 17001 1 T9 123 T13 800 T17 232
valid_sources[0x66] 18080 1 T4 1 T9 25 T13 949
valid_sources[0x67] 18242 1 T9 12 T13 964 T17 277
valid_sources[0x68] 18575 1 T9 63 T13 983 T15 1
valid_sources[0x69] 17958 1 T9 171 T13 1007 T15 12
valid_sources[0x6a] 17399 1 T9 28 T13 943 T17 304
valid_sources[0x6b] 17652 1 T9 49 T13 985 T17 275
valid_sources[0x6c] 18690 1 T9 628 T11 1 T13 792
valid_sources[0x6d] 18312 1 T4 2 T5 1 T9 51
valid_sources[0x6e] 18098 1 T9 434 T11 7 T13 1025
valid_sources[0x6f] 19713 1 T9 154 T13 1005 T17 262
valid_sources[0x70] 19538 1 T9 175 T11 24 T13 1022
valid_sources[0x71] 18972 1 T9 401 T13 1069 T17 278
valid_sources[0x72] 18369 1 T9 10 T11 2 T13 836
valid_sources[0x73] 17803 1 T9 84 T13 873 T15 6
valid_sources[0x74] 19066 1 T9 687 T13 894 T15 3
valid_sources[0x75] 18592 1 T4 2 T7 1 T9 440
valid_sources[0x76] 18833 1 T5 1 T9 110 T13 1049
valid_sources[0x77] 16842 1 T9 199 T13 969 T17 289
valid_sources[0x78] 19010 1 T9 18 T13 1048 T17 271
valid_sources[0x79] 17119 1 T9 182 T13 764 T17 265
valid_sources[0x7a] 17825 1 T9 179 T11 14 T13 1040
valid_sources[0x7b] 18498 1 T9 284 T13 951 T17 272
valid_sources[0x7c] 19403 1 T9 201 T13 1010 T17 282
valid_sources[0x7d] 19035 1 T5 2 T9 267 T11 2
valid_sources[0x7e] 18358 1 T9 8 T13 1013 T17 281
valid_sources[0x7f] 18381 1 T9 500 T13 956 T17 306
valid_sources[0x80] 18046 1 T9 359 T12 2 T13 928



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 1067073 1 T1 1 T2 1 T3 24
values[0x0] all_enables biggest_size 1607775 1 T1 3 T2 5 T3 111
values[0x1] all_enables biggest_size 1606689 1 T1 9 T2 7 T3 109

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%