Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 385982 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 4743826 1 T1 13 T2 17 T3 60585



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 1261757 1 T1 1 T2 1 T3 15961
values[0x0] 1811769 1 T1 10 T2 10 T3 23126
values[0x1] 2056282 1 T1 9 T2 11 T3 26128



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 170887 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 4958921 1 T1 16 T2 17 T3 63194



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 18433 1 T3 238 T5 534 T7 974
valid_sources[0x01] 20235 1 T3 271 T5 890 T7 515
valid_sources[0x02] 20431 1 T3 251 T5 857 T7 1406
valid_sources[0x03] 20106 1 T3 268 T5 1340 T7 1147
valid_sources[0x04] 19753 1 T3 263 T5 421 T7 1002
valid_sources[0x05] 20208 1 T3 238 T5 852 T7 601
valid_sources[0x06] 20551 1 T3 258 T5 481 T7 817
valid_sources[0x07] 18687 1 T3 244 T5 550 T7 536
valid_sources[0x08] 20531 1 T3 274 T5 488 T7 1177
valid_sources[0x09] 18084 1 T3 291 T5 307 T7 777
valid_sources[0x0a] 21317 1 T3 252 T5 929 T7 835
valid_sources[0x0b] 22313 1 T3 253 T5 701 T7 383
valid_sources[0x0c] 18741 1 T3 266 T5 304 T7 1202
valid_sources[0x0d] 19145 1 T3 231 T5 446 T7 401
valid_sources[0x0e] 19538 1 T3 223 T5 1119 T7 1066
valid_sources[0x0f] 20760 1 T3 252 T5 1002 T7 834
valid_sources[0x10] 19245 1 T1 1 T3 267 T5 563
valid_sources[0x11] 20979 1 T3 263 T5 552 T7 1223
valid_sources[0x12] 19051 1 T3 249 T5 243 T7 649
valid_sources[0x13] 20248 1 T1 1 T3 275 T5 498
valid_sources[0x14] 19939 1 T3 266 T5 488 T7 495
valid_sources[0x15] 19487 1 T3 275 T5 701 T7 922
valid_sources[0x16] 21622 1 T3 258 T5 1234 T7 675
valid_sources[0x17] 19711 1 T3 265 T5 869 T7 496
valid_sources[0x18] 19436 1 T3 253 T5 138 T7 1104
valid_sources[0x19] 16647 1 T3 272 T5 626 T7 568
valid_sources[0x1a] 18382 1 T3 236 T5 444 T7 494
valid_sources[0x1b] 20086 1 T3 246 T5 801 T7 1549
valid_sources[0x1c] 19542 1 T3 243 T5 485 T7 1061
valid_sources[0x1d] 20961 1 T3 257 T5 977 T7 1236
valid_sources[0x1e] 21645 1 T3 238 T5 919 T7 810
valid_sources[0x1f] 19021 1 T3 241 T5 623 T7 603
valid_sources[0x20] 19697 1 T3 230 T5 423 T7 1152
valid_sources[0x21] 19649 1 T3 250 T5 650 T7 937
valid_sources[0x22] 21328 1 T3 274 T5 369 T7 652
valid_sources[0x23] 19438 1 T3 238 T5 712 T7 363
valid_sources[0x24] 20275 1 T3 274 T5 257 T7 1221
valid_sources[0x25] 19956 1 T3 264 T5 1008 T6 1
valid_sources[0x26] 19730 1 T3 261 T5 691 T7 596
valid_sources[0x27] 20779 1 T3 238 T5 579 T7 577
valid_sources[0x28] 20382 1 T3 305 T5 538 T7 1044
valid_sources[0x29] 20053 1 T3 289 T5 902 T6 1
valid_sources[0x2a] 20017 1 T3 264 T5 348 T6 1
valid_sources[0x2b] 19406 1 T3 246 T5 463 T7 627
valid_sources[0x2c] 20142 1 T3 257 T5 941 T7 710
valid_sources[0x2d] 19758 1 T3 268 T4 19 T5 842
valid_sources[0x2e] 19399 1 T3 292 T5 85 T6 3
valid_sources[0x2f] 19813 1 T3 256 T5 586 T7 706
valid_sources[0x30] 19562 1 T3 259 T5 119 T7 1358
valid_sources[0x31] 19410 1 T3 251 T5 288 T7 1095
valid_sources[0x32] 19013 1 T3 237 T5 784 T7 863
valid_sources[0x33] 19400 1 T3 247 T5 591 T7 459
valid_sources[0x34] 21327 1 T3 242 T5 1520 T7 903
valid_sources[0x35] 20094 1 T3 248 T5 639 T7 680
valid_sources[0x36] 21268 1 T3 270 T5 1005 T7 926
valid_sources[0x37] 21068 1 T3 261 T5 1151 T7 900
valid_sources[0x38] 19351 1 T3 244 T5 597 T7 854
valid_sources[0x39] 23441 1 T3 274 T5 858 T7 1132
valid_sources[0x3a] 20320 1 T3 234 T5 534 T7 932
valid_sources[0x3b] 18351 1 T3 277 T5 939 T7 384
valid_sources[0x3c] 18756 1 T3 234 T5 800 T7 616
valid_sources[0x3d] 18586 1 T3 238 T5 210 T7 1213
valid_sources[0x3e] 18471 1 T3 257 T5 1499 T7 700
valid_sources[0x3f] 19040 1 T3 271 T5 565 T7 1151
valid_sources[0x40] 18890 1 T3 234 T5 380 T7 1408
valid_sources[0x41] 19262 1 T3 257 T5 294 T7 1159
valid_sources[0x42] 20204 1 T3 263 T5 409 T7 958
valid_sources[0x43] 21021 1 T3 250 T5 1023 T7 729
valid_sources[0x44] 18811 1 T3 234 T5 837 T7 329
valid_sources[0x45] 20999 1 T3 256 T5 550 T7 569
valid_sources[0x46] 20663 1 T3 226 T5 416 T7 739
valid_sources[0x47] 20599 1 T3 219 T5 627 T7 1039
valid_sources[0x48] 21628 1 T3 230 T5 287 T7 512
valid_sources[0x49] 19383 1 T3 274 T5 369 T7 1131
valid_sources[0x4a] 21799 1 T3 231 T5 538 T7 861
valid_sources[0x4b] 19552 1 T3 256 T5 727 T7 983
valid_sources[0x4c] 19754 1 T3 247 T5 543 T7 454
valid_sources[0x4d] 19181 1 T1 5 T3 266 T5 586
valid_sources[0x4e] 20971 1 T3 216 T5 535 T7 709
valid_sources[0x4f] 19869 1 T3 250 T5 616 T6 1
valid_sources[0x50] 19662 1 T3 270 T5 409 T7 416
valid_sources[0x51] 19879 1 T3 256 T5 311 T7 1100
valid_sources[0x52] 19487 1 T3 240 T5 566 T7 761
valid_sources[0x53] 22354 1 T3 281 T5 968 T7 1275
valid_sources[0x54] 20173 1 T3 242 T5 127 T7 455
valid_sources[0x55] 20442 1 T3 270 T5 747 T7 1086
valid_sources[0x56] 22783 1 T3 274 T5 566 T7 785
valid_sources[0x57] 19461 1 T3 284 T5 851 T7 475
valid_sources[0x58] 19784 1 T3 226 T5 712 T7 828
valid_sources[0x59] 20363 1 T3 244 T5 395 T7 527
valid_sources[0x5a] 19458 1 T3 252 T5 567 T7 844
valid_sources[0x5b] 20548 1 T3 274 T5 387 T7 1222
valid_sources[0x5c] 18556 1 T3 246 T5 232 T7 1019
valid_sources[0x5d] 20566 1 T3 249 T5 311 T7 288
valid_sources[0x5e] 19635 1 T3 220 T5 537 T7 279
valid_sources[0x5f] 19495 1 T3 269 T5 553 T7 509
valid_sources[0x60] 21329 1 T3 255 T5 286 T7 637
valid_sources[0x61] 19900 1 T3 241 T5 634 T7 668
valid_sources[0x62] 22596 1 T3 245 T5 906 T7 695
valid_sources[0x63] 21068 1 T3 265 T5 818 T7 574
valid_sources[0x64] 21980 1 T3 266 T5 1126 T7 711
valid_sources[0x65] 19511 1 T3 250 T5 398 T7 1040
valid_sources[0x66] 17976 1 T3 252 T5 27 T7 1457
valid_sources[0x67] 20183 1 T3 251 T5 833 T7 826
valid_sources[0x68] 20029 1 T3 302 T5 740 T7 1076
valid_sources[0x69] 19990 1 T3 239 T5 713 T7 957
valid_sources[0x6a] 20563 1 T3 274 T5 979 T7 738
valid_sources[0x6b] 20339 1 T3 253 T5 306 T7 1227
valid_sources[0x6c] 20916 1 T3 276 T5 847 T7 787
valid_sources[0x6d] 21215 1 T3 253 T5 431 T7 456
valid_sources[0x6e] 20314 1 T3 221 T5 541 T6 1
valid_sources[0x6f] 20645 1 T3 252 T5 928 T7 1154
valid_sources[0x70] 20770 1 T1 1 T3 246 T5 299
valid_sources[0x71] 18208 1 T3 275 T5 453 T7 798
valid_sources[0x72] 20158 1 T3 230 T5 516 T7 632
valid_sources[0x73] 20661 1 T3 240 T5 628 T7 871
valid_sources[0x74] 21856 1 T1 2 T3 285 T5 1394
valid_sources[0x75] 19562 1 T3 269 T5 432 T7 924
valid_sources[0x76] 20812 1 T3 230 T5 325 T7 572
valid_sources[0x77] 19431 1 T3 231 T5 689 T7 537
valid_sources[0x78] 17009 1 T3 270 T5 371 T7 728
valid_sources[0x79] 19390 1 T3 255 T5 452 T7 766
valid_sources[0x7a] 19221 1 T3 271 T5 425 T7 633
valid_sources[0x7b] 20433 1 T3 268 T5 508 T6 1
valid_sources[0x7c] 18592 1 T3 280 T5 222 T7 733
valid_sources[0x7d] 19371 1 T3 268 T5 269 T7 604
valid_sources[0x7e] 21201 1 T2 3 T3 247 T5 378
valid_sources[0x7f] 19409 1 T3 282 T5 481 T7 604
valid_sources[0x80] 20282 1 T3 256 T5 338 T7 555



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 1183930 1 T3 15052 T5 34768 T6 1
values[0x0] all_enables biggest_size 1779777 1 T1 9 T2 10 T3 22768
values[0x1] all_enables biggest_size 1780119 1 T1 4 T2 7 T3 22765

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%