Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_aon_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	407536	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	5054782	1		T1	36783		T2	13		T3	354107

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1341988	1		T1	9791		T2	1		T3	93768
values[0x0]	1932361	1		T1	14066		T2	11		T3	134882
values[0x1]	2187969	1		T1	15896		T2	8		T3	152912

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	180911	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	5281407	1		T1	38403		T2	14		T3	369765

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	19857	1		T1	134		T2	1		T3	1459
valid_sources[0x01]	21885	1		T1	152		T3	1485		T13	1
valid_sources[0x02]	21555	1		T1	121		T3	1453		T11	3
valid_sources[0x03]	20725	1		T1	11		T3	1544		T6	1
valid_sources[0x04]	20054	1		T1	141		T3	1429		T11	3
valid_sources[0x05]	21205	1		T1	33		T3	1441		T11	7
valid_sources[0x06]	19925	1		T1	281		T3	1521		T11	1
valid_sources[0x07]	21976	1		T1	282		T3	1578		T13	2
valid_sources[0x08]	22366	1		T1	189		T3	1488		T11	2
valid_sources[0x09]	21575	1		T1	152		T2	1		T3	1539
valid_sources[0x0a]	21672	1		T1	321		T3	1484		T13	2
valid_sources[0x0b]	20784	1		T1	44		T3	1492		T14	278
valid_sources[0x0c]	21975	1		T1	27		T3	1433		T4	1
valid_sources[0x0d]	20533	1		T1	46		T3	1563		T11	2
valid_sources[0x0e]	22308	1		T1	18		T3	1506		T11	2
valid_sources[0x0f]	21292	1		T1	23		T2	1		T3	1540
valid_sources[0x10]	20728	1		T1	144		T3	1543		T11	2
valid_sources[0x11]	21650	1		T1	97		T3	1459		T13	1
valid_sources[0x12]	21964	1		T1	125		T3	1428		T11	2
valid_sources[0x13]	20883	1		T1	5		T3	1502		T13	1
valid_sources[0x14]	22525	1		T1	21		T3	1439		T11	6
valid_sources[0x15]	22034	1		T1	128		T2	1		T3	1455
valid_sources[0x16]	21617	1		T1	475		T3	1571		T6	2
valid_sources[0x17]	20672	1		T1	364		T3	1510		T4	2
valid_sources[0x18]	20437	1		T1	76		T3	1487		T13	2
valid_sources[0x19]	22190	1		T1	322		T3	1505		T11	1
valid_sources[0x1a]	20718	1		T1	68		T3	1518		T14	289
valid_sources[0x1b]	21895	1		T1	35		T2	1		T3	1506
valid_sources[0x1c]	22180	1		T1	6		T3	1495		T11	3
valid_sources[0x1d]	21740	1		T1	44		T3	1435		T13	1
valid_sources[0x1e]	21883	1		T1	144		T3	1480		T11	2
valid_sources[0x1f]	21109	1		T1	72		T3	1536		T11	1
valid_sources[0x20]	20247	1		T1	264		T3	1457		T12	1
valid_sources[0x21]	20682	1		T1	125		T3	1553		T13	3
valid_sources[0x22]	21653	1		T1	5		T3	1451		T14	284
valid_sources[0x23]	20291	1		T1	218		T3	1521		T14	296
valid_sources[0x24]	23586	1		T1	393		T3	1456		T14	295
valid_sources[0x25]	20238	1		T1	297		T3	1448		T13	1
valid_sources[0x26]	19915	1		T1	120		T3	1426		T13	7
valid_sources[0x27]	22796	1		T1	138		T3	1491		T11	2
valid_sources[0x28]	20755	1		T1	527		T3	1518		T13	1
valid_sources[0x29]	22036	1		T1	283		T3	1510		T13	3
valid_sources[0x2a]	20827	1		T1	332		T3	1488		T6	2
valid_sources[0x2b]	22656	1		T1	26		T3	1566		T13	1
valid_sources[0x2c]	21896	1		T1	149		T3	1471		T11	3
valid_sources[0x2d]	21287	1		T1	27		T3	1511		T11	7
valid_sources[0x2e]	20852	1		T1	136		T3	1512		T14	300
valid_sources[0x2f]	20572	1		T1	247		T3	1493		T13	3
valid_sources[0x30]	21736	1		T1	128		T2	1		T3	1508
valid_sources[0x31]	20368	1		T1	80		T3	1501		T11	1
valid_sources[0x32]	21630	1		T1	235		T3	1452		T13	1
valid_sources[0x33]	20220	1		T1	4		T3	1543		T14	287
valid_sources[0x34]	22009	1		T1	228		T3	1463		T11	5
valid_sources[0x35]	20861	1		T1	17		T3	1441		T11	1
valid_sources[0x36]	21866	1		T1	323		T3	1435		T13	1
valid_sources[0x37]	21595	1		T1	293		T3	1460		T11	2
valid_sources[0x38]	23137	1		T1	276		T3	1437		T14	270
valid_sources[0x39]	21526	1		T1	226		T3	1490		T11	6
valid_sources[0x3a]	21742	1		T1	67		T3	1479		T11	1
valid_sources[0x3b]	21522	1		T1	279		T3	1532		T13	2
valid_sources[0x3c]	20993	1		T1	199		T3	1492		T13	2
valid_sources[0x3d]	20291	1		T1	274		T3	1478		T11	2
valid_sources[0x3e]	20949	1		T1	249		T3	1474		T11	1
valid_sources[0x3f]	20752	1		T1	50		T3	1450		T14	316
valid_sources[0x40]	19331	1		T1	102		T3	1568		T4	2
valid_sources[0x41]	20236	1		T1	242		T3	1494		T11	5
valid_sources[0x42]	21284	1		T1	115		T3	1486		T13	2
valid_sources[0x43]	21651	1		T1	302		T3	1514		T11	5
valid_sources[0x44]	21538	1		T1	21		T3	1499		T5	20
valid_sources[0x45]	20415	1		T1	71		T3	1466		T11	3
valid_sources[0x46]	22118	1		T1	127		T3	1474		T11	2
valid_sources[0x47]	21343	1		T1	183		T3	1497		T11	3
valid_sources[0x48]	21341	1		T1	142		T3	1554		T6	1
valid_sources[0x49]	19682	1		T1	11		T3	1454		T11	9
valid_sources[0x4a]	22798	1		T1	543		T3	1463		T7	22
valid_sources[0x4b]	23273	1		T1	97		T3	1401		T4	4
valid_sources[0x4c]	22331	1		T1	568		T3	1493		T11	1
valid_sources[0x4d]	20731	1		T1	21		T3	1571		T13	5
valid_sources[0x4e]	20648	1		T1	7		T3	1475		T11	1
valid_sources[0x4f]	22925	1		T1	70		T3	1434		T11	2
valid_sources[0x50]	21779	1		T1	191		T3	1547		T14	279
valid_sources[0x51]	20463	1		T1	17		T3	1382		T11	5
valid_sources[0x52]	20262	1		T1	145		T3	1498		T11	1
valid_sources[0x53]	21885	1		T1	25		T2	1		T3	1527
valid_sources[0x54]	20516	1		T1	240		T2	1		T3	1516
valid_sources[0x55]	20345	1		T1	106		T3	1477		T14	309
valid_sources[0x56]	19666	1		T1	10		T3	1539		T14	303
valid_sources[0x57]	20819	1		T1	268		T3	1435		T14	284
valid_sources[0x58]	21496	1		T1	24		T3	1502		T13	2
valid_sources[0x59]	22528	1		T1	444		T3	1534		T14	299
valid_sources[0x5a]	20979	1		T1	18		T2	1		T3	1495
valid_sources[0x5b]	21952	1		T1	46		T3	1475		T11	3
valid_sources[0x5c]	20437	1		T1	190		T3	1498		T13	1
valid_sources[0x5d]	19878	1		T1	68		T3	1493		T6	2
valid_sources[0x5e]	22916	1		T1	135		T3	1475		T13	2
valid_sources[0x5f]	21763	1		T1	237		T3	1439		T14	298
valid_sources[0x60]	22134	1		T1	228		T3	1443		T11	8
valid_sources[0x61]	21640	1		T1	74		T3	1382		T14	254
valid_sources[0x62]	23395	1		T1	338		T3	1516		T14	307
valid_sources[0x63]	22416	1		T1	840		T3	1456		T14	314
valid_sources[0x64]	21539	1		T1	477		T3	1431		T13	1
valid_sources[0x65]	19544	1		T1	107		T3	1524		T29	1
valid_sources[0x66]	20517	1		T1	145		T3	1478		T14	282
valid_sources[0x67]	21225	1		T1	64		T3	1523		T14	303
valid_sources[0x68]	21923	1		T1	265		T3	1541		T6	1
valid_sources[0x69]	19206	1		T1	326		T3	1534		T11	3
valid_sources[0x6a]	21559	1		T1	167		T3	1475		T14	324
valid_sources[0x6b]	21159	1		T1	248		T3	1473		T14	317
valid_sources[0x6c]	22945	1		T1	269		T3	1501		T29	2
valid_sources[0x6d]	22719	1		T1	248		T3	1590		T14	287
valid_sources[0x6e]	20822	1		T1	520		T3	1396		T11	2
valid_sources[0x6f]	21907	1		T1	25		T3	1466		T11	2
valid_sources[0x70]	22107	1		T1	114		T2	1		T3	1573
valid_sources[0x71]	23169	1		T1	100		T3	1426		T14	264
valid_sources[0x72]	22224	1		T1	104		T3	1489		T11	3
valid_sources[0x73]	21197	1		T1	263		T3	1409		T13	3
valid_sources[0x74]	20722	1		T1	63		T3	1457		T11	2
valid_sources[0x75]	21992	1		T1	85		T3	1489		T13	3
valid_sources[0x76]	20734	1		T1	38		T3	1473		T14	275
valid_sources[0x77]	21388	1		T1	761		T3	1393		T11	1
valid_sources[0x78]	21154	1		T1	255		T3	1520		T14	290
valid_sources[0x79]	23557	1		T1	373		T3	1444		T11	1
valid_sources[0x7a]	19107	1		T1	16		T3	1439		T11	3
valid_sources[0x7b]	21838	1		T1	284		T3	1476		T13	2
valid_sources[0x7c]	20406	1		T1	399		T3	1444		T11	1
valid_sources[0x7d]	22238	1		T1	5		T2	1		T3	1529
valid_sources[0x7e]	20747	1		T1	45		T2	1		T3	1491
valid_sources[0x7f]	22481	1		T1	88		T3	1485		T13	1
valid_sources[0x80]	22222	1		T1	197		T3	1548		T14	305

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1260120

1

T1

9160

T2

1

T3

88576

values[0x0]

all_enables

biggest_size

1898562

1

T1

13787

T2

10

T3

132969

values[0x1]

all_enables

biggest_size

1896100

1

T1

13836

T2

2

T3

132562