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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.52 99.15 95.84 100.00 100.00 98.81 97.01 98.80


Total test records in report: 1010
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T799 /workspace/coverage/default/20.clkmgr_idle_intersig_mubi.1508440729 Apr 04 03:47:30 PM PDT 24 Apr 04 03:47:31 PM PDT 24 16658441 ps
T800 /workspace/coverage/default/41.clkmgr_alert_test.4102704140 Apr 04 03:48:54 PM PDT 24 Apr 04 03:48:55 PM PDT 24 19808905 ps
T801 /workspace/coverage/default/44.clkmgr_div_intersig_mubi.2153766146 Apr 04 03:48:48 PM PDT 24 Apr 04 03:48:49 PM PDT 24 30464117 ps
T802 /workspace/coverage/default/13.clkmgr_stress_all.2978818898 Apr 04 03:47:17 PM PDT 24 Apr 04 03:47:42 PM PDT 24 4744158923 ps
T803 /workspace/coverage/default/47.clkmgr_extclk.3040008127 Apr 04 03:49:03 PM PDT 24 Apr 04 03:49:04 PM PDT 24 112213193 ps
T55 /workspace/coverage/default/1.clkmgr_sec_cm.3421294272 Apr 04 03:46:15 PM PDT 24 Apr 04 03:46:19 PM PDT 24 608654550 ps
T804 /workspace/coverage/default/44.clkmgr_smoke.1430530717 Apr 04 03:48:55 PM PDT 24 Apr 04 03:48:57 PM PDT 24 24361445 ps
T805 /workspace/coverage/default/35.clkmgr_idle_intersig_mubi.3892920141 Apr 04 03:48:37 PM PDT 24 Apr 04 03:48:38 PM PDT 24 28311506 ps
T806 /workspace/coverage/default/21.clkmgr_smoke.73645560 Apr 04 03:47:35 PM PDT 24 Apr 04 03:47:36 PM PDT 24 44215791 ps
T807 /workspace/coverage/default/0.clkmgr_idle_intersig_mubi.2127351348 Apr 04 03:46:15 PM PDT 24 Apr 04 03:46:16 PM PDT 24 25080021 ps
T808 /workspace/coverage/default/12.clkmgr_extclk.1494967142 Apr 04 03:46:51 PM PDT 24 Apr 04 03:46:53 PM PDT 24 51295665 ps
T809 /workspace/coverage/default/46.clkmgr_clk_status.3298807189 Apr 04 03:49:02 PM PDT 24 Apr 04 03:49:03 PM PDT 24 23941253 ps
T810 /workspace/coverage/default/36.clkmgr_extclk.3549677904 Apr 04 03:48:35 PM PDT 24 Apr 04 03:48:37 PM PDT 24 21101804 ps
T811 /workspace/coverage/default/25.clkmgr_peri.266433392 Apr 04 03:47:45 PM PDT 24 Apr 04 03:47:46 PM PDT 24 139639278 ps
T812 /workspace/coverage/default/31.clkmgr_frequency.1927872490 Apr 04 03:48:13 PM PDT 24 Apr 04 03:48:29 PM PDT 24 1994965040 ps
T813 /workspace/coverage/default/21.clkmgr_lc_ctrl_intersig_mubi.335530874 Apr 04 03:47:26 PM PDT 24 Apr 04 03:47:28 PM PDT 24 127388721 ps
T814 /workspace/coverage/default/11.clkmgr_idle_intersig_mubi.843008787 Apr 04 03:46:53 PM PDT 24 Apr 04 03:46:54 PM PDT 24 28095784 ps
T815 /workspace/coverage/default/41.clkmgr_frequency.292616609 Apr 04 03:48:41 PM PDT 24 Apr 04 03:48:52 PM PDT 24 1521917127 ps
T816 /workspace/coverage/default/14.clkmgr_clk_status.2889766939 Apr 04 03:47:22 PM PDT 24 Apr 04 03:47:23 PM PDT 24 16250537 ps
T817 /workspace/coverage/default/9.clkmgr_stress_all_with_rand_reset.3879926458 Apr 04 03:46:53 PM PDT 24 Apr 04 03:50:09 PM PDT 24 13798290358 ps
T818 /workspace/coverage/default/47.clkmgr_smoke.2207607907 Apr 04 03:49:01 PM PDT 24 Apr 04 03:49:02 PM PDT 24 38573662 ps
T819 /workspace/coverage/default/37.clkmgr_regwen.370510957 Apr 04 03:48:34 PM PDT 24 Apr 04 03:48:39 PM PDT 24 1001866540 ps
T820 /workspace/coverage/default/6.clkmgr_lc_ctrl_intersig_mubi.2585981530 Apr 04 03:46:29 PM PDT 24 Apr 04 03:46:30 PM PDT 24 100185057 ps
T821 /workspace/coverage/default/24.clkmgr_div_intersig_mubi.1376897397 Apr 04 03:47:33 PM PDT 24 Apr 04 03:47:34 PM PDT 24 21271820 ps
T822 /workspace/coverage/default/13.clkmgr_peri.614635204 Apr 04 03:47:13 PM PDT 24 Apr 04 03:47:14 PM PDT 24 40830533 ps
T823 /workspace/coverage/default/9.clkmgr_lc_clk_byp_req_intersig_mubi.547225465 Apr 04 03:46:54 PM PDT 24 Apr 04 03:46:55 PM PDT 24 60125975 ps
T824 /workspace/coverage/default/45.clkmgr_stress_all_with_rand_reset.3892353830 Apr 04 03:49:06 PM PDT 24 Apr 04 04:04:25 PM PDT 24 85793016394 ps
T825 /workspace/coverage/default/12.clkmgr_div_intersig_mubi.2377439003 Apr 04 03:46:54 PM PDT 24 Apr 04 03:46:55 PM PDT 24 30340648 ps
T826 /workspace/coverage/default/21.clkmgr_lc_clk_byp_req_intersig_mubi.2855550098 Apr 04 03:47:29 PM PDT 24 Apr 04 03:47:30 PM PDT 24 17319328 ps
T827 /workspace/coverage/default/35.clkmgr_lc_ctrl_intersig_mubi.3891756360 Apr 04 03:48:36 PM PDT 24 Apr 04 03:48:37 PM PDT 24 46374228 ps
T828 /workspace/coverage/default/40.clkmgr_stress_all.3839036831 Apr 04 03:48:41 PM PDT 24 Apr 04 03:49:43 PM PDT 24 8469257609 ps
T829 /workspace/coverage/default/0.clkmgr_stress_all.2805719134 Apr 04 03:46:13 PM PDT 24 Apr 04 03:46:25 PM PDT 24 2072022129 ps
T830 /workspace/coverage/default/22.clkmgr_idle_intersig_mubi.3248050040 Apr 04 03:47:36 PM PDT 24 Apr 04 03:47:37 PM PDT 24 30411015 ps
T831 /workspace/coverage/default/10.clkmgr_trans.2490813350 Apr 04 03:46:50 PM PDT 24 Apr 04 03:46:51 PM PDT 24 33998681 ps
T832 /workspace/coverage/default/20.clkmgr_stress_all_with_rand_reset.1300928764 Apr 04 03:47:27 PM PDT 24 Apr 04 03:52:58 PM PDT 24 17668553872 ps
T833 /workspace/coverage/default/44.clkmgr_stress_all_with_rand_reset.625365382 Apr 04 03:49:09 PM PDT 24 Apr 04 03:53:17 PM PDT 24 17957507226 ps
T834 /workspace/coverage/default/38.clkmgr_div_intersig_mubi.2320329248 Apr 04 03:48:38 PM PDT 24 Apr 04 03:48:39 PM PDT 24 14784878 ps
T835 /workspace/coverage/default/47.clkmgr_lc_clk_byp_req_intersig_mubi.3304146960 Apr 04 03:49:16 PM PDT 24 Apr 04 03:49:17 PM PDT 24 15297834 ps
T836 /workspace/coverage/default/43.clkmgr_div_intersig_mubi.88712778 Apr 04 03:48:46 PM PDT 24 Apr 04 03:48:47 PM PDT 24 28046771 ps
T837 /workspace/coverage/default/1.clkmgr_clk_handshake_intersig_mubi.2124869364 Apr 04 03:46:13 PM PDT 24 Apr 04 03:46:14 PM PDT 24 24150222 ps
T838 /workspace/coverage/default/16.clkmgr_clk_handshake_intersig_mubi.2244750425 Apr 04 03:47:18 PM PDT 24 Apr 04 03:47:19 PM PDT 24 28549486 ps
T839 /workspace/coverage/default/16.clkmgr_lc_ctrl_intersig_mubi.1028755852 Apr 04 03:47:20 PM PDT 24 Apr 04 03:47:22 PM PDT 24 32519201 ps
T840 /workspace/coverage/default/14.clkmgr_stress_all_with_rand_reset.1123315245 Apr 04 03:47:18 PM PDT 24 Apr 04 03:54:22 PM PDT 24 72459205536 ps
T841 /workspace/coverage/default/7.clkmgr_div_intersig_mubi.3405511100 Apr 04 03:46:39 PM PDT 24 Apr 04 03:46:40 PM PDT 24 79554592 ps
T842 /workspace/coverage/default/11.clkmgr_clk_handshake_intersig_mubi.786594289 Apr 04 03:46:53 PM PDT 24 Apr 04 03:46:54 PM PDT 24 17161968 ps
T843 /workspace/coverage/default/45.clkmgr_peri.4216598169 Apr 04 03:49:03 PM PDT 24 Apr 04 03:49:05 PM PDT 24 32504609 ps
T844 /workspace/coverage/default/23.clkmgr_div_intersig_mubi.1853784087 Apr 04 03:47:33 PM PDT 24 Apr 04 03:47:34 PM PDT 24 20593707 ps
T845 /workspace/coverage/default/22.clkmgr_clk_status.994657475 Apr 04 03:47:30 PM PDT 24 Apr 04 03:47:31 PM PDT 24 15491786 ps
T846 /workspace/coverage/default/47.clkmgr_frequency.2935797915 Apr 04 03:49:02 PM PDT 24 Apr 04 03:49:15 PM PDT 24 1640341953 ps
T847 /workspace/coverage/default/34.clkmgr_extclk.1441910608 Apr 04 03:48:31 PM PDT 24 Apr 04 03:48:32 PM PDT 24 22944910 ps
T848 /workspace/coverage/default/4.clkmgr_alert_test.52849945 Apr 04 03:46:31 PM PDT 24 Apr 04 03:46:32 PM PDT 24 27315395 ps
T849 /workspace/coverage/default/28.clkmgr_lc_clk_byp_req_intersig_mubi.2479530218 Apr 04 03:47:57 PM PDT 24 Apr 04 03:47:59 PM PDT 24 253027043 ps
T850 /workspace/coverage/default/34.clkmgr_lc_clk_byp_req_intersig_mubi.1621836075 Apr 04 03:48:38 PM PDT 24 Apr 04 03:48:39 PM PDT 24 23853796 ps
T851 /workspace/coverage/default/45.clkmgr_frequency_timeout.2959149658 Apr 04 03:49:04 PM PDT 24 Apr 04 03:49:13 PM PDT 24 2195285205 ps
T852 /workspace/coverage/default/23.clkmgr_smoke.3661822242 Apr 04 03:47:34 PM PDT 24 Apr 04 03:47:35 PM PDT 24 43408917 ps
T124 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.3478329751 Apr 04 02:38:33 PM PDT 24 Apr 04 02:38:35 PM PDT 24 35419039 ps
T93 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.3493499772 Apr 04 02:38:58 PM PDT 24 Apr 04 02:38:59 PM PDT 24 18302501 ps
T125 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.3999758330 Apr 04 02:38:43 PM PDT 24 Apr 04 02:38:54 PM PDT 24 2099807398 ps
T118 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.1692933455 Apr 04 02:38:54 PM PDT 24 Apr 04 02:38:59 PM PDT 24 469711109 ps
T65 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.3018377706 Apr 04 02:38:58 PM PDT 24 Apr 04 02:39:00 PM PDT 24 164023619 ps
T853 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.3021000381 Apr 04 02:38:31 PM PDT 24 Apr 04 02:38:33 PM PDT 24 61340857 ps
T66 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.3106797652 Apr 04 02:38:36 PM PDT 24 Apr 04 02:38:39 PM PDT 24 159714974 ps
T854 /workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.1318031174 Apr 04 02:39:05 PM PDT 24 Apr 04 02:39:06 PM PDT 24 15918498 ps
T119 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.1328726794 Apr 04 02:38:54 PM PDT 24 Apr 04 02:38:57 PM PDT 24 149378053 ps
T94 /workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.2765367325 Apr 04 02:38:58 PM PDT 24 Apr 04 02:38:59 PM PDT 24 40051321 ps
T67 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.3570068326 Apr 04 02:38:29 PM PDT 24 Apr 04 02:38:32 PM PDT 24 156119166 ps
T855 /workspace/coverage/cover_reg_top/11.clkmgr_intr_test.1954290277 Apr 04 02:38:54 PM PDT 24 Apr 04 02:38:55 PM PDT 24 20419762 ps
T95 /workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.2952100528 Apr 04 02:39:05 PM PDT 24 Apr 04 02:39:06 PM PDT 24 52517675 ps
T856 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.2728537187 Apr 04 02:38:44 PM PDT 24 Apr 04 02:38:45 PM PDT 24 13092424 ps
T857 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.1475011184 Apr 04 02:38:54 PM PDT 24 Apr 04 02:38:56 PM PDT 24 119760661 ps
T858 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.1661192307 Apr 04 02:38:54 PM PDT 24 Apr 04 02:38:57 PM PDT 24 115370029 ps
T859 /workspace/coverage/cover_reg_top/33.clkmgr_intr_test.2612172426 Apr 04 02:39:07 PM PDT 24 Apr 04 02:39:08 PM PDT 24 38200614 ps
T69 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.410670083 Apr 04 02:38:50 PM PDT 24 Apr 04 02:38:53 PM PDT 24 236824055 ps
T860 /workspace/coverage/cover_reg_top/37.clkmgr_intr_test.1068798286 Apr 04 02:39:04 PM PDT 24 Apr 04 02:39:05 PM PDT 24 20754573 ps
T68 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.4054528108 Apr 04 02:39:05 PM PDT 24 Apr 04 02:39:07 PM PDT 24 95840335 ps
T861 /workspace/coverage/cover_reg_top/9.clkmgr_intr_test.1599053515 Apr 04 02:38:42 PM PDT 24 Apr 04 02:38:44 PM PDT 24 17597333 ps
T96 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.3395740861 Apr 04 02:38:33 PM PDT 24 Apr 04 02:38:36 PM PDT 24 531995457 ps
T862 /workspace/coverage/cover_reg_top/44.clkmgr_intr_test.2004348356 Apr 04 02:39:11 PM PDT 24 Apr 04 02:39:12 PM PDT 24 13794746 ps
T863 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.1461918910 Apr 04 02:39:09 PM PDT 24 Apr 04 02:39:10 PM PDT 24 15490687 ps
T97 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.281851486 Apr 04 02:38:51 PM PDT 24 Apr 04 02:38:52 PM PDT 24 30658743 ps
T72 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.3105504838 Apr 04 02:39:05 PM PDT 24 Apr 04 02:39:06 PM PDT 24 153534780 ps
T120 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.1550856502 Apr 04 02:38:37 PM PDT 24 Apr 04 02:38:40 PM PDT 24 140794819 ps
T864 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.3244984270 Apr 04 02:38:53 PM PDT 24 Apr 04 02:38:53 PM PDT 24 11917170 ps
T865 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.2444858637 Apr 04 02:38:49 PM PDT 24 Apr 04 02:38:50 PM PDT 24 21866909 ps
T866 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.2043884551 Apr 04 02:39:07 PM PDT 24 Apr 04 02:39:08 PM PDT 24 13875297 ps
T867 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.3925900419 Apr 04 02:39:11 PM PDT 24 Apr 04 02:39:12 PM PDT 24 55958097 ps
T868 /workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.595083778 Apr 04 02:38:53 PM PDT 24 Apr 04 02:38:54 PM PDT 24 41961666 ps
T869 /workspace/coverage/cover_reg_top/40.clkmgr_intr_test.1493240861 Apr 04 02:39:01 PM PDT 24 Apr 04 02:39:02 PM PDT 24 33942586 ps
T130 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.1167474484 Apr 04 02:38:54 PM PDT 24 Apr 04 02:38:57 PM PDT 24 180604495 ps
T870 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.4023400175 Apr 04 02:39:01 PM PDT 24 Apr 04 02:39:02 PM PDT 24 101540225 ps
T871 /workspace/coverage/cover_reg_top/14.clkmgr_intr_test.3265581634 Apr 04 02:38:58 PM PDT 24 Apr 04 02:38:59 PM PDT 24 13041674 ps
T872 /workspace/coverage/cover_reg_top/23.clkmgr_intr_test.3953851305 Apr 04 02:39:03 PM PDT 24 Apr 04 02:39:04 PM PDT 24 11776880 ps
T98 /workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.2680915461 Apr 04 02:38:47 PM PDT 24 Apr 04 02:38:49 PM PDT 24 144770965 ps
T873 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.79239577 Apr 04 02:39:02 PM PDT 24 Apr 04 02:39:03 PM PDT 24 19382084 ps
T99 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.1207741958 Apr 04 02:38:56 PM PDT 24 Apr 04 02:38:57 PM PDT 24 31148107 ps
T874 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.2405809112 Apr 04 02:38:37 PM PDT 24 Apr 04 02:38:38 PM PDT 24 32162408 ps
T71 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.3583258675 Apr 04 02:38:47 PM PDT 24 Apr 04 02:38:50 PM PDT 24 89703249 ps
T875 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.1020241356 Apr 04 02:38:55 PM PDT 24 Apr 04 02:38:56 PM PDT 24 26059453 ps
T876 /workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1301915717 Apr 04 02:38:41 PM PDT 24 Apr 04 02:38:42 PM PDT 24 20726450 ps
T877 /workspace/coverage/cover_reg_top/43.clkmgr_intr_test.4060873975 Apr 04 02:39:02 PM PDT 24 Apr 04 02:39:03 PM PDT 24 10908519 ps
T878 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.4021075142 Apr 04 02:38:41 PM PDT 24 Apr 04 02:38:42 PM PDT 24 38083391 ps
T70 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.3845272994 Apr 04 02:38:42 PM PDT 24 Apr 04 02:38:43 PM PDT 24 81393213 ps
T879 /workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.547613024 Apr 04 02:39:07 PM PDT 24 Apr 04 02:39:10 PM PDT 24 49161781 ps
T74 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.558081753 Apr 04 02:38:50 PM PDT 24 Apr 04 02:38:53 PM PDT 24 99689586 ps
T880 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.391061329 Apr 04 02:38:42 PM PDT 24 Apr 04 02:38:43 PM PDT 24 60983080 ps
T881 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.569204867 Apr 04 02:38:50 PM PDT 24 Apr 04 02:38:53 PM PDT 24 355148329 ps
T882 /workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.1081371209 Apr 04 02:38:37 PM PDT 24 Apr 04 02:38:40 PM PDT 24 104179165 ps
T141 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.4228041427 Apr 04 02:38:38 PM PDT 24 Apr 04 02:38:41 PM PDT 24 214272895 ps
T883 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.724405840 Apr 04 02:38:51 PM PDT 24 Apr 04 02:38:52 PM PDT 24 35788317 ps
T884 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.2001508273 Apr 04 02:38:50 PM PDT 24 Apr 04 02:38:52 PM PDT 24 81249298 ps
T885 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.1036958140 Apr 04 02:39:00 PM PDT 24 Apr 04 02:39:04 PM PDT 24 244951274 ps
T886 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.2853444713 Apr 04 02:38:36 PM PDT 24 Apr 04 02:38:37 PM PDT 24 20689535 ps
T887 /workspace/coverage/cover_reg_top/19.clkmgr_intr_test.2308475343 Apr 04 02:39:01 PM PDT 24 Apr 04 02:39:02 PM PDT 24 53767070 ps
T888 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.2971738582 Apr 04 02:38:38 PM PDT 24 Apr 04 02:38:46 PM PDT 24 835648290 ps
T121 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.2846133075 Apr 04 02:38:53 PM PDT 24 Apr 04 02:38:55 PM PDT 24 220883671 ps
T889 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.778456479 Apr 04 02:38:58 PM PDT 24 Apr 04 02:38:59 PM PDT 24 55317972 ps
T191 /workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.264173282 Apr 04 02:38:55 PM PDT 24 Apr 04 02:38:58 PM PDT 24 244844523 ps
T73 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.3765619407 Apr 04 02:38:42 PM PDT 24 Apr 04 02:38:45 PM PDT 24 411367412 ps
T890 /workspace/coverage/cover_reg_top/39.clkmgr_intr_test.2642852527 Apr 04 02:39:03 PM PDT 24 Apr 04 02:39:04 PM PDT 24 14316446 ps
T75 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.4291567578 Apr 04 02:38:54 PM PDT 24 Apr 04 02:38:57 PM PDT 24 117778588 ps
T127 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.3970645769 Apr 04 02:38:30 PM PDT 24 Apr 04 02:38:34 PM PDT 24 282780467 ps
T891 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.2676671323 Apr 04 02:38:38 PM PDT 24 Apr 04 02:38:40 PM PDT 24 266059596 ps
T892 /workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.217239513 Apr 04 02:38:39 PM PDT 24 Apr 04 02:38:42 PM PDT 24 406161616 ps
T893 /workspace/coverage/cover_reg_top/8.clkmgr_intr_test.2792415389 Apr 04 02:38:38 PM PDT 24 Apr 04 02:38:39 PM PDT 24 13865231 ps
T129 /workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.2831504318 Apr 04 02:38:49 PM PDT 24 Apr 04 02:38:52 PM PDT 24 467469542 ps
T142 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.1717551452 Apr 04 02:38:44 PM PDT 24 Apr 04 02:38:46 PM PDT 24 124604249 ps
T894 /workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.1594216353 Apr 04 02:38:48 PM PDT 24 Apr 04 02:38:49 PM PDT 24 94928559 ps
T895 /workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.3773662602 Apr 04 02:38:58 PM PDT 24 Apr 04 02:39:00 PM PDT 24 120436769 ps
T896 /workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.585980574 Apr 04 02:38:53 PM PDT 24 Apr 04 02:38:54 PM PDT 24 222480412 ps
T897 /workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.1184750011 Apr 04 02:38:43 PM PDT 24 Apr 04 02:38:44 PM PDT 24 46878705 ps
T898 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.4113528794 Apr 04 02:39:05 PM PDT 24 Apr 04 02:39:06 PM PDT 24 11401855 ps
T899 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.713008561 Apr 04 02:38:40 PM PDT 24 Apr 04 02:38:40 PM PDT 24 27794372 ps
T900 /workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.2007362148 Apr 04 02:38:50 PM PDT 24 Apr 04 02:38:52 PM PDT 24 104022658 ps
T154 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.3405201675 Apr 04 02:38:50 PM PDT 24 Apr 04 02:38:52 PM PDT 24 317697097 ps
T901 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.381623222 Apr 04 02:38:57 PM PDT 24 Apr 04 02:38:59 PM PDT 24 113495261 ps
T143 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.841421287 Apr 04 02:38:45 PM PDT 24 Apr 04 02:38:46 PM PDT 24 130104978 ps
T902 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.3448227829 Apr 04 02:38:41 PM PDT 24 Apr 04 02:38:43 PM PDT 24 68672643 ps
T903 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.918609156 Apr 04 02:38:51 PM PDT 24 Apr 04 02:38:53 PM PDT 24 126313224 ps
T904 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.2981075786 Apr 04 02:38:44 PM PDT 24 Apr 04 02:38:46 PM PDT 24 69293977 ps
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T939 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.4165971018 Apr 04 02:38:42 PM PDT 24 Apr 04 02:38:43 PM PDT 24 70605477 ps
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T965 /workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.1618040442 Apr 04 02:39:05 PM PDT 24 Apr 04 02:39:06 PM PDT 24 17917261 ps
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