Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_edn_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	802308	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

6483637

1

T19

61

T20

5

T21

6

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1930564	1			T19	11		T20	42		T21	34
values[0x0]	2489329	1			T19	27		T20	3		T21	4
values[0x1]	2866052	1			T19	39		T20	4		T21	6

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	406553	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

6879392

1

T19

68

T20

21

T21

19

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	42935	1			T1	856		T2	856		T3	856
valid_sources[0x01]	28085	1			T28	2		T1	556		T2	556
valid_sources[0x02]	44940	1			T1	897		T2	897		T3	897
valid_sources[0x03]	38645	1			T1	766		T2	766		T3	766
valid_sources[0x04]	19260	1			T1	383		T2	383		T3	383
valid_sources[0x05]	13200	1			T1	261		T2	261		T3	261
valid_sources[0x06]	29700	1			T19	77		T1	437		T2	437
valid_sources[0x07]	49290	1			T1	979		T2	979		T3	979
valid_sources[0x08]	24525	1			T1	487		T2	487		T3	487
valid_sources[0x09]	4085	1			T1	77		T2	77		T3	77
valid_sources[0x0a]	19195	1			T1	382		T2	382		T3	382
valid_sources[0x0b]	14610	1			T1	292		T2	292		T3	292
valid_sources[0x0c]	26340	1			T1	525		T2	525		T3	525
valid_sources[0x0d]	32755	1			T1	654		T2	654		T3	654
valid_sources[0x0e]	41240	1			T1	822		T2	822		T3	822
valid_sources[0x0f]	14625	1			T1	290		T2	290		T3	290
valid_sources[0x10]	31915	1			T1	635		T2	635		T3	635
valid_sources[0x11]	23495	1			T1	461		T2	461		T3	461
valid_sources[0x12]	28090	1			T1	560		T2	560		T3	560
valid_sources[0x13]	10635	1			T1	211		T2	211		T3	211
valid_sources[0x14]	40700	1			T1	809		T2	809		T3	809
valid_sources[0x15]	15820	1			T1	309		T2	309		T3	309
valid_sources[0x16]	34940	1			T1	695		T2	695		T3	695
valid_sources[0x17]	28475	1			T1	563		T2	563		T3	563
valid_sources[0x18]	43280	1			T1	864		T2	864		T3	864
valid_sources[0x19]	40915	1			T1	817		T2	817		T3	817
valid_sources[0x1a]	12515	1			T1	246		T2	246		T3	246
valid_sources[0x1b]	18325	1			T1	366		T2	366		T3	366
valid_sources[0x1c]	44790	1			T1	893		T2	893		T3	893
valid_sources[0x1d]	35670	1			T1	711		T2	711		T3	711
valid_sources[0x1e]	37740	1			T1	751		T2	751		T3	751
valid_sources[0x1f]	21555	1			T1	429		T2	429		T3	429
valid_sources[0x20]	22155	1			T1	441		T2	441		T3	441
valid_sources[0x21]	37770	1			T1	754		T2	754		T3	754
valid_sources[0x22]	27580	1			T1	549		T2	549		T3	549
valid_sources[0x23]	49975	1			T1	992		T2	992		T3	992
valid_sources[0x24]	23615	1			T1	470		T2	470		T3	470
valid_sources[0x25]	12530	1			T1	248		T2	248		T3	248
valid_sources[0x26]	57830	1			T1	1155		T2	1155		T3	1155
valid_sources[0x27]	12875	1			T1	253		T2	253		T3	253
valid_sources[0x28]	39760	1			T1	792		T2	792		T3	792
valid_sources[0x29]	16925	1			T1	333		T2	333		T3	333
valid_sources[0x2a]	28920	1			T1	575		T2	575		T3	575
valid_sources[0x2b]	24525	1			T1	488		T2	488		T3	488
valid_sources[0x2c]	28670	1			T1	567		T2	567		T3	567
valid_sources[0x2d]	37590	1			T1	748		T2	748		T3	748
valid_sources[0x2e]	49495	1			T1	988		T2	988		T3	988
valid_sources[0x2f]	29840	1			T28	1		T1	590		T2	590
valid_sources[0x30]	26670	1			T1	526		T2	526		T3	526
valid_sources[0x31]	39375	1			T1	779		T2	779		T3	779
valid_sources[0x32]	38495	1			T1	766		T2	766		T3	766
valid_sources[0x33]	23050	1			T1	454		T2	454		T3	454
valid_sources[0x34]	54720	1			T1	1091		T2	1091		T3	1091
valid_sources[0x35]	17720	1			T1	354		T2	354		T3	354
valid_sources[0x36]	22925	1			T1	456		T2	456		T3	456
valid_sources[0x37]	22680	1			T1	451		T2	451		T3	451
valid_sources[0x38]	19745	1			T1	389		T2	389		T3	389
valid_sources[0x39]	15825	1			T1	315		T2	315		T3	315
valid_sources[0x3a]	30035	1			T1	598		T2	598		T3	598
valid_sources[0x3b]	26140	1			T1	517		T2	517		T3	517
valid_sources[0x3c]	38395	1			T1	765		T2	765		T3	765
valid_sources[0x3d]	17350	1			T1	340		T2	340		T3	340
valid_sources[0x3e]	60830	1			T1	1214		T2	1214		T3	1214
valid_sources[0x3f]	14545	1			T1	286		T2	286		T3	286
valid_sources[0x40]	29135	1			T1	573		T2	573		T3	573
valid_sources[0x41]	29805	1			T1	594		T2	594		T3	594
valid_sources[0x42]	25775	1			T1	510		T2	510		T3	510
valid_sources[0x43]	35255	1			T1	703		T2	703		T3	703
valid_sources[0x44]	49095	1			T1	977		T2	977		T3	977
valid_sources[0x45]	64115	1			T1	1279		T2	1279		T3	1279
valid_sources[0x46]	32425	1			T1	645		T2	645		T3	645
valid_sources[0x47]	23660	1			T1	470		T2	470		T3	470
valid_sources[0x48]	31145	1			T1	622		T2	622		T3	622
valid_sources[0x49]	16455	1			T1	325		T2	325		T3	325
valid_sources[0x4a]	35860	1			T1	715		T2	715		T3	715
valid_sources[0x4b]	32310	1			T1	643		T2	643		T3	643
valid_sources[0x4c]	22365	1			T1	440		T2	440		T3	440
valid_sources[0x4d]	3275	1			T1	65		T2	65		T3	65
valid_sources[0x4e]	22095	1			T1	436		T2	436		T3	436
valid_sources[0x4f]	39055	1			T1	778		T2	778		T3	778
valid_sources[0x50]	41415	1			T28	1		T1	820		T2	820
valid_sources[0x51]	17555	1			T1	347		T2	347		T3	347
valid_sources[0x52]	12970	1			T1	255		T2	255		T3	255
valid_sources[0x53]	48675	1			T1	970		T2	970		T3	970
valid_sources[0x54]	32290	1			T28	2		T1	639		T2	639
valid_sources[0x55]	34375	1			T1	682		T2	682		T3	682
valid_sources[0x56]	12555	1			T1	248		T2	248		T3	248
valid_sources[0x57]	15840	1			T1	310		T2	310		T3	310
valid_sources[0x58]	47775	1			T1	952		T2	952		T3	952
valid_sources[0x59]	43360	1			T1	862		T2	862		T3	862
valid_sources[0x5a]	60930	1			T1	1215		T2	1215		T3	1215
valid_sources[0x5b]	18510	1			T1	369		T2	369		T3	369
valid_sources[0x5c]	35320	1			T1	703		T2	703		T3	703
valid_sources[0x5d]	19260	1			T1	380		T2	380		T3	380
valid_sources[0x5e]	18560	1			T1	368		T2	368		T3	368
valid_sources[0x5f]	25570	1			T1	506		T2	506		T3	506
valid_sources[0x60]	106720	1			T20	46		T21	44		T1	835
valid_sources[0x61]	23585	1			T1	466		T2	466		T3	466
valid_sources[0x62]	19520	1			T1	390		T2	390		T3	390
valid_sources[0x63]	16760	1			T1	327		T2	327		T3	327
valid_sources[0x64]	25795	1			T1	510		T2	510		T3	510
valid_sources[0x65]	24750	1			T1	495		T2	495		T3	495
valid_sources[0x66]	5195	1			T1	102		T2	102		T3	102
valid_sources[0x67]	18315	1			T1	362		T2	362		T3	362
valid_sources[0x68]	37365	1			T1	743		T2	743		T3	743
valid_sources[0x69]	18410	1			T1	367		T2	367		T3	367
valid_sources[0x6a]	25385	1			T1	506		T2	506		T3	506
valid_sources[0x6b]	33050	1			T1	657		T2	657		T3	657
valid_sources[0x6c]	21225	1			T1	424		T2	424		T3	424
valid_sources[0x6d]	32665	1			T1	651		T2	651		T3	651
valid_sources[0x6e]	12900	1			T28	3		T1	249		T2	249
valid_sources[0x6f]	12685	1			T1	250		T2	250		T3	250
valid_sources[0x70]	21375	1			T1	425		T2	425		T3	425
valid_sources[0x71]	19950	1			T1	397		T2	397		T3	397
valid_sources[0x72]	40285	1			T1	803		T2	803		T3	803
valid_sources[0x73]	36485	1			T1	727		T2	727		T3	727
valid_sources[0x74]	60375	1			T1	1204		T2	1204		T3	1204
valid_sources[0x75]	11800	1			T1	227		T2	227		T3	227
valid_sources[0x76]	18850	1			T1	375		T2	375		T3	375
valid_sources[0x77]	13985	1			T1	277		T2	277		T3	277
valid_sources[0x78]	12970	1			T1	257		T2	257		T3	257
valid_sources[0x79]	30295	1			T1	599		T2	599		T3	599
valid_sources[0x7a]	24470	1			T1	487		T2	487		T3	487
valid_sources[0x7b]	30840	1			T1	615		T2	615		T3	615
valid_sources[0x7c]	44795	1			T1	891		T2	891		T3	891
valid_sources[0x7d]	16615	1			T1	326		T2	326		T3	326
valid_sources[0x7e]	28375	1			T1	564		T2	564		T3	564
valid_sources[0x7f]	28185	1			T1	561		T2	561		T3	561
valid_sources[0x80]	7255	1			T1	138		T2	138		T3	138

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1619245

1

T20

1

T21

2

T1

32055

values[0x0]

all_enables

biggest_size

2436735

1

T19

25

T20

2

T21

1

values[0x1]

all_enables

biggest_size

2427657

1

T19

36

T20

2

T21

3