Unified Coverage Report :: Group :: tb.dut.u_edn_cov_if::edn_sw_cmd_sts_cg

Group : tb.dut.u_edn_cov_if::edn_sw_cmd_sts_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
87.50	87.50	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_edn_cov_0/edn_cov_if.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
edn_sw_cmd_sts_cg	87.50	1	100	1	64	64

---

Group Instance : edn_sw_cmd_sts_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
87.50	1	100	1	64	64

---

Summary for Group Instance edn_sw_cmd_sts_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	8	1	7	87.50

Variables for Group Instance edn_sw_cmd_sts_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_cmd_ack_cg	2	0	2	100.00	100	1	1	0
cp_cmd_rdy_cg	2	0	2	100.00	100	1	1	0
cp_cmd_reg_rdy_cg	2	0	2	100.00	100	1	1	0
cp_cmd_sts_cg	2	1	1	50.00	100	1	1	0

Summary for Variable cp_cmd_ack_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_cmd_ack_cg

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

no_ack

27591

1

T2

1

T3

17

T10

16

ack

21797

1

T2

5

T3

5

T10

2

---

Summary for Variable cp_cmd_rdy_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_cmd_rdy_cg

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

not_ready

26726

1

T3

17

T10

16

T11

16

ready

22662

1

T2

6

T3

5

T10

2

---

Summary for Variable cp_cmd_reg_rdy_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_cmd_reg_rdy_cg

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

not_ready

500

1

T3

1

T10

2

T11

1

ready

48888

1

T2

6

T3

21

T10

16

---

Summary for Variable cp_cmd_sts_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	1	1	50.00

User Defined Bins for cp_cmd_sts_cg

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
error	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

success

49388

1

T2

6

T3

22

T10

18