| SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
| 87.50 | 87.50 | 1 | 100 | 1 | 1 | 64 | 64 |
| NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| edn_error_cg | 87.50 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 8 | 1 | 7 | 87.50 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_error_test | 8 | 1 | 7 | 87.50 | 100 | 1 | 1 | 0 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 8 | 1 | 7 | 87.50 |
| NAME | COUNT | AT LEAST | NUMBER | STATUS |
| auto[EdnFifoReadErrTest] | 0 | 1 | 1 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[EdnSfifoRescmdErrTest] | 37 | 1 | T5 | 9 | T7 | 1 | T13 | 9 | ||||
| auto[EdnSfifoGencmdErrTest] | 38 | 1 | T5 | 7 | T13 | 12 | T14 | 7 | ||||
| auto[EdnAckSmErrTest] | 1270 | 1 | T4 | 1 | T5 | 260 | T6 | 1 | ||||
| auto[EdnMainSmErrTest] | 1270 | 1 | T4 | 1 | T5 | 260 | T6 | 1 | ||||
| auto[EdnCntrErrTest] | 120 | 1 | T4 | 1 | T5 | 20 | T6 | 1 | ||||
| auto[EdnFifoWriteErrTest] | 1 | 1 | T7 | 1 | - | - | - | - | ||||
| auto[EdnFifoStateErrTest] | 74 | 1 | T5 | 16 | T13 | 21 | T14 | 16 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |