30db5a999
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | smoke | entropy_src_smoke | 6.000s | 64.701us | 50 | 50 | 100.00 |
V1 | csr_hw_reset | entropy_src_csr_hw_reset | 4.000s | 31.906us | 5 | 5 | 100.00 |
V1 | csr_rw | entropy_src_csr_rw | 4.000s | 75.455us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | entropy_src_csr_bit_bash | 14.000s | 706.393us | 5 | 5 | 100.00 |
V1 | csr_aliasing | entropy_src_csr_aliasing | 9.000s | 802.281us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | entropy_src_csr_mem_rw_with_rand_reset | 5.000s | 53.554us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | entropy_src_csr_rw | 4.000s | 75.455us | 20 | 20 | 100.00 |
entropy_src_csr_aliasing | 9.000s | 802.281us | 5 | 5 | 100.00 | ||
V1 | TOTAL | 105 | 105 | 100.00 | |||
V2 | firmware | entropy_src_smoke | 6.000s | 64.701us | 50 | 50 | 100.00 |
entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 | ||
entropy_src_fw_ov | 1.933m | 5.020ms | 300 | 300 | 100.00 | ||
V2 | firmware_mode | entropy_src_fw_ov | 1.933m | 5.020ms | 300 | 300 | 100.00 |
V2 | rng_mode | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
V2 | rng_max_rate | entropy_src_rng_max_rate | 10.717m | 10.014ms | 400 | 400 | 100.00 |
V2 | health_checks | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
V2 | conditioning | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
V2 | interrupts | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
V2 | alerts | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
entropy_src_functional_alerts | 5.000s | 98.382us | 50 | 50 | 100.00 | ||
V2 | stress_all | entropy_src_stress_all | 9.000s | 554.413us | 50 | 50 | 100.00 |
V2 | functional_errors | entropy_src_functional_errors | 7.000s | 130.506us | 1000 | 1000 | 100.00 |
V2 | intr_test | entropy_src_intr_test | 4.000s | 27.322us | 50 | 50 | 100.00 |
V2 | alert_test | entropy_src_alert_test | 4.000s | 20.819us | 50 | 50 | 100.00 |
V2 | tl_d_oob_addr_access | entropy_src_tl_errors | 7.000s | 152.614us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | entropy_src_tl_errors | 7.000s | 152.614us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | entropy_src_csr_hw_reset | 4.000s | 31.906us | 5 | 5 | 100.00 |
entropy_src_csr_rw | 4.000s | 75.455us | 20 | 20 | 100.00 | ||
entropy_src_csr_aliasing | 9.000s | 802.281us | 5 | 5 | 100.00 | ||
entropy_src_same_csr_outstanding | 5.000s | 364.599us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | entropy_src_csr_hw_reset | 4.000s | 31.906us | 5 | 5 | 100.00 |
entropy_src_csr_rw | 4.000s | 75.455us | 20 | 20 | 100.00 | ||
entropy_src_csr_aliasing | 9.000s | 802.281us | 5 | 5 | 100.00 | ||
entropy_src_same_csr_outstanding | 5.000s | 364.599us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 2239 | 2240 | 99.96 | |||
V2S | tl_intg_err | entropy_src_sec_cm | 4.000s | 89.913us | 5 | 5 | 100.00 |
entropy_src_tl_intg_err | 7.000s | 339.195us | 20 | 20 | 100.00 | ||
V2S | sec_cm_config_regwen | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
entropy_src_cfg_regwen | 4.000s | 61.032us | 50 | 50 | 100.00 | ||
V2S | sec_cm_config_mubi | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
V2S | sec_cm_config_redun | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
V2S | sec_cm_intersig_mubi | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
entropy_src_fw_ov | 1.933m | 5.020ms | 300 | 300 | 100.00 | ||
V2S | sec_cm_main_sm_fsm_sparse | entropy_src_functional_errors | 7.000s | 130.506us | 1000 | 1000 | 100.00 |
entropy_src_sec_cm | 4.000s | 89.913us | 5 | 5 | 100.00 | ||
V2S | sec_cm_ack_sm_fsm_sparse | entropy_src_functional_errors | 7.000s | 130.506us | 1000 | 1000 | 100.00 |
entropy_src_sec_cm | 4.000s | 89.913us | 5 | 5 | 100.00 | ||
V2S | sec_cm_rng_bkgn_chk | entropy_src_rng | 10.200m | 10.015ms | 299 | 300 | 99.67 |
V2S | sec_cm_ctr_redun | entropy_src_functional_errors | 7.000s | 130.506us | 1000 | 1000 | 100.00 |
entropy_src_sec_cm | 4.000s | 89.913us | 5 | 5 | 100.00 | ||
V2S | sec_cm_ctr_local_esc | entropy_src_functional_errors | 7.000s | 130.506us | 1000 | 1000 | 100.00 |
V2S | sec_cm_esfinal_rdata_bus_consistency | entropy_src_functional_alerts | 5.000s | 98.382us | 50 | 50 | 100.00 |
V2S | sec_cm_tile_link_bus_integrity | entropy_src_tl_intg_err | 7.000s | 339.195us | 20 | 20 | 100.00 |
V2S | TOTAL | 75 | 75 | 100.00 | |||
V3 | external_health_tests | entropy_src_rng_with_xht_rsps | 9.533m | 10.015ms | 49 | 50 | 98.00 |
V3 | stress_all_with_rand_reset | entropy_src_stress_all_with_rand_reset | 0 | 0 | -- | ||
V3 | TOTAL | 49 | 50 | 98.00 | |||
TOTAL | 2468 | 2470 | 99.92 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 6 | 6 | 6 | 100.00 |
V2 | 10 | 10 | 9 | 90.00 |
V2S | 3 | 3 | 3 | 100.00 |
V3 | 2 | 1 | 0 | 0.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
98.44 | 99.04 | 97.60 | 99.68 | 96.93 | 99.37 | 87.39 | 91.61 | 96.74 |
Exit reason: Error: User command failed UVM_FATAL (entropy_src_base_vseq.sv:426) [entropy_src_rng_vseq] Timeout encountered while reading TlSrcObserveFIFO
has 1 failures:
27.entropy_src_rng_with_xht_rsps.1972224132
Line 894, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/27.entropy_src_rng_with_xht_rsps/latest/run.log
UVM_FATAL @ 6036382720 ps: (entropy_src_base_vseq.sv:426) [uvm_test_top.env.virtual_sequencer.entropy_src_rng_vseq] Timeout encountered while reading TlSrcObserveFIFO
UVM_INFO @ 6036382720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_ERROR (cip_base_scoreboard.sv:282) scoreboard [scoreboard] alert recov_alert did not trigger max_delay:*
has 1 failures:
189.entropy_src_rng.453577197
Line 1609, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/189.entropy_src_rng/latest/run.log
UVM_ERROR @ 3668530740 ps: (cip_base_scoreboard.sv:282) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_alert did not trigger max_delay:5
UVM_INFO @ 3668530740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---