1522c8119
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | smoke | entropy_src_smoke | 7.000s | 41.933us | 50 | 50 | 100.00 |
V1 | csr_hw_reset | entropy_src_csr_hw_reset | 7.000s | 163.973us | 5 | 5 | 100.00 |
V1 | csr_rw | entropy_src_csr_rw | 8.000s | 42.129us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | entropy_src_csr_bit_bash | 18.000s | 1.608ms | 5 | 5 | 100.00 |
V1 | csr_aliasing | entropy_src_csr_aliasing | 11.000s | 1.078ms | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | entropy_src_csr_mem_rw_with_rand_reset | 7.000s | 88.120us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | entropy_src_csr_rw | 8.000s | 42.129us | 20 | 20 | 100.00 |
entropy_src_csr_aliasing | 11.000s | 1.078ms | 5 | 5 | 100.00 | ||
V1 | TOTAL | 105 | 105 | 100.00 | |||
V2 | firmware | entropy_src_smoke | 7.000s | 41.933us | 50 | 50 | 100.00 |
entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 | ||
entropy_src_fw_ov | 2.050m | 5.040ms | 300 | 300 | 100.00 | ||
V2 | firmware_mode | entropy_src_fw_ov | 2.050m | 5.040ms | 300 | 300 | 100.00 |
V2 | rng_mode | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
V2 | rng_max_rate | entropy_src_rng_max_rate | 11.633m | 10.014ms | 400 | 400 | 100.00 |
V2 | health_checks | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
V2 | conditioning | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
V2 | interrupts | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
V2 | alerts | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
entropy_src_functional_alerts | 9.000s | 441.063us | 50 | 50 | 100.00 | ||
V2 | stress_all | entropy_src_stress_all | 12.000s | 200.848us | 50 | 50 | 100.00 |
V2 | functional_errors | entropy_src_functional_errors | 16.000s | 52.076us | 1000 | 1000 | 100.00 |
V2 | intr_test | entropy_src_intr_test | 6.000s | 19.378us | 50 | 50 | 100.00 |
V2 | alert_test | entropy_src_alert_test | 7.000s | 18.036us | 50 | 50 | 100.00 |
V2 | tl_d_oob_addr_access | entropy_src_tl_errors | 11.000s | 181.297us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | entropy_src_tl_errors | 11.000s | 181.297us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | entropy_src_csr_hw_reset | 7.000s | 163.973us | 5 | 5 | 100.00 |
entropy_src_csr_rw | 8.000s | 42.129us | 20 | 20 | 100.00 | ||
entropy_src_csr_aliasing | 11.000s | 1.078ms | 5 | 5 | 100.00 | ||
entropy_src_same_csr_outstanding | 8.000s | 172.670us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | entropy_src_csr_hw_reset | 7.000s | 163.973us | 5 | 5 | 100.00 |
entropy_src_csr_rw | 8.000s | 42.129us | 20 | 20 | 100.00 | ||
entropy_src_csr_aliasing | 11.000s | 1.078ms | 5 | 5 | 100.00 | ||
entropy_src_same_csr_outstanding | 8.000s | 172.670us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 2237 | 2240 | 99.87 | |||
V2S | tl_intg_err | entropy_src_sec_cm | 5.000s | 326.456us | 5 | 5 | 100.00 |
entropy_src_tl_intg_err | 12.000s | 223.418us | 20 | 20 | 100.00 | ||
V2S | sec_cm_config_regwen | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
entropy_src_cfg_regwen | 7.000s | 41.563us | 50 | 50 | 100.00 | ||
V2S | sec_cm_config_mubi | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
V2S | sec_cm_config_redun | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
V2S | sec_cm_intersig_mubi | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
entropy_src_fw_ov | 2.050m | 5.040ms | 300 | 300 | 100.00 | ||
V2S | sec_cm_main_sm_fsm_sparse | entropy_src_functional_errors | 16.000s | 52.076us | 1000 | 1000 | 100.00 |
entropy_src_sec_cm | 5.000s | 326.456us | 5 | 5 | 100.00 | ||
V2S | sec_cm_ack_sm_fsm_sparse | entropy_src_functional_errors | 16.000s | 52.076us | 1000 | 1000 | 100.00 |
entropy_src_sec_cm | 5.000s | 326.456us | 5 | 5 | 100.00 | ||
V2S | sec_cm_rng_bkgn_chk | entropy_src_rng | 11.617m | 10.013ms | 297 | 300 | 99.00 |
V2S | sec_cm_ctr_redun | entropy_src_functional_errors | 16.000s | 52.076us | 1000 | 1000 | 100.00 |
entropy_src_sec_cm | 5.000s | 326.456us | 5 | 5 | 100.00 | ||
V2S | sec_cm_ctr_local_esc | entropy_src_functional_errors | 16.000s | 52.076us | 1000 | 1000 | 100.00 |
V2S | sec_cm_esfinal_rdata_bus_consistency | entropy_src_functional_alerts | 9.000s | 441.063us | 50 | 50 | 100.00 |
V2S | sec_cm_tile_link_bus_integrity | entropy_src_tl_intg_err | 12.000s | 223.418us | 20 | 20 | 100.00 |
V2S | TOTAL | 75 | 75 | 100.00 | |||
V3 | external_health_tests | entropy_src_rng_with_xht_rsps | 11.467m | 10.015ms | 50 | 50 | 100.00 |
V3 | stress_all_with_rand_reset | entropy_src_stress_all_with_rand_reset | 0 | 0 | -- | ||
V3 | TOTAL | 50 | 50 | 100.00 | |||
TOTAL | 2467 | 2470 | 99.88 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 6 | 6 | 6 | 100.00 |
V2 | 10 | 10 | 9 | 90.00 |
V2S | 3 | 3 | 3 | 100.00 |
V3 | 2 | 1 | 1 | 50.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
98.41 | 98.86 | 97.16 | 99.70 | 96.31 | 99.40 | 98.00 | 91.61 | 97.03 |
UVM_ERROR (entropy_src_scoreboard.sv:1836) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: entropy_src_reg_block.alert_summary_fail_counts
has 2 failures:
62.entropy_src_rng.3286680370
Line 1713, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/62.entropy_src_rng/latest/run.log
UVM_ERROR @ 7989482053 ps: (entropy_src_scoreboard.sv:1836) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 7 [0x7]) reg name: entropy_src_reg_block.alert_summary_fail_counts
UVM_INFO @ 7989482053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
80.entropy_src_rng.1557687745
Line 1465, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/80.entropy_src_rng/latest/run.log
UVM_ERROR @ 3157200973 ps: (entropy_src_scoreboard.sv:1836) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: entropy_src_reg_block.alert_summary_fail_counts
UVM_INFO @ 3157200973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_scoreboard.sv:1836) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: entropy_src_reg_block.recov_alert_sts
has 1 failures:
15.entropy_src_rng.1147153656
Line 782, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/15.entropy_src_rng/latest/run.log
UVM_ERROR @ 3998436854 ps: (entropy_src_scoreboard.sv:1836) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4096 [0x1000] vs 0 [0x0]) reg name: entropy_src_reg_block.recov_alert_sts
UVM_INFO @ 3998436854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---