ENTROPY_SRC Simulation Results

Tuesday July 16 2024 23:15:02 UTC

GitHub Revision: aad711e1bc

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 38297581588405771015102977205739484163575733999253050480227719508149669635625

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 4.000s 98.551us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 5.000s 93.327us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 4.000s 280.699us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 13.000s 514.997us 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 8.000s 318.914us 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 4.000s 90.479us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 4.000s 280.699us 20 20 100.00
entropy_src_csr_aliasing 8.000s 318.914us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 4.000s 98.551us 50 50 100.00
entropy_src_rng 5.517m 10.099ms 300 300 100.00
entropy_src_fw_ov 2.750m 5.050ms 280 300 93.33
V2 firmware_mode entropy_src_fw_ov 2.750m 5.050ms 280 300 93.33
V2 rng_mode entropy_src_rng 5.517m 10.099ms 300 300 100.00
V2 rng_max_rate entropy_src_rng_max_rate 9.583m 10.049ms 397 400 99.25
V2 health_checks entropy_src_rng 5.517m 10.099ms 300 300 100.00
V2 conditioning entropy_src_rng 5.517m 10.099ms 300 300 100.00
V2 interrupts entropy_src_rng 5.517m 10.099ms 300 300 100.00
entropy_src_intr 34.000s 519.087us 50 50 100.00
V2 alerts entropy_src_rng 5.517m 10.099ms 300 300 100.00
entropy_src_functional_alerts 5.000s 266.942us 50 50 100.00
V2 stress_all entropy_src_stress_all 12.000s 262.266us 50 50 100.00
V2 functional_errors entropy_src_functional_errors 9.267m 10.012ms 966 1000 96.60
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 24.000s 1.364ms 50 50 100.00
V2 intr_test entropy_src_intr_test 4.000s 53.145us 50 50 100.00
V2 alert_test entropy_src_alert_test 4.000s 42.169us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 8.000s 1.360ms 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 8.000s 1.360ms 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 5.000s 93.327us 5 5 100.00
entropy_src_csr_rw 4.000s 280.699us 20 20 100.00
entropy_src_csr_aliasing 8.000s 318.914us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 95.600us 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 5.000s 93.327us 5 5 100.00
entropy_src_csr_rw 4.000s 280.699us 20 20 100.00
entropy_src_csr_aliasing 8.000s 318.914us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 95.600us 20 20 100.00
V2 TOTAL 2283 2340 97.56
V2S tl_intg_err entropy_src_sec_cm 4.000s 93.837us 5 5 100.00
entropy_src_tl_intg_err 6.000s 332.267us 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 5.517m 10.099ms 300 300 100.00
entropy_src_cfg_regwen 7.000s 327.031us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 5.517m 10.099ms 300 300 100.00
V2S sec_cm_config_redun entropy_src_rng 5.517m 10.099ms 300 300 100.00
V2S sec_cm_intersig_mubi entropy_src_rng 5.517m 10.099ms 300 300 100.00
entropy_src_fw_ov 2.750m 5.050ms 280 300 93.33
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 9.267m 10.012ms 966 1000 96.60
entropy_src_sec_cm 4.000s 93.837us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 9.267m 10.012ms 966 1000 96.60
entropy_src_sec_cm 4.000s 93.837us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 5.517m 10.099ms 300 300 100.00
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 9.267m 10.012ms 966 1000 96.60
entropy_src_sec_cm 4.000s 93.837us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 9.267m 10.012ms 966 1000 96.60
entropy_src_sec_cm 4.000s 93.837us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 9.267m 10.012ms 966 1000 96.60
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 5.000s 266.942us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 6.000s 332.267us 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 5.300m 10.050ms 50 50 100.00
V3 stress_all_with_rand_reset entropy_src_stress_all_with_rand_reset 0 0 --
V3 TOTAL 50 50 100.00
TOTAL 2513 2570 97.78

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 12 12 9 75.00
V2S 3 3 3 100.00
V3 2 1 1 50.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
97.14 98.15 95.32 98.33 95.79 96.71 96.88 90.48 95.93

Failure Buckets

Past Results