ENTROPY_SRC Simulation Results

Thursday August 15 2024 23:02:21 UTC

GitHub Revision: d09e282b26

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 47908880312501934977153450267828796412449789719488445881682136509150457490963

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 23.000s 53.363us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 8.000s 82.976us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 13.000s 210.969us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 19.000s 538.913us 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 9.000s 347.091us 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 8.000s 54.699us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 13.000s 210.969us 20 20 100.00
entropy_src_csr_aliasing 9.000s 347.091us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 23.000s 53.363us 50 50 100.00
entropy_src_rng 10.550m 20.054ms 298 300 99.33
entropy_src_fw_ov 11.083m 20.085ms 262 300 87.33
V2 firmware_mode entropy_src_fw_ov 11.083m 20.085ms 262 300 87.33
V2 rng_mode entropy_src_rng 10.550m 20.054ms 298 300 99.33
V2 rng_max_rate entropy_src_rng_max_rate 17.967m 20.054ms 395 400 98.75
V2 health_checks entropy_src_rng 10.550m 20.054ms 298 300 99.33
V2 conditioning entropy_src_rng 10.550m 20.054ms 298 300 99.33
V2 interrupts entropy_src_rng 10.550m 20.054ms 298 300 99.33
entropy_src_intr 36.000s 495.106us 50 50 100.00
V2 alerts entropy_src_rng 10.550m 20.054ms 298 300 99.33
entropy_src_functional_alerts 15.000s 243.396us 50 50 100.00
V2 stress_all entropy_src_stress_all 10.233m 20.245ms 50 50 100.00
V2 functional_errors entropy_src_functional_errors 11.267m 10.012ms 972 1000 97.20
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 25.000s 1.389ms 50 50 100.00
V2 intr_test entropy_src_intr_test 12.000s 53.410us 50 50 100.00
V2 alert_test entropy_src_alert_test 9.000s 77.623us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 20.000s 99.298us 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 20.000s 99.298us 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 8.000s 82.976us 5 5 100.00
entropy_src_csr_rw 13.000s 210.969us 20 20 100.00
entropy_src_csr_aliasing 9.000s 347.091us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 255.158us 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 8.000s 82.976us 5 5 100.00
entropy_src_csr_rw 13.000s 210.969us 20 20 100.00
entropy_src_csr_aliasing 9.000s 347.091us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 255.158us 20 20 100.00
V2 TOTAL 2267 2340 96.88
V2S tl_intg_err entropy_src_sec_cm 3.000s 96.511us 5 5 100.00
entropy_src_tl_intg_err 11.000s 752.699us 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 10.550m 20.054ms 298 300 99.33
entropy_src_cfg_regwen 8.000s 12.913us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 10.550m 20.054ms 298 300 99.33
V2S sec_cm_config_redun entropy_src_rng 10.550m 20.054ms 298 300 99.33
V2S sec_cm_intersig_mubi entropy_src_rng 10.550m 20.054ms 298 300 99.33
entropy_src_fw_ov 11.083m 20.085ms 262 300 87.33
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 11.267m 10.012ms 972 1000 97.20
entropy_src_sec_cm 3.000s 96.511us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 11.267m 10.012ms 972 1000 97.20
entropy_src_sec_cm 3.000s 96.511us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 10.550m 20.054ms 298 300 99.33
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 11.267m 10.012ms 972 1000 97.20
entropy_src_sec_cm 3.000s 96.511us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 11.267m 10.012ms 972 1000 97.20
entropy_src_sec_cm 3.000s 96.511us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 11.267m 10.012ms 972 1000 97.20
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 15.000s 243.396us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 11.000s 752.699us 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 10.733m 20.063ms 50 50 100.00
V3 stress_all_with_rand_reset entropy_src_stress_all_with_rand_reset 0 0 --
V3 TOTAL 50 50 100.00
TOTAL 2497 2570 97.16

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 12 12 8 66.67
V2S 3 3 3 100.00
V3 2 1 1 50.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
97.18 98.15 95.32 98.33 95.84 96.68 96.88 90.83 96.20

Failure Buckets

Past Results