ENTROPY_SRC Simulation Results

Friday August 09 2024 23:02:07 UTC

GitHub Revision: 07b417ef03

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 39866585070056138360117926942905553094756411441088058786676399955088054585836

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 4.000s 123.909us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 3.000s 38.230us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 4.000s 77.216us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 10.000s 2.992ms 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 7.000s 76.585us 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 4.000s 32.082us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 4.000s 77.216us 20 20 100.00
entropy_src_csr_aliasing 7.000s 76.585us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 4.000s 123.909us 50 50 100.00
entropy_src_rng 10.333m 20.048ms 300 300 100.00
entropy_src_fw_ov 10.500m 20.052ms 263 300 87.67
V2 firmware_mode entropy_src_fw_ov 10.500m 20.052ms 263 300 87.67
V2 rng_mode entropy_src_rng 10.333m 20.048ms 300 300 100.00
V2 rng_max_rate entropy_src_rng_max_rate 18.567m 20.038ms 398 400 99.50
V2 health_checks entropy_src_rng 10.333m 20.048ms 300 300 100.00
V2 conditioning entropy_src_rng 10.333m 20.048ms 300 300 100.00
V2 interrupts entropy_src_rng 10.333m 20.048ms 300 300 100.00
entropy_src_intr 33.000s 2.598ms 50 50 100.00
V2 alerts entropy_src_rng 10.333m 20.048ms 300 300 100.00
entropy_src_functional_alerts 4.000s 291.601us 50 50 100.00
V2 stress_all entropy_src_stress_all 8.817m 17.307ms 50 50 100.00
V2 functional_errors entropy_src_functional_errors 10.683m 10.013ms 965 1000 96.50
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 24.000s 1.192ms 50 50 100.00
V2 intr_test entropy_src_intr_test 3.000s 14.328us 50 50 100.00
V2 alert_test entropy_src_alert_test 3.000s 78.367us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 7.000s 693.737us 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 7.000s 693.737us 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 3.000s 38.230us 5 5 100.00
entropy_src_csr_rw 4.000s 77.216us 20 20 100.00
entropy_src_csr_aliasing 7.000s 76.585us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 374.080us 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 3.000s 38.230us 5 5 100.00
entropy_src_csr_rw 4.000s 77.216us 20 20 100.00
entropy_src_csr_aliasing 7.000s 76.585us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 374.080us 20 20 100.00
V2 TOTAL 2266 2340 96.84
V2S tl_intg_err entropy_src_sec_cm 5.000s 517.787us 5 5 100.00
entropy_src_tl_intg_err 7.000s 866.921us 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 10.333m 20.048ms 300 300 100.00
entropy_src_cfg_regwen 3.000s 20.247us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 10.333m 20.048ms 300 300 100.00
V2S sec_cm_config_redun entropy_src_rng 10.333m 20.048ms 300 300 100.00
V2S sec_cm_intersig_mubi entropy_src_rng 10.333m 20.048ms 300 300 100.00
entropy_src_fw_ov 10.500m 20.052ms 263 300 87.67
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 10.683m 10.013ms 965 1000 96.50
entropy_src_sec_cm 5.000s 517.787us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 10.683m 10.013ms 965 1000 96.50
entropy_src_sec_cm 5.000s 517.787us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 10.333m 20.048ms 300 300 100.00
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 10.683m 10.013ms 965 1000 96.50
entropy_src_sec_cm 5.000s 517.787us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 10.683m 10.013ms 965 1000 96.50
entropy_src_sec_cm 5.000s 517.787us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 10.683m 10.013ms 965 1000 96.50
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 4.000s 291.601us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 7.000s 866.921us 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 7.467m 14.056ms 50 50 100.00
V3 stress_all_with_rand_reset entropy_src_stress_all_with_rand_reset 0 0 --
V3 TOTAL 50 50 100.00
TOTAL 2496 2570 97.12

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 12 12 9 75.00
V2S 3 3 3 100.00
V3 2 1 1 50.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
97.17 98.15 95.32 98.36 95.79 96.71 96.88 90.49 96.08

Failure Buckets

Past Results