ENTROPY_SRC Simulation Results

Sunday September 01 2024 02:56:32 UTC

GitHub Revision: ed1c41cd0f

Branch: os_regression_2024_08_31

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 79046303479535931055412478968949166876277637335647713094117953182855865639399

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 6.000s 38.056us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 18.000s 49.540us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 1.067m 22.157us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 27.000s 518.707us 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 21.000s 588.534us 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 58.000s 34.403us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 1.067m 22.157us 20 20 100.00
entropy_src_csr_aliasing 21.000s 588.534us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 6.000s 38.056us 50 50 100.00
entropy_src_rng 15.583m 19.061ms 300 300 100.00
entropy_src_fw_ov 15.650m 20.017ms 260 300 86.67
V2 firmware_mode entropy_src_fw_ov 15.650m 20.017ms 260 300 86.67
V2 rng_mode entropy_src_rng 15.583m 19.061ms 300 300 100.00
V2 rng_max_rate entropy_src_rng_max_rate 26.617m 18.021ms 399 400 99.75
V2 health_checks entropy_src_rng 15.583m 19.061ms 300 300 100.00
V2 conditioning entropy_src_rng 15.583m 19.061ms 300 300 100.00
V2 interrupts entropy_src_rng 15.583m 19.061ms 300 300 100.00
entropy_src_intr 39.000s 344.839us 50 50 100.00
V2 alerts entropy_src_rng 15.583m 19.061ms 300 300 100.00
entropy_src_functional_alerts 7.000s 104.595us 50 50 100.00
V2 stress_all entropy_src_stress_all 12.517m 17.336ms 50 50 100.00
V2 functional_errors entropy_src_functional_errors 17.017m 10.012ms 973 1000 97.30
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 53.000s 1.346ms 50 50 100.00
V2 intr_test entropy_src_intr_test 1.283m 15.496us 50 50 100.00
V2 alert_test entropy_src_alert_test 5.000s 72.287us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 1.050m 118.431us 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 1.050m 118.431us 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 18.000s 49.540us 5 5 100.00
entropy_src_csr_rw 1.067m 22.157us 20 20 100.00
entropy_src_csr_aliasing 21.000s 588.534us 5 5 100.00
entropy_src_same_csr_outstanding 1.150m 21.170us 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 18.000s 49.540us 5 5 100.00
entropy_src_csr_rw 1.067m 22.157us 20 20 100.00
entropy_src_csr_aliasing 21.000s 588.534us 5 5 100.00
entropy_src_same_csr_outstanding 1.150m 21.170us 20 20 100.00
V2 TOTAL 2272 2340 97.09
V2S tl_intg_err entropy_src_sec_cm 7.000s 207.232us 5 5 100.00
entropy_src_tl_intg_err 1.383m 118.804us 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 15.583m 19.061ms 300 300 100.00
entropy_src_cfg_regwen 5.000s 21.235us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 15.583m 19.061ms 300 300 100.00
V2S sec_cm_config_redun entropy_src_rng 15.583m 19.061ms 300 300 100.00
V2S sec_cm_intersig_mubi entropy_src_rng 15.583m 19.061ms 300 300 100.00
entropy_src_fw_ov 15.650m 20.017ms 260 300 86.67
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 17.017m 10.012ms 973 1000 97.30
entropy_src_sec_cm 7.000s 207.232us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 17.017m 10.012ms 973 1000 97.30
entropy_src_sec_cm 7.000s 207.232us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 15.583m 19.061ms 300 300 100.00
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 17.017m 10.012ms 973 1000 97.30
entropy_src_sec_cm 7.000s 207.232us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 17.017m 10.012ms 973 1000 97.30
entropy_src_sec_cm 7.000s 207.232us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 17.017m 10.012ms 973 1000 97.30
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 7.000s 104.595us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 1.383m 118.804us 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 12.283m 19.080ms 50 50 100.00
V3 stress_all_with_rand_reset entropy_src_stress_all_with_rand_reset 0 0 --
V3 TOTAL 50 50 100.00
TOTAL 2502 2570 97.35

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 12 12 9 75.00
V2S 3 3 3 100.00
V3 2 1 1 50.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
97.15 98.15 95.32 98.33 95.84 96.62 96.88 90.83 96.04

Failure Buckets

Past Results