SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_lc_creator_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_escalate_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_wr_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_nvm_debug_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_owner_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_seed_hw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 77 | 1 | T15 | 1 | T181 | 1 | T371 | 3 | |||
others[1] | 80 | 1 | T15 | 1 | T81 | 3 | T181 | 2 | |||
others[2] | 87 | 1 | T15 | 1 | T81 | 1 | T181 | 2 | |||
others[3] | 145 | 1 | T15 | 4 | T81 | 4 | T181 | 2 | |||
false | 27323 | 1 | T1 | 2 | T2 | 1 | T3 | 2 | |||
true | 22396 | 1 | T1 | 1 | T2 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 1 | 1 | T372 | 1 | - | - | - | - | |||
others[1] | 3 | 1 | T373 | 1 | T374 | 1 | T375 | 1 | |||
others[2] | 4 | 1 | T376 | 1 | T377 | 1 | T226 | 1 | |||
others[3] | 7 | 1 | T164 | 1 | T100 | 1 | T171 | 1 | |||
false | 12105 | 1 | T1 | 2 | T2 | 1 | T3 | 2 | |||
true | 4 | 1 | T165 | 1 | T168 | 1 | T189 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2357 | 1 | T44 | 58 | T46 | 27 | T34 | 34 | |||
others[1] | 2307 | 1 | T3 | 2 | T44 | 45 | T46 | 18 | |||
others[2] | 2371 | 1 | T44 | 47 | T46 | 14 | T34 | 46 | |||
others[3] | 3954 | 1 | T15 | 1 | T44 | 69 | T46 | 41 | |||
false | 7181 | 1 | T2 | 1 | T3 | 1 | T14 | 1 | |||
true | 1581 | 1 | T1 | 3 | T2 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2455 | 1 | T3 | 2 | T15 | 2 | T44 | 48 | |||
others[1] | 2391 | 1 | T44 | 51 | T46 | 14 | T34 | 22 | |||
others[2] | 2255 | 1 | T15 | 1 | T44 | 38 | T46 | 19 | |||
others[3] | 3939 | 1 | T15 | 2 | T44 | 87 | T46 | 40 | |||
false | 7191 | 1 | T2 | 1 | T3 | 1 | T14 | 1 | |||
true | 1586 | 1 | T1 | 3 | T2 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2424 | 1 | T44 | 50 | T46 | 28 | T321 | 1 | |||
others[1] | 2351 | 1 | T44 | 32 | T35 | 1 | T46 | 27 | |||
others[2] | 2275 | 1 | T44 | 50 | T46 | 25 | T34 | 44 | |||
others[3] | 3869 | 1 | T44 | 81 | T46 | 34 | T34 | 72 | |||
false | 7586 | 1 | T1 | 2 | T2 | 1 | T3 | 2 | |||
true | 46 | 1 | T14 | 1 | T91 | 1 | T378 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 78 | 1 | T15 | 1 | T81 | 1 | T181 | 2 | |||
others[1] | 96 | 1 | T15 | 3 | T81 | 2 | T181 | 1 | |||
others[2] | 79 | 1 | T15 | 3 | T81 | 1 | T181 | 1 | |||
others[3] | 141 | 1 | T15 | 2 | T81 | 2 | T181 | 3 | |||
false | 27287 | 1 | T2 | 1 | T3 | 2 | T14 | 1 | |||
true | 22591 | 1 | T1 | 3 | T2 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 7655 | 1 | T44 | 129 | T46 | 61 | T34 | 130 | |||
others[1] | 7729 | 1 | T44 | 163 | T46 | 78 | T34 | 117 | |||
others[2] | 7692 | 1 | T44 | 156 | T46 | 78 | T34 | 104 | |||
others[3] | 12678 | 1 | T44 | 243 | T46 | 119 | T34 | 200 | |||
false | 3884 | 1 | T44 | 84 | T46 | 46 | T34 | 71 | |||
true | 19052 | 1 | T1 | 2 | T2 | 1 | T3 | 2 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |