Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	125997664	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

138966682

1

T13

877

T14

6362

T15

520

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	105083005	1			T13	447		T14	4597		T15	272
values[0x0]	74290888	1			T13	207		T14	2309		T15	120
values[0x1]	85590453	1			T13	223		T14	2285		T15	128

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	92362235	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

172602111

1

T13

877

T14

6892

T15

520

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	968661	1			T13	12		T20	4		T34	7
valid_sources[0x01]	1688956	1			T13	8		T14	384		T15	2
valid_sources[0x02]	1298180	1			T13	3		T15	1		T18	1
valid_sources[0x03]	1290752	1			T13	8		T14	128		T15	4
valid_sources[0x04]	943163	1			T15	4		T19	17		T20	7
valid_sources[0x05]	902467	1			T15	1		T18	1		T19	5
valid_sources[0x06]	981293	1			T13	8		T14	128		T18	1
valid_sources[0x07]	1303921	1			T13	3		T15	6		T16	1
valid_sources[0x08]	920099	1			T13	1		T15	1		T16	1
valid_sources[0x09]	964879	1			T13	4		T16	2		T18	2
valid_sources[0x0a]	953472	1			T15	6		T16	1		T18	1
valid_sources[0x0b]	946953	1			T13	2		T16	2		T20	5
valid_sources[0x0c]	955341	1			T15	4		T16	2		T20	3
valid_sources[0x0d]	1318863	1			T13	7		T16	3		T18	2
valid_sources[0x0e]	1361118	1			T15	1		T16	3		T18	2
valid_sources[0x0f]	1351006	1			T14	128		T15	2		T16	1
valid_sources[0x10]	928344	1			T13	4		T14	128		T15	1
valid_sources[0x11]	942129	1			T13	5		T14	128		T15	8
valid_sources[0x12]	947363	1			T13	4		T15	1		T16	1
valid_sources[0x13]	1003539	1			T14	128		T15	1		T16	1
valid_sources[0x14]	954405	1			T13	8		T14	128		T15	3
valid_sources[0x15]	983249	1			T13	5		T14	128		T15	3
valid_sources[0x16]	960329	1			T15	2		T16	1		T19	8
valid_sources[0x17]	1377969	1			T14	128		T16	1		T20	4
valid_sources[0x18]	966293	1			T13	4		T15	1		T16	3
valid_sources[0x19]	982408	1			T13	6		T15	1		T20	3
valid_sources[0x1a]	976318	1			T13	8		T15	1		T18	1
valid_sources[0x1b]	1004462	1			T15	1		T16	1		T18	1
valid_sources[0x1c]	987510	1			T13	9		T19	8		T20	7
valid_sources[0x1d]	992915	1			T13	2		T15	3		T16	1
valid_sources[0x1e]	1374367	1			T13	13		T14	128		T15	3
valid_sources[0x1f]	965267	1			T15	1		T16	2		T20	5
valid_sources[0x20]	959300	1			T13	21		T15	1		T16	3
valid_sources[0x21]	964610	1			T13	4		T15	3		T16	1
valid_sources[0x22]	957338	1			T15	3		T16	1		T19	11
valid_sources[0x23]	923490	1			T15	1		T16	2		T18	1
valid_sources[0x24]	975924	1			T14	128		T15	1		T20	4
valid_sources[0x25]	996749	1			T13	3		T20	1		T32	5
valid_sources[0x26]	977623	1			T15	1		T16	1		T20	6
valid_sources[0x27]	937854	1			T16	3		T19	17		T20	2
valid_sources[0x28]	942821	1			T16	1		T18	1		T20	5
valid_sources[0x29]	964295	1			T15	2		T16	1		T20	2
valid_sources[0x2a]	949142	1			T15	7		T16	2		T20	4
valid_sources[0x2b]	947344	1			T15	3		T16	2		T18	1
valid_sources[0x2c]	973357	1			T13	5		T14	256		T15	2
valid_sources[0x2d]	1265190	1			T13	3		T14	128		T15	2
valid_sources[0x2e]	929392	1			T13	2		T14	128		T15	3
valid_sources[0x2f]	941118	1			T15	4		T20	4		T22	5
valid_sources[0x30]	950572	1			T13	3		T15	3		T16	2
valid_sources[0x31]	948105	1			T13	4		T15	3		T16	2
valid_sources[0x32]	1371172	1			T15	1		T16	3		T19	5
valid_sources[0x33]	955787	1			T13	5		T15	10		T16	1
valid_sources[0x34]	1397713	1			T13	5		T14	128		T15	1
valid_sources[0x35]	964577	1			T14	128		T15	3		T18	1
valid_sources[0x36]	946469	1			T15	1		T18	2		T19	44
valid_sources[0x37]	1289996	1			T13	8		T14	128		T18	1
valid_sources[0x38]	964402	1			T13	5		T14	127		T18	1
valid_sources[0x39]	962741	1			T14	120		T15	5		T18	8
valid_sources[0x3a]	1027233	1			T20	5		T32	26		T34	4
valid_sources[0x3b]	1301719	1			T13	2		T15	1		T18	1
valid_sources[0x3c]	1387243	1			T13	3		T16	1		T20	4
valid_sources[0x3d]	1016070	1			T15	5		T18	2		T19	15
valid_sources[0x3e]	973399	1			T13	2		T14	128		T15	5
valid_sources[0x3f]	943464	1			T15	1		T16	2		T18	2
valid_sources[0x40]	939285	1			T13	13		T15	1		T16	1
valid_sources[0x41]	934616	1			T13	8		T15	3		T20	4
valid_sources[0x42]	982910	1			T13	1		T16	2		T20	3
valid_sources[0x43]	921176	1			T13	2		T15	2		T16	2
valid_sources[0x44]	966706	1			T13	1		T16	1		T19	10
valid_sources[0x45]	1024096	1			T13	7		T14	128		T16	2
valid_sources[0x46]	939079	1			T15	6		T18	2		T20	7
valid_sources[0x47]	1061460	1			T13	6		T14	128		T15	1
valid_sources[0x48]	921725	1			T15	7		T18	1		T20	6
valid_sources[0x49]	976070	1			T13	4		T15	2		T16	4
valid_sources[0x4a]	982597	1			T20	5		T22	1		T24	58
valid_sources[0x4b]	948180	1			T15	1		T16	1		T20	2
valid_sources[0x4c]	938288	1			T13	1		T18	1		T19	21
valid_sources[0x4d]	964520	1			T13	2		T15	1		T16	3
valid_sources[0x4e]	1201593	1			T14	128		T16	2		T19	6
valid_sources[0x4f]	971263	1			T14	256		T15	3		T16	2
valid_sources[0x50]	996113	1			T13	11		T15	5		T16	1
valid_sources[0x51]	960098	1			T15	1		T16	3		T18	1
valid_sources[0x52]	926295	1			T16	3		T20	3		T32	2
valid_sources[0x53]	968459	1			T16	4		T18	1		T20	7
valid_sources[0x54]	975367	1			T13	2		T14	128		T15	1
valid_sources[0x55]	1322369	1			T13	4		T15	2		T16	2
valid_sources[0x56]	974804	1			T13	4		T14	120		T15	3
valid_sources[0x57]	936906	1			T13	9		T16	3		T18	1
valid_sources[0x58]	945711	1			T16	1		T18	1		T19	22
valid_sources[0x59]	1276828	1			T14	128		T15	4		T16	1
valid_sources[0x5a]	991647	1			T13	2		T14	128		T15	1
valid_sources[0x5b]	1005518	1			T13	5		T15	2		T16	4
valid_sources[0x5c]	948276	1			T15	2		T16	1		T19	7
valid_sources[0x5d]	968887	1			T13	5		T15	1		T16	2
valid_sources[0x5e]	1021286	1			T13	4		T15	2		T18	1
valid_sources[0x5f]	1297479	1			T13	4		T14	128		T15	5
valid_sources[0x60]	931494	1			T13	2		T16	2		T18	1
valid_sources[0x61]	979132	1			T16	3		T19	1		T20	4
valid_sources[0x62]	994857	1			T13	4		T15	1		T16	1
valid_sources[0x63]	1413049	1			T15	1		T20	5		T32	13
valid_sources[0x64]	955551	1			T15	1		T18	1		T19	4
valid_sources[0x65]	946346	1			T13	5		T16	2		T20	4
valid_sources[0x66]	932277	1			T13	10		T15	2		T20	3
valid_sources[0x67]	1276806	1			T15	3		T16	1		T18	3
valid_sources[0x68]	954166	1			T13	19		T15	3		T16	1
valid_sources[0x69]	1008185	1			T13	2		T15	1		T18	3
valid_sources[0x6a]	970804	1			T15	8		T16	1		T20	2
valid_sources[0x6b]	1016188	1			T13	12		T15	3		T16	1
valid_sources[0x6c]	1336611	1			T13	8		T18	1		T19	3
valid_sources[0x6d]	949588	1			T13	5		T14	128		T16	1
valid_sources[0x6e]	1376092	1			T16	1		T18	1		T20	4
valid_sources[0x6f]	1034745	1			T13	12		T14	128		T15	1
valid_sources[0x70]	934116	1			T13	5		T14	128		T16	4
valid_sources[0x71]	950046	1			T15	5		T18	1		T19	13
valid_sources[0x72]	916418	1			T13	1		T14	128		T15	2
valid_sources[0x73]	1000814	1			T15	2		T16	1		T18	7
valid_sources[0x74]	952083	1			T13	5		T15	4		T16	1
valid_sources[0x75]	982179	1			T13	1		T16	2		T18	2
valid_sources[0x76]	960848	1			T13	5		T15	2		T20	4
valid_sources[0x77]	964631	1			T13	5		T15	1		T20	5
valid_sources[0x78]	974554	1			T13	4		T15	1		T16	1
valid_sources[0x79]	1057229	1			T13	1		T14	128		T16	1
valid_sources[0x7a]	1000464	1			T13	17		T15	1		T18	3
valid_sources[0x7b]	1028192	1			T15	4		T16	1		T20	4
valid_sources[0x7c]	1464874	1			T15	2		T18	2		T20	3
valid_sources[0x7d]	1012871	1			T15	3		T16	3		T19	15
valid_sources[0x7e]	1000443	1			T15	1		T16	1		T19	3
valid_sources[0x7f]	983775	1			T15	1		T16	1		T20	4
valid_sources[0x80]	971282	1			T15	1		T20	2		T22	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

50591701

1

T13

447

T14

2267

T15

272

values[0x0]

all_enables

biggest_size

46100324

1

T13

207

T14

2085

T15

120

values[0x1]

all_enables

biggest_size

42274657

1

T13

223

T14

2010

T15

128