Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	108332915	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

122130882

1

T12

71

T13

501

T14

760

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	90719035	1			T12	51		T13	173		T14	570
values[0x0]	64876620	1			T12	25		T13	188		T14	258
values[0x1]	74868142	1			T12	21		T13	259		T14	230

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	79148231	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

151315566

1

T12

77

T13

573

T14

840

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1245405	1			T13	3		T14	4		T17	2
valid_sources[0x01]	849432	1			T13	2		T14	3		T15	1
valid_sources[0x02]	875184	1			T13	3		T14	9		T17	10
valid_sources[0x03]	857661	1			T13	1		T14	4		T17	1
valid_sources[0x04]	855615	1			T13	5		T14	4		T17	2
valid_sources[0x05]	847117	1			T13	3		T14	4		T118	1
valid_sources[0x06]	887852	1			T13	4		T14	3		T23	1
valid_sources[0x07]	881433	1			T12	1		T13	5		T14	5
valid_sources[0x08]	827626	1			T13	1		T14	2		T22	3
valid_sources[0x09]	862173	1			T13	4		T14	4		T21	1
valid_sources[0x0a]	868858	1			T13	2		T14	7		T118	1
valid_sources[0x0b]	857423	1			T13	3		T14	1		T25	7
valid_sources[0x0c]	856698	1			T13	1		T14	5		T23	2
valid_sources[0x0d]	869787	1			T13	2		T14	2		T118	2
valid_sources[0x0e]	860740	1			T13	1		T14	6		T22	3
valid_sources[0x0f]	852857	1			T13	1		T14	7		T24	3
valid_sources[0x10]	827979	1			T13	3		T14	5		T22	26
valid_sources[0x11]	1210552	1			T13	4		T14	7		T23	5
valid_sources[0x12]	825719	1			T13	2		T14	7		T17	6
valid_sources[0x13]	876414	1			T13	2		T14	7		T62	1
valid_sources[0x14]	928419	1			T13	3		T14	3		T23	2
valid_sources[0x15]	837815	1			T13	2		T14	5		T17	4
valid_sources[0x16]	840880	1			T13	4		T14	3		T22	2
valid_sources[0x17]	877797	1			T13	3		T14	6		T15	1
valid_sources[0x18]	837060	1			T13	3		T14	4		T18	12
valid_sources[0x19]	830027	1			T13	3		T14	2		T20	1
valid_sources[0x1a]	841548	1			T12	2		T13	1		T14	7
valid_sources[0x1b]	2063989	1			T13	4		T14	4		T60	8
valid_sources[0x1c]	851219	1			T13	1		T14	5		T117	1
valid_sources[0x1d]	857788	1			T13	2		T14	9		T17	5
valid_sources[0x1e]	838392	1			T12	2		T13	1		T14	1
valid_sources[0x1f]	843131	1			T13	1		T14	4		T60	6
valid_sources[0x20]	1642268	1			T13	1		T14	5		T22	1
valid_sources[0x21]	814058	1			T13	2		T14	2		T17	14
valid_sources[0x22]	887592	1			T13	5		T14	7		T15	1
valid_sources[0x23]	849368	1			T13	4		T14	6		T15	1
valid_sources[0x24]	835660	1			T14	2		T63	1		T25	4
valid_sources[0x25]	832961	1			T12	1		T13	1		T14	7
valid_sources[0x26]	819967	1			T13	7		T14	1		T20	1
valid_sources[0x27]	840153	1			T12	2		T13	2		T14	1
valid_sources[0x28]	849661	1			T13	5		T14	2		T23	6
valid_sources[0x29]	839758	1			T13	4		T14	3		T21	1
valid_sources[0x2a]	1265900	1			T13	3		T14	2		T20	1
valid_sources[0x2b]	1177139	1			T13	5		T14	3		T23	3
valid_sources[0x2c]	1514103	1			T13	1		T14	8		T17	7
valid_sources[0x2d]	838720	1			T13	2		T14	7		T17	21
valid_sources[0x2e]	854258	1			T13	2		T14	4		T17	2
valid_sources[0x2f]	866513	1			T13	1		T14	2		T17	5
valid_sources[0x30]	840170	1			T13	2		T14	5		T21	1
valid_sources[0x31]	836068	1			T12	2		T13	2		T14	4
valid_sources[0x32]	856832	1			T13	1		T14	4		T17	11
valid_sources[0x33]	870853	1			T13	3		T14	4		T20	1
valid_sources[0x34]	868556	1			T13	1		T14	1		T21	2
valid_sources[0x35]	855988	1			T13	5		T14	3		T117	1
valid_sources[0x36]	861830	1			T12	2		T13	2		T14	4
valid_sources[0x37]	1067440	1			T13	2		T14	3		T17	16
valid_sources[0x38]	850796	1			T13	4		T14	4		T19	4
valid_sources[0x39]	853238	1			T13	3		T14	2		T17	1
valid_sources[0x3a]	907366	1			T13	2		T14	7		T21	1
valid_sources[0x3b]	878296	1			T13	1		T14	3		T22	1
valid_sources[0x3c]	859012	1			T13	3		T14	2		T20	1
valid_sources[0x3d]	840396	1			T13	4		T14	4		T17	18
valid_sources[0x3e]	876160	1			T13	3		T14	7		T17	4
valid_sources[0x3f]	922441	1			T13	1		T14	3		T15	1
valid_sources[0x40]	868360	1			T13	8		T14	2		T23	1
valid_sources[0x41]	873173	1			T13	4		T14	2		T63	8
valid_sources[0x42]	863383	1			T13	2		T14	2		T63	1
valid_sources[0x43]	862738	1			T13	5		T14	4		T20	1
valid_sources[0x44]	833589	1			T13	2		T14	2		T17	3
valid_sources[0x45]	850639	1			T13	3		T14	5		T20	1
valid_sources[0x46]	834612	1			T13	6		T14	11		T20	1
valid_sources[0x47]	862994	1			T13	1		T14	2		T21	2
valid_sources[0x48]	869624	1			T13	2		T14	4		T60	15
valid_sources[0x49]	1291630	1			T12	1		T13	1		T14	6
valid_sources[0x4a]	814670	1			T13	1		T14	1		T15	1
valid_sources[0x4b]	882758	1			T12	1		T14	7		T17	6
valid_sources[0x4c]	861481	1			T13	1		T14	4		T15	1
valid_sources[0x4d]	826758	1			T12	1		T13	4		T14	6
valid_sources[0x4e]	895404	1			T12	6		T14	6		T23	7
valid_sources[0x4f]	854846	1			T13	3		T14	3		T21	1
valid_sources[0x50]	847952	1			T12	3		T13	3		T14	7
valid_sources[0x51]	875476	1			T13	3		T14	8		T17	6
valid_sources[0x52]	817970	1			T13	4		T14	3		T20	1
valid_sources[0x53]	843843	1			T13	6		T14	4		T23	2
valid_sources[0x54]	1247296	1			T13	4		T14	3		T15	1
valid_sources[0x55]	1179517	1			T13	3		T14	6		T15	1
valid_sources[0x56]	880627	1			T13	3		T14	2		T17	2
valid_sources[0x57]	848224	1			T13	4		T14	3		T23	3
valid_sources[0x58]	1217648	1			T13	3		T14	6		T23	1
valid_sources[0x59]	865578	1			T13	1		T14	4		T15	1
valid_sources[0x5a]	890022	1			T13	3		T14	2		T16	22
valid_sources[0x5b]	852565	1			T13	3		T14	2		T20	1
valid_sources[0x5c]	858935	1			T13	1		T14	2		T17	6
valid_sources[0x5d]	839218	1			T13	4		T14	3		T60	14
valid_sources[0x5e]	875239	1			T13	4		T14	3		T17	9
valid_sources[0x5f]	856647	1			T13	4		T14	7		T21	1
valid_sources[0x60]	850782	1			T13	1		T14	2		T22	3
valid_sources[0x61]	833294	1			T13	3		T14	9		T21	2
valid_sources[0x62]	841265	1			T14	1		T21	1		T22	2
valid_sources[0x63]	868289	1			T13	4		T14	6		T17	8
valid_sources[0x64]	1298367	1			T13	3		T14	4		T18	3
valid_sources[0x65]	875948	1			T14	4		T21	1		T23	3
valid_sources[0x66]	831778	1			T13	1		T14	2		T18	6
valid_sources[0x67]	904194	1			T14	3		T23	1		T118	1
valid_sources[0x68]	852179	1			T12	4		T13	3		T14	6
valid_sources[0x69]	1387109	1			T13	5		T14	5		T17	2
valid_sources[0x6a]	831405	1			T12	7		T13	3		T14	5
valid_sources[0x6b]	1171242	1			T12	2		T13	3		T14	6
valid_sources[0x6c]	865791	1			T13	1		T14	4		T17	3
valid_sources[0x6d]	843536	1			T13	4		T14	2		T17	5
valid_sources[0x6e]	861403	1			T13	3		T14	2		T15	1
valid_sources[0x6f]	863414	1			T12	4		T13	2		T14	8
valid_sources[0x70]	831664	1			T13	3		T14	5		T17	5
valid_sources[0x71]	900656	1			T13	2		T14	3		T21	1
valid_sources[0x72]	855189	1			T13	1		T14	2		T23	2
valid_sources[0x73]	839578	1			T13	4		T14	9		T22	14
valid_sources[0x74]	859310	1			T13	2		T14	5		T17	2
valid_sources[0x75]	825069	1			T13	2		T14	6		T15	1
valid_sources[0x76]	865453	1			T12	1		T13	1		T14	12
valid_sources[0x77]	868365	1			T13	2		T14	3		T63	2
valid_sources[0x78]	848096	1			T13	3		T14	3		T22	2
valid_sources[0x79]	838399	1			T13	3		T14	4		T21	1
valid_sources[0x7a]	842454	1			T13	3		T14	2		T17	9
valid_sources[0x7b]	871293	1			T13	1		T14	3		T15	1
valid_sources[0x7c]	866833	1			T13	1		T14	6		T15	1
valid_sources[0x7d]	855550	1			T14	2		T21	1		T117	1
valid_sources[0x7e]	903174	1			T13	2		T14	4		T15	1
valid_sources[0x7f]	870960	1			T17	4		T63	1		T60	2
valid_sources[0x80]	852073	1			T13	2		T14	6		T23	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

43802672

1

T12

30

T13

127

T14

320

values[0x0]

all_enables

biggest_size

40792135

1

T12

22

T13

182

T14

238

values[0x1]

all_enables

biggest_size

37536075

1

T12

19

T13

192

T14

202