Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	113178137	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

127374299

1

T12

15

T13

1127

T14

71

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	94841049	1			T12	20		T13	832		T14	54
values[0x0]	67681059	1			T12	11		T13	343		T14	27
values[0x1]	78030328	1			T12	9		T13	380		T14	18

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	82605227	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

157947209

1

T12

16

T13

1246

T14

78

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	890564	1			T13	6		T15	8		T16	801
valid_sources[0x01]	897679	1			T12	1		T13	2		T15	12
valid_sources[0x02]	920292	1			T13	6		T14	1		T16	811
valid_sources[0x03]	886281	1			T13	12		T15	6		T16	494
valid_sources[0x04]	901692	1			T12	1		T13	6		T15	1
valid_sources[0x05]	933399	1			T13	6		T14	1		T15	4
valid_sources[0x06]	1319843	1			T13	6		T15	3		T16	870
valid_sources[0x07]	869099	1			T13	5		T14	1		T15	9
valid_sources[0x08]	922310	1			T13	5		T15	7		T16	825
valid_sources[0x09]	901380	1			T13	9		T15	3		T16	858
valid_sources[0x0a]	1270520	1			T12	2		T13	2		T15	6
valid_sources[0x0b]	876556	1			T12	1		T13	2		T14	1
valid_sources[0x0c]	1235372	1			T13	2		T15	2		T16	633
valid_sources[0x0d]	891288	1			T13	13		T15	4		T16	793
valid_sources[0x0e]	896581	1			T13	2		T15	1		T16	782
valid_sources[0x0f]	909626	1			T12	1		T13	1		T16	914
valid_sources[0x10]	930179	1			T13	1		T15	8		T16	976
valid_sources[0x11]	894192	1			T13	8		T16	608		T19	40
valid_sources[0x12]	1254859	1			T13	11		T14	4		T15	5
valid_sources[0x13]	911243	1			T13	8		T15	1		T16	600
valid_sources[0x14]	902068	1			T13	6		T15	4		T16	717
valid_sources[0x15]	923160	1			T13	2		T15	3		T16	925
valid_sources[0x16]	900194	1			T13	4		T14	2		T16	762
valid_sources[0x17]	943682	1			T13	15		T15	6		T16	630
valid_sources[0x18]	890849	1			T12	1		T13	11		T15	14
valid_sources[0x19]	899551	1			T13	1		T15	8		T16	636
valid_sources[0x1a]	899405	1			T12	1		T13	10		T16	995
valid_sources[0x1b]	882048	1			T13	5		T15	1		T16	841
valid_sources[0x1c]	886468	1			T13	3		T14	1		T15	3
valid_sources[0x1d]	929036	1			T13	10		T15	1		T16	536
valid_sources[0x1e]	938945	1			T13	1		T15	5		T16	889
valid_sources[0x1f]	917801	1			T13	6		T15	5		T16	690
valid_sources[0x20]	881021	1			T13	8		T15	12		T16	990
valid_sources[0x21]	915555	1			T13	6		T15	4		T16	774
valid_sources[0x22]	912660	1			T13	7		T15	6		T16	774
valid_sources[0x23]	948942	1			T13	3		T15	8		T16	809
valid_sources[0x24]	893531	1			T13	6		T15	4		T16	1103
valid_sources[0x25]	1529939	1			T13	7		T16	690		T19	24
valid_sources[0x26]	943395	1			T13	9		T15	10		T16	899
valid_sources[0x27]	908897	1			T16	450		T19	21		T21	1
valid_sources[0x28]	889461	1			T13	5		T15	5		T16	896
valid_sources[0x29]	892471	1			T13	7		T16	650		T19	32
valid_sources[0x2a]	918335	1			T13	2		T15	4		T16	1230
valid_sources[0x2b]	935186	1			T13	1		T15	4		T16	875
valid_sources[0x2c]	880291	1			T13	9		T16	735		T19	37
valid_sources[0x2d]	1052137	1			T12	1		T13	9		T15	2
valid_sources[0x2e]	900530	1			T12	3		T13	3		T15	8
valid_sources[0x2f]	890100	1			T13	6		T16	658		T19	63
valid_sources[0x30]	925872	1			T13	5		T15	2		T16	945
valid_sources[0x31]	907432	1			T13	6		T14	1		T15	20
valid_sources[0x32]	894191	1			T13	12		T15	2		T16	941
valid_sources[0x33]	910492	1			T13	7		T15	12		T16	754
valid_sources[0x34]	881761	1			T13	17		T15	1		T16	708
valid_sources[0x35]	894704	1			T13	5		T15	18		T16	634
valid_sources[0x36]	876237	1			T13	12		T16	633		T19	38
valid_sources[0x37]	896728	1			T13	7		T15	5		T16	674
valid_sources[0x38]	877531	1			T13	9		T15	1		T16	891
valid_sources[0x39]	915244	1			T13	10		T14	1		T15	10
valid_sources[0x3a]	1255047	1			T12	1		T13	7		T15	2
valid_sources[0x3b]	912014	1			T13	4		T16	602		T19	27
valid_sources[0x3c]	911857	1			T13	2		T15	5		T16	579
valid_sources[0x3d]	880937	1			T13	15		T15	7		T16	655
valid_sources[0x3e]	891200	1			T13	6		T16	840		T18	19
valid_sources[0x3f]	1296340	1			T13	7		T14	2		T15	17
valid_sources[0x40]	896108	1			T13	3		T16	597		T19	30
valid_sources[0x41]	874452	1			T12	1		T13	6		T16	630
valid_sources[0x42]	902287	1			T13	6		T15	8		T16	574
valid_sources[0x43]	908762	1			T13	6		T15	1		T16	413
valid_sources[0x44]	919472	1			T13	3		T15	13		T16	764
valid_sources[0x45]	907004	1			T12	1		T13	5		T15	16
valid_sources[0x46]	888046	1			T13	9		T16	546		T19	47
valid_sources[0x47]	903414	1			T13	2		T14	1		T15	11
valid_sources[0x48]	921135	1			T12	2		T13	10		T15	3
valid_sources[0x49]	893930	1			T13	7		T15	8		T16	768
valid_sources[0x4a]	892254	1			T13	8		T15	3		T16	950
valid_sources[0x4b]	888344	1			T13	8		T16	901		T19	28
valid_sources[0x4c]	897575	1			T13	1		T15	6		T16	619
valid_sources[0x4d]	903434	1			T13	3		T15	13		T16	701
valid_sources[0x4e]	894695	1			T13	6		T15	10		T16	558
valid_sources[0x4f]	911990	1			T13	16		T15	8		T16	1032
valid_sources[0x50]	896347	1			T13	12		T15	1		T16	757
valid_sources[0x51]	901879	1			T13	1		T15	4		T16	754
valid_sources[0x52]	898432	1			T13	2		T15	5		T16	567
valid_sources[0x53]	892882	1			T13	16		T16	905		T19	45
valid_sources[0x54]	1009507	1			T12	1		T13	14		T16	868
valid_sources[0x55]	864429	1			T13	22		T15	17		T16	941
valid_sources[0x56]	885030	1			T13	6		T15	18		T16	851
valid_sources[0x57]	880531	1			T13	11		T15	1		T16	828
valid_sources[0x58]	900514	1			T13	5		T15	14		T16	579
valid_sources[0x59]	920227	1			T13	4		T15	7		T16	844
valid_sources[0x5a]	906187	1			T13	3		T15	7		T16	546
valid_sources[0x5b]	1286546	1			T13	4		T16	806		T18	27
valid_sources[0x5c]	912868	1			T13	3		T15	2		T16	659
valid_sources[0x5d]	947498	1			T13	11		T16	609		T19	41
valid_sources[0x5e]	959244	1			T13	3		T15	5		T16	672
valid_sources[0x5f]	932975	1			T13	13		T15	2		T16	1023
valid_sources[0x60]	911242	1			T13	7		T16	638		T19	36
valid_sources[0x61]	888230	1			T13	11		T15	2		T16	621
valid_sources[0x62]	1292544	1			T13	2		T16	886		T19	29
valid_sources[0x63]	912905	1			T12	1		T13	4		T16	748
valid_sources[0x64]	890727	1			T13	5		T16	775		T19	35
valid_sources[0x65]	920609	1			T13	2		T15	7		T16	729
valid_sources[0x66]	912547	1			T13	8		T14	2		T15	20
valid_sources[0x67]	883685	1			T13	6		T15	10		T16	998
valid_sources[0x68]	938177	1			T13	5		T15	5		T16	823
valid_sources[0x69]	903520	1			T13	6		T14	1		T16	601
valid_sources[0x6a]	905950	1			T13	3		T15	1		T16	452
valid_sources[0x6b]	900582	1			T13	15		T14	1		T15	7
valid_sources[0x6c]	913826	1			T12	1		T13	7		T15	12
valid_sources[0x6d]	933448	1			T13	5		T15	17		T16	457
valid_sources[0x6e]	915931	1			T13	8		T15	9		T16	526
valid_sources[0x6f]	887435	1			T12	1		T13	5		T14	3
valid_sources[0x70]	893368	1			T13	7		T14	1		T15	2
valid_sources[0x71]	894496	1			T13	4		T15	4		T16	775
valid_sources[0x72]	921179	1			T13	5		T15	14		T16	645
valid_sources[0x73]	912183	1			T13	3		T15	8		T16	743
valid_sources[0x74]	890157	1			T13	7		T15	8		T16	657
valid_sources[0x75]	898194	1			T13	13		T15	1		T16	786
valid_sources[0x76]	899732	1			T13	3		T16	484		T19	42
valid_sources[0x77]	907010	1			T13	3		T14	2		T15	2
valid_sources[0x78]	911638	1			T12	2		T13	9		T15	10
valid_sources[0x79]	986308	1			T13	3		T15	15		T16	769
valid_sources[0x7a]	889977	1			T13	2		T16	1022		T19	27
valid_sources[0x7b]	890560	1			T13	5		T15	5		T16	847
valid_sources[0x7c]	1211066	1			T13	9		T16	796		T19	37
valid_sources[0x7d]	893140	1			T13	6		T14	3		T15	4
valid_sources[0x7e]	915247	1			T13	7		T15	13		T16	927
valid_sources[0x7f]	888876	1			T13	2		T14	1		T15	12
valid_sources[0x80]	863788	1			T13	4		T14	1		T15	5

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

45546928

1

T12

12

T13

476

T14

29

values[0x0]

all_enables

biggest_size

42609858

1

T12

1

T13

307

T14

27

values[0x1]

all_enables

biggest_size

39217513

1

T12

2

T13

344

T14

15