Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.60 99.53 98.58 100.00 100.00 99.76 99.49 99.86


Total tests in report: 906
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
52.59 52.59 34.16 34.16 31.91 31.91 85.55 85.55 100.00 100.00 23.53 23.53 79.80 79.80 13.20 13.20 /workspace/coverage/cover_reg_top/31.hmac_intr_test.2181206303
86.22 33.63 91.98 57.82 77.70 45.79 90.08 4.52 100.00 0.00 92.00 68.47 92.93 13.13 58.87 45.67 /workspace/coverage/default/57.hmac_stress_all_with_rand_reset.3568930019
95.32 9.10 99.07 7.08 96.50 18.80 98.74 8.67 100.00 0.00 98.59 6.59 94.70 1.77 79.64 20.77 /workspace/coverage/cover_reg_top/19.hmac_csr_mem_rw_with_rand_reset.4273965218
97.47 2.15 99.38 0.31 97.60 1.09 98.74 0.00 100.00 0.00 99.29 0.71 95.96 1.26 91.33 11.69 /workspace/coverage/default/50.hmac_stress_all_with_rand_reset.2116344620
98.11 0.63 99.53 0.16 98.03 0.44 99.50 0.75 100.00 0.00 99.76 0.47 95.96 0.00 93.95 2.61 /workspace/coverage/cover_reg_top/11.hmac_tl_intg_err.290311251
98.43 0.32 99.53 0.00 98.03 0.00 99.50 0.00 100.00 0.00 99.76 0.00 98.23 2.27 93.95 0.00 /workspace/coverage/cover_reg_top/15.hmac_csr_rw.265937633
98.65 0.22 99.53 0.00 98.03 0.00 99.50 0.00 100.00 0.00 99.76 0.00 98.23 0.00 95.46 1.51 /workspace/coverage/default/133.hmac_stress_all_with_rand_reset.1312586342
98.82 0.18 99.53 0.00 98.25 0.22 100.00 0.50 100.00 0.00 99.76 0.00 98.48 0.25 95.74 0.28 /workspace/coverage/default/0.hmac_sec_cm.3363286479
98.98 0.16 99.53 0.00 98.25 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 96.84 1.10 /workspace/coverage/cover_reg_top/16.hmac_intr_test.3388162434
99.12 0.14 99.53 0.00 98.25 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 97.80 0.96 /workspace/coverage/default/159.hmac_stress_all_with_rand_reset.3473736712
99.20 0.08 99.53 0.00 98.25 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 98.35 0.55 /workspace/coverage/default/90.hmac_stress_all_with_rand_reset.1452687087
99.27 0.07 99.53 0.00 98.36 0.11 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 98.76 0.41 /workspace/coverage/cover_reg_top/0.hmac_tl_intg_err.1435250056
99.31 0.04 99.53 0.00 98.36 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.04 0.28 /workspace/coverage/cover_reg_top/15.hmac_tl_intg_err.3367495381
99.35 0.04 99.53 0.00 98.36 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.31 0.28 /workspace/coverage/default/177.hmac_stress_all_with_rand_reset.2131149195
99.38 0.03 99.53 0.00 98.58 0.22 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.31 0.00 /workspace/coverage/default/17.hmac_alert_test.3056692556
99.40 0.02 99.53 0.00 98.58 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.45 0.14 /workspace/coverage/cover_reg_top/15.hmac_intr_test.1503458341
99.42 0.02 99.53 0.00 98.58 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.59 0.14 /workspace/coverage/default/117.hmac_stress_all_with_rand_reset.1903662620
99.44 0.02 99.53 0.00 98.58 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.72 0.14 /workspace/coverage/default/3.hmac_stress_all_with_rand_reset.569619178
99.46 0.02 99.53 0.00 98.58 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.86 0.14 /workspace/coverage/default/44.hmac_back_pressure.82926760

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.hmac_csr_aliasing.1739780891
/workspace/coverage/cover_reg_top/0.hmac_csr_bit_bash.4085845966
/workspace/coverage/cover_reg_top/0.hmac_csr_hw_reset.1468461167
/workspace/coverage/cover_reg_top/0.hmac_csr_mem_rw_with_rand_reset.3100882693
/workspace/coverage/cover_reg_top/0.hmac_csr_rw.1779336362
/workspace/coverage/cover_reg_top/0.hmac_intr_test.3446158859
/workspace/coverage/cover_reg_top/0.hmac_same_csr_outstanding.127546450
/workspace/coverage/cover_reg_top/0.hmac_tl_errors.2928457134
/workspace/coverage/cover_reg_top/1.hmac_csr_aliasing.1216057768
/workspace/coverage/cover_reg_top/1.hmac_csr_bit_bash.1706993569
/workspace/coverage/cover_reg_top/1.hmac_csr_hw_reset.3314284975
/workspace/coverage/cover_reg_top/1.hmac_csr_mem_rw_with_rand_reset.2682400193
/workspace/coverage/cover_reg_top/1.hmac_csr_rw.612613923
/workspace/coverage/cover_reg_top/1.hmac_intr_test.158991686
/workspace/coverage/cover_reg_top/1.hmac_same_csr_outstanding.3519521594
/workspace/coverage/cover_reg_top/1.hmac_tl_errors.1416002522
/workspace/coverage/cover_reg_top/1.hmac_tl_intg_err.3634284668
/workspace/coverage/cover_reg_top/10.hmac_csr_mem_rw_with_rand_reset.3364778858
/workspace/coverage/cover_reg_top/10.hmac_csr_rw.4127457272
/workspace/coverage/cover_reg_top/10.hmac_intr_test.372049967
/workspace/coverage/cover_reg_top/10.hmac_same_csr_outstanding.1573868103
/workspace/coverage/cover_reg_top/10.hmac_tl_errors.939401305
/workspace/coverage/cover_reg_top/10.hmac_tl_intg_err.2703401595
/workspace/coverage/cover_reg_top/11.hmac_csr_mem_rw_with_rand_reset.341333250
/workspace/coverage/cover_reg_top/11.hmac_csr_rw.1721004085
/workspace/coverage/cover_reg_top/11.hmac_intr_test.735700778
/workspace/coverage/cover_reg_top/11.hmac_same_csr_outstanding.2081225044
/workspace/coverage/cover_reg_top/11.hmac_tl_errors.3789665293
/workspace/coverage/cover_reg_top/12.hmac_csr_mem_rw_with_rand_reset.2336598417
/workspace/coverage/cover_reg_top/12.hmac_csr_rw.312094508
/workspace/coverage/cover_reg_top/12.hmac_intr_test.2365475885
/workspace/coverage/cover_reg_top/12.hmac_same_csr_outstanding.1526703747
/workspace/coverage/cover_reg_top/12.hmac_tl_errors.2835383279
/workspace/coverage/cover_reg_top/12.hmac_tl_intg_err.1010092236
/workspace/coverage/cover_reg_top/13.hmac_csr_mem_rw_with_rand_reset.4029526495
/workspace/coverage/cover_reg_top/13.hmac_csr_rw.1809090618
/workspace/coverage/cover_reg_top/13.hmac_intr_test.357837737
/workspace/coverage/cover_reg_top/13.hmac_same_csr_outstanding.1420071247
/workspace/coverage/cover_reg_top/13.hmac_tl_errors.3682994352
/workspace/coverage/cover_reg_top/13.hmac_tl_intg_err.3091194840
/workspace/coverage/cover_reg_top/14.hmac_csr_mem_rw_with_rand_reset.1756640309
/workspace/coverage/cover_reg_top/14.hmac_csr_rw.3187310576
/workspace/coverage/cover_reg_top/14.hmac_intr_test.3853808677
/workspace/coverage/cover_reg_top/14.hmac_same_csr_outstanding.1645036529
/workspace/coverage/cover_reg_top/14.hmac_tl_errors.4272918947
/workspace/coverage/cover_reg_top/14.hmac_tl_intg_err.2267363755
/workspace/coverage/cover_reg_top/15.hmac_csr_mem_rw_with_rand_reset.549428247
/workspace/coverage/cover_reg_top/15.hmac_same_csr_outstanding.993431501
/workspace/coverage/cover_reg_top/15.hmac_tl_errors.77622259
/workspace/coverage/cover_reg_top/16.hmac_csr_mem_rw_with_rand_reset.2484875949
/workspace/coverage/cover_reg_top/16.hmac_csr_rw.737218271
/workspace/coverage/cover_reg_top/16.hmac_same_csr_outstanding.3836392830
/workspace/coverage/cover_reg_top/16.hmac_tl_errors.1403117704
/workspace/coverage/cover_reg_top/16.hmac_tl_intg_err.1295579409
/workspace/coverage/cover_reg_top/17.hmac_csr_mem_rw_with_rand_reset.3469747955
/workspace/coverage/cover_reg_top/17.hmac_csr_rw.446439489
/workspace/coverage/cover_reg_top/17.hmac_intr_test.2908889144
/workspace/coverage/cover_reg_top/17.hmac_same_csr_outstanding.2285575208
/workspace/coverage/cover_reg_top/17.hmac_tl_errors.2497422161
/workspace/coverage/cover_reg_top/17.hmac_tl_intg_err.3263320747
/workspace/coverage/cover_reg_top/18.hmac_csr_mem_rw_with_rand_reset.1000936818
/workspace/coverage/cover_reg_top/18.hmac_csr_rw.1245476722
/workspace/coverage/cover_reg_top/18.hmac_intr_test.3345211274
/workspace/coverage/cover_reg_top/18.hmac_same_csr_outstanding.1533372078
/workspace/coverage/cover_reg_top/18.hmac_tl_errors.1227570386
/workspace/coverage/cover_reg_top/18.hmac_tl_intg_err.250498479
/workspace/coverage/cover_reg_top/19.hmac_csr_rw.189169002
/workspace/coverage/cover_reg_top/19.hmac_intr_test.3810642935
/workspace/coverage/cover_reg_top/19.hmac_same_csr_outstanding.2436094928
/workspace/coverage/cover_reg_top/19.hmac_tl_errors.1604173763
/workspace/coverage/cover_reg_top/19.hmac_tl_intg_err.2936459854
/workspace/coverage/cover_reg_top/2.hmac_csr_aliasing.3600166509
/workspace/coverage/cover_reg_top/2.hmac_csr_bit_bash.4192470784
/workspace/coverage/cover_reg_top/2.hmac_csr_hw_reset.3175743009
/workspace/coverage/cover_reg_top/2.hmac_csr_mem_rw_with_rand_reset.1420287921
/workspace/coverage/cover_reg_top/2.hmac_csr_rw.930580780
/workspace/coverage/cover_reg_top/2.hmac_intr_test.3029087578
/workspace/coverage/cover_reg_top/2.hmac_same_csr_outstanding.4024326815
/workspace/coverage/cover_reg_top/2.hmac_tl_errors.1079269140
/workspace/coverage/cover_reg_top/2.hmac_tl_intg_err.2645142460
/workspace/coverage/cover_reg_top/20.hmac_intr_test.1680843858
/workspace/coverage/cover_reg_top/21.hmac_intr_test.2888662871
/workspace/coverage/cover_reg_top/22.hmac_intr_test.2175470677
/workspace/coverage/cover_reg_top/23.hmac_intr_test.1393314544
/workspace/coverage/cover_reg_top/24.hmac_intr_test.2192846827
/workspace/coverage/cover_reg_top/25.hmac_intr_test.3133187989
/workspace/coverage/cover_reg_top/26.hmac_intr_test.2004188630
/workspace/coverage/cover_reg_top/27.hmac_intr_test.1721033238
/workspace/coverage/cover_reg_top/28.hmac_intr_test.3560894093
/workspace/coverage/cover_reg_top/29.hmac_intr_test.2248009751
/workspace/coverage/cover_reg_top/3.hmac_csr_aliasing.1423698885
/workspace/coverage/cover_reg_top/3.hmac_csr_bit_bash.4282943885
/workspace/coverage/cover_reg_top/3.hmac_csr_hw_reset.2016184574
/workspace/coverage/cover_reg_top/3.hmac_csr_mem_rw_with_rand_reset.2002489968
/workspace/coverage/cover_reg_top/3.hmac_csr_rw.2826428104
/workspace/coverage/cover_reg_top/3.hmac_intr_test.3469691748
/workspace/coverage/cover_reg_top/3.hmac_same_csr_outstanding.3709843258
/workspace/coverage/cover_reg_top/3.hmac_tl_errors.985017315
/workspace/coverage/cover_reg_top/3.hmac_tl_intg_err.3217441803
/workspace/coverage/cover_reg_top/30.hmac_intr_test.3132034603
/workspace/coverage/cover_reg_top/32.hmac_intr_test.1809924414
/workspace/coverage/cover_reg_top/33.hmac_intr_test.3775582888
/workspace/coverage/cover_reg_top/34.hmac_intr_test.3751965942
/workspace/coverage/cover_reg_top/35.hmac_intr_test.1821995491
/workspace/coverage/cover_reg_top/36.hmac_intr_test.2500871556
/workspace/coverage/cover_reg_top/37.hmac_intr_test.2184162287
/workspace/coverage/cover_reg_top/38.hmac_intr_test.2244944565
/workspace/coverage/cover_reg_top/39.hmac_intr_test.2158676255
/workspace/coverage/cover_reg_top/4.hmac_csr_aliasing.1150183340
/workspace/coverage/cover_reg_top/4.hmac_csr_bit_bash.2687931193
/workspace/coverage/cover_reg_top/4.hmac_csr_hw_reset.3964688634
/workspace/coverage/cover_reg_top/4.hmac_csr_mem_rw_with_rand_reset.2329735320
/workspace/coverage/cover_reg_top/4.hmac_csr_rw.2599161147
/workspace/coverage/cover_reg_top/4.hmac_intr_test.1417959796
/workspace/coverage/cover_reg_top/4.hmac_same_csr_outstanding.3911173779
/workspace/coverage/cover_reg_top/4.hmac_tl_errors.3431596142
/workspace/coverage/cover_reg_top/4.hmac_tl_intg_err.2438788621
/workspace/coverage/cover_reg_top/40.hmac_intr_test.1196363429
/workspace/coverage/cover_reg_top/41.hmac_intr_test.3242313275
/workspace/coverage/cover_reg_top/42.hmac_intr_test.3130604289
/workspace/coverage/cover_reg_top/43.hmac_intr_test.784886347
/workspace/coverage/cover_reg_top/44.hmac_intr_test.2558810964
/workspace/coverage/cover_reg_top/45.hmac_intr_test.2443476084
/workspace/coverage/cover_reg_top/46.hmac_intr_test.3289974869
/workspace/coverage/cover_reg_top/47.hmac_intr_test.403682047
/workspace/coverage/cover_reg_top/48.hmac_intr_test.2648706476
/workspace/coverage/cover_reg_top/49.hmac_intr_test.1943719006
/workspace/coverage/cover_reg_top/5.hmac_csr_mem_rw_with_rand_reset.2274431865
/workspace/coverage/cover_reg_top/5.hmac_csr_rw.3167737696
/workspace/coverage/cover_reg_top/5.hmac_intr_test.3373055154
/workspace/coverage/cover_reg_top/5.hmac_same_csr_outstanding.3157739823
/workspace/coverage/cover_reg_top/5.hmac_tl_errors.3342517829
/workspace/coverage/cover_reg_top/5.hmac_tl_intg_err.535942524
/workspace/coverage/cover_reg_top/6.hmac_csr_mem_rw_with_rand_reset.1640132731
/workspace/coverage/cover_reg_top/6.hmac_csr_rw.1945072859
/workspace/coverage/cover_reg_top/6.hmac_intr_test.3553213535
/workspace/coverage/cover_reg_top/6.hmac_same_csr_outstanding.2850519259
/workspace/coverage/cover_reg_top/6.hmac_tl_errors.2838998800
/workspace/coverage/cover_reg_top/6.hmac_tl_intg_err.3517387681
/workspace/coverage/cover_reg_top/7.hmac_csr_mem_rw_with_rand_reset.3570132679
/workspace/coverage/cover_reg_top/7.hmac_csr_rw.2397799740
/workspace/coverage/cover_reg_top/7.hmac_intr_test.3948128632
/workspace/coverage/cover_reg_top/7.hmac_same_csr_outstanding.2878046399
/workspace/coverage/cover_reg_top/7.hmac_tl_errors.872441989
/workspace/coverage/cover_reg_top/7.hmac_tl_intg_err.909871289
/workspace/coverage/cover_reg_top/8.hmac_csr_mem_rw_with_rand_reset.3751175994
/workspace/coverage/cover_reg_top/8.hmac_csr_rw.2262627293
/workspace/coverage/cover_reg_top/8.hmac_intr_test.2262130211
/workspace/coverage/cover_reg_top/8.hmac_same_csr_outstanding.4041780140
/workspace/coverage/cover_reg_top/8.hmac_tl_errors.2989509254
/workspace/coverage/cover_reg_top/8.hmac_tl_intg_err.1741207314
/workspace/coverage/cover_reg_top/9.hmac_csr_mem_rw_with_rand_reset.3905964785
/workspace/coverage/cover_reg_top/9.hmac_csr_rw.3462714188
/workspace/coverage/cover_reg_top/9.hmac_intr_test.587904059
/workspace/coverage/cover_reg_top/9.hmac_same_csr_outstanding.1437944836
/workspace/coverage/cover_reg_top/9.hmac_tl_errors.2558711086
/workspace/coverage/cover_reg_top/9.hmac_tl_intg_err.3043916461
/workspace/coverage/default/0.hmac_alert_test.4037006155
/workspace/coverage/default/0.hmac_back_pressure.3960553818
/workspace/coverage/default/0.hmac_burst_wr.2298052020
/workspace/coverage/default/0.hmac_datapath_stress.1328264430
/workspace/coverage/default/0.hmac_error.4206004532
/workspace/coverage/default/0.hmac_long_msg.3269569415
/workspace/coverage/default/0.hmac_smoke.2531645458
/workspace/coverage/default/0.hmac_stress_all.3161615774
/workspace/coverage/default/0.hmac_test_hmac_vectors.1954914033
/workspace/coverage/default/0.hmac_test_sha_vectors.1546079465
/workspace/coverage/default/0.hmac_wipe_secret.306075875
/workspace/coverage/default/1.hmac_alert_test.1964582172
/workspace/coverage/default/1.hmac_back_pressure.3007837071
/workspace/coverage/default/1.hmac_burst_wr.1949696913
/workspace/coverage/default/1.hmac_datapath_stress.3732289968
/workspace/coverage/default/1.hmac_error.2027713609
/workspace/coverage/default/1.hmac_long_msg.3595406554
/workspace/coverage/default/1.hmac_sec_cm.2696041611
/workspace/coverage/default/1.hmac_smoke.1369175872
/workspace/coverage/default/1.hmac_stress_all.1430896382
/workspace/coverage/default/1.hmac_stress_all_with_rand_reset.3156058692
/workspace/coverage/default/1.hmac_test_hmac_vectors.4271990915
/workspace/coverage/default/1.hmac_test_sha_vectors.3691430640
/workspace/coverage/default/1.hmac_wipe_secret.3405174322
/workspace/coverage/default/10.hmac_alert_test.2179214898
/workspace/coverage/default/10.hmac_back_pressure.285920708
/workspace/coverage/default/10.hmac_burst_wr.546066545
/workspace/coverage/default/10.hmac_datapath_stress.3517811823
/workspace/coverage/default/10.hmac_error.2880352381
/workspace/coverage/default/10.hmac_long_msg.1658175299
/workspace/coverage/default/10.hmac_smoke.436840920
/workspace/coverage/default/10.hmac_stress_all.2492662384
/workspace/coverage/default/10.hmac_stress_all_with_rand_reset.880816986
/workspace/coverage/default/10.hmac_test_hmac_vectors.1940351874
/workspace/coverage/default/10.hmac_test_sha_vectors.2460664637
/workspace/coverage/default/10.hmac_wipe_secret.226148968
/workspace/coverage/default/100.hmac_stress_all_with_rand_reset.3525526948
/workspace/coverage/default/101.hmac_stress_all_with_rand_reset.3486386719
/workspace/coverage/default/102.hmac_stress_all_with_rand_reset.1827160690
/workspace/coverage/default/103.hmac_stress_all_with_rand_reset.2975617939
/workspace/coverage/default/104.hmac_stress_all_with_rand_reset.2301262219
/workspace/coverage/default/105.hmac_stress_all_with_rand_reset.1197154857
/workspace/coverage/default/106.hmac_stress_all_with_rand_reset.1771886793
/workspace/coverage/default/107.hmac_stress_all_with_rand_reset.2436030764
/workspace/coverage/default/108.hmac_stress_all_with_rand_reset.2935082123
/workspace/coverage/default/109.hmac_stress_all_with_rand_reset.4020217971
/workspace/coverage/default/11.hmac_alert_test.4100475687
/workspace/coverage/default/11.hmac_back_pressure.2685518846
/workspace/coverage/default/11.hmac_burst_wr.4145687924
/workspace/coverage/default/11.hmac_datapath_stress.3440617282
/workspace/coverage/default/11.hmac_error.716861790
/workspace/coverage/default/11.hmac_long_msg.2726167193
/workspace/coverage/default/11.hmac_smoke.4257867191
/workspace/coverage/default/11.hmac_stress_all.770916564
/workspace/coverage/default/11.hmac_stress_all_with_rand_reset.1816572255
/workspace/coverage/default/11.hmac_test_hmac_vectors.2635376374
/workspace/coverage/default/11.hmac_test_sha_vectors.3780966466
/workspace/coverage/default/11.hmac_wipe_secret.1905466578
/workspace/coverage/default/110.hmac_stress_all_with_rand_reset.831326595
/workspace/coverage/default/112.hmac_stress_all_with_rand_reset.3407865871
/workspace/coverage/default/113.hmac_stress_all_with_rand_reset.165579778
/workspace/coverage/default/114.hmac_stress_all_with_rand_reset.1901612178
/workspace/coverage/default/115.hmac_stress_all_with_rand_reset.3800057886
/workspace/coverage/default/116.hmac_stress_all_with_rand_reset.3022011185
/workspace/coverage/default/118.hmac_stress_all_with_rand_reset.1972823156
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/workspace/coverage/default/8.hmac_test_sha_vectors.1244262825
/workspace/coverage/default/8.hmac_wipe_secret.2688807927
/workspace/coverage/default/80.hmac_stress_all_with_rand_reset.2370723583
/workspace/coverage/default/81.hmac_stress_all_with_rand_reset.3738363522
/workspace/coverage/default/82.hmac_stress_all_with_rand_reset.927703261
/workspace/coverage/default/83.hmac_stress_all_with_rand_reset.654802036
/workspace/coverage/default/84.hmac_stress_all_with_rand_reset.3524562831
/workspace/coverage/default/85.hmac_stress_all_with_rand_reset.3853576797
/workspace/coverage/default/86.hmac_stress_all_with_rand_reset.142847662
/workspace/coverage/default/87.hmac_stress_all_with_rand_reset.363062131
/workspace/coverage/default/88.hmac_stress_all_with_rand_reset.1782953322
/workspace/coverage/default/89.hmac_stress_all_with_rand_reset.3370590162
/workspace/coverage/default/9.hmac_alert_test.4039970808
/workspace/coverage/default/9.hmac_back_pressure.125394535
/workspace/coverage/default/9.hmac_burst_wr.2347439203
/workspace/coverage/default/9.hmac_datapath_stress.3431434600
/workspace/coverage/default/9.hmac_error.2465936925
/workspace/coverage/default/9.hmac_long_msg.3225780693
/workspace/coverage/default/9.hmac_smoke.443217893
/workspace/coverage/default/9.hmac_stress_all.1314312025
/workspace/coverage/default/9.hmac_stress_all_with_rand_reset.3450630411
/workspace/coverage/default/9.hmac_test_hmac_vectors.3985413369
/workspace/coverage/default/9.hmac_test_sha_vectors.143205726
/workspace/coverage/default/9.hmac_wipe_secret.1600626444
/workspace/coverage/default/91.hmac_stress_all_with_rand_reset.2856625357
/workspace/coverage/default/92.hmac_stress_all_with_rand_reset.437396937
/workspace/coverage/default/93.hmac_stress_all_with_rand_reset.764639193
/workspace/coverage/default/94.hmac_stress_all_with_rand_reset.2482721257
/workspace/coverage/default/95.hmac_stress_all_with_rand_reset.143262574
/workspace/coverage/default/96.hmac_stress_all_with_rand_reset.2079379270
/workspace/coverage/default/97.hmac_stress_all_with_rand_reset.3051970934
/workspace/coverage/default/98.hmac_stress_all_with_rand_reset.1107047167
/workspace/coverage/default/99.hmac_stress_all_with_rand_reset.2179507624



Total test records in report: 906
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T12 /workspace/coverage/cover_reg_top/31.hmac_intr_test.2181206303 Jan 17 12:32:24 PM PST 24 Jan 17 12:32:28 PM PST 24 41686939 ps
T13 /workspace/coverage/cover_reg_top/4.hmac_tl_intg_err.2438788621 Jan 17 12:32:01 PM PST 24 Jan 17 12:32:04 PM PST 24 138357817 ps
T14 /workspace/coverage/cover_reg_top/15.hmac_csr_rw.265937633 Jan 17 12:32:13 PM PST 24 Jan 17 12:32:16 PM PST 24 51089770 ps
T15 /workspace/coverage/cover_reg_top/6.hmac_tl_intg_err.3517387681 Jan 17 12:32:40 PM PST 24 Jan 17 12:32:45 PM PST 24 2972389230 ps
T16 /workspace/coverage/cover_reg_top/19.hmac_csr_mem_rw_with_rand_reset.4273965218 Jan 17 12:36:06 PM PST 24 Jan 17 12:51:14 PM PST 24 113087985014 ps
T17 /workspace/coverage/cover_reg_top/49.hmac_intr_test.1943719006 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:26 PM PST 24 17743269 ps
T18 /workspace/coverage/cover_reg_top/4.hmac_csr_rw.2599161147 Jan 17 12:32:21 PM PST 24 Jan 17 12:32:28 PM PST 24 99335364 ps
T19 /workspace/coverage/cover_reg_top/4.hmac_csr_bit_bash.2687931193 Jan 17 12:32:16 PM PST 24 Jan 17 12:32:28 PM PST 24 3884055016 ps
T20 /workspace/coverage/cover_reg_top/5.hmac_csr_mem_rw_with_rand_reset.2274431865 Jan 17 12:32:22 PM PST 24 Jan 17 12:32:28 PM PST 24 18301971 ps
T21 /workspace/coverage/cover_reg_top/0.hmac_tl_errors.2928457134 Jan 17 12:32:13 PM PST 24 Jan 17 12:32:18 PM PST 24 842368840 ps
T22 /workspace/coverage/cover_reg_top/13.hmac_csr_mem_rw_with_rand_reset.4029526495 Jan 17 12:32:14 PM PST 24 Jan 17 12:32:20 PM PST 24 124156518 ps
T29 /workspace/coverage/cover_reg_top/0.hmac_csr_aliasing.1739780891 Jan 17 12:32:12 PM PST 24 Jan 17 12:32:16 PM PST 24 539205174 ps
T30 /workspace/coverage/cover_reg_top/20.hmac_intr_test.1680843858 Jan 17 12:36:06 PM PST 24 Jan 17 12:36:10 PM PST 24 11874250 ps
T23 /workspace/coverage/cover_reg_top/2.hmac_tl_errors.1079269140 Jan 17 12:32:24 PM PST 24 Jan 17 12:32:29 PM PST 24 88828860 ps
T62 /workspace/coverage/cover_reg_top/14.hmac_csr_rw.3187310576 Jan 17 12:32:14 PM PST 24 Jan 17 12:32:18 PM PST 24 35400803 ps
T45 /workspace/coverage/cover_reg_top/6.hmac_intr_test.3553213535 Jan 17 12:32:32 PM PST 24 Jan 17 12:32:33 PM PST 24 13634536 ps
T24 /workspace/coverage/cover_reg_top/3.hmac_csr_mem_rw_with_rand_reset.2002489968 Jan 17 12:32:05 PM PST 24 Jan 17 12:32:08 PM PST 24 33869754 ps
T72 /workspace/coverage/cover_reg_top/2.hmac_csr_aliasing.3600166509 Jan 17 12:32:15 PM PST 24 Jan 17 12:32:20 PM PST 24 1677734271 ps
T73 /workspace/coverage/cover_reg_top/6.hmac_csr_rw.1945072859 Jan 17 12:32:13 PM PST 24 Jan 17 12:32:16 PM PST 24 16810885 ps
T63 /workspace/coverage/cover_reg_top/26.hmac_intr_test.2004188630 Jan 17 12:32:39 PM PST 24 Jan 17 12:32:43 PM PST 24 21873485 ps
T25 /workspace/coverage/cover_reg_top/8.hmac_tl_errors.2989509254 Jan 17 12:32:20 PM PST 24 Jan 17 12:32:29 PM PST 24 226197173 ps
T59 /workspace/coverage/cover_reg_top/2.hmac_tl_intg_err.2645142460 Jan 17 12:32:06 PM PST 24 Jan 17 12:32:09 PM PST 24 78994765 ps
T64 /workspace/coverage/cover_reg_top/3.hmac_csr_hw_reset.2016184574 Jan 17 12:32:04 PM PST 24 Jan 17 12:32:07 PM PST 24 27809610 ps
T65 /workspace/coverage/cover_reg_top/2.hmac_same_csr_outstanding.4024326815 Jan 17 12:32:07 PM PST 24 Jan 17 12:32:09 PM PST 24 199917388 ps
T84 /workspace/coverage/cover_reg_top/17.hmac_same_csr_outstanding.2285575208 Jan 17 12:32:20 PM PST 24 Jan 17 12:32:28 PM PST 24 106145836 ps
T26 /workspace/coverage/cover_reg_top/19.hmac_tl_errors.1604173763 Jan 17 12:32:37 PM PST 24 Jan 17 12:32:41 PM PST 24 69911273 ps
T66 /workspace/coverage/cover_reg_top/7.hmac_same_csr_outstanding.2878046399 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:21 PM PST 24 269976631 ps
T122 /workspace/coverage/cover_reg_top/24.hmac_intr_test.2192846827 Jan 17 12:32:28 PM PST 24 Jan 17 12:32:30 PM PST 24 15860529 ps
T69 /workspace/coverage/cover_reg_top/5.hmac_tl_intg_err.535942524 Jan 17 12:32:30 PM PST 24 Jan 17 12:32:33 PM PST 24 1250851781 ps
T123 /workspace/coverage/cover_reg_top/22.hmac_intr_test.2175470677 Jan 17 12:32:38 PM PST 24 Jan 17 12:32:42 PM PST 24 32447588 ps
T85 /workspace/coverage/cover_reg_top/14.hmac_same_csr_outstanding.1645036529 Jan 17 12:32:21 PM PST 24 Jan 17 12:32:28 PM PST 24 161986845 ps
T86 /workspace/coverage/cover_reg_top/5.hmac_same_csr_outstanding.3157739823 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:27 PM PST 24 184232221 ps
T126 /workspace/coverage/cover_reg_top/4.hmac_intr_test.1417959796 Jan 17 12:32:17 PM PST 24 Jan 17 12:32:20 PM PST 24 41986885 ps
T124 /workspace/coverage/cover_reg_top/16.hmac_intr_test.3388162434 Jan 17 12:32:23 PM PST 24 Jan 17 12:32:28 PM PST 24 20559168 ps
T67 /workspace/coverage/cover_reg_top/7.hmac_tl_intg_err.909871289 Jan 17 12:32:16 PM PST 24 Jan 17 12:32:20 PM PST 24 129199811 ps
T74 /workspace/coverage/cover_reg_top/4.hmac_csr_hw_reset.3964688634 Jan 17 12:32:14 PM PST 24 Jan 17 12:32:18 PM PST 24 28897930 ps
T87 /workspace/coverage/cover_reg_top/5.hmac_csr_rw.3167737696 Jan 17 12:32:36 PM PST 24 Jan 17 12:32:37 PM PST 24 20982295 ps
T70 /workspace/coverage/cover_reg_top/18.hmac_tl_intg_err.250498479 Jan 17 12:32:20 PM PST 24 Jan 17 12:32:29 PM PST 24 375884041 ps
T75 /workspace/coverage/cover_reg_top/9.hmac_csr_rw.3462714188 Jan 17 12:32:23 PM PST 24 Jan 17 12:32:28 PM PST 24 68856460 ps
T76 /workspace/coverage/cover_reg_top/13.hmac_csr_rw.1809090618 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:27 PM PST 24 25729347 ps
T132 /workspace/coverage/cover_reg_top/43.hmac_intr_test.784886347 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:20 PM PST 24 36937527 ps
T133 /workspace/coverage/cover_reg_top/36.hmac_intr_test.2500871556 Jan 17 12:32:26 PM PST 24 Jan 17 12:32:29 PM PST 24 16042761 ps
T134 /workspace/coverage/cover_reg_top/10.hmac_same_csr_outstanding.1573868103 Jan 17 12:32:10 PM PST 24 Jan 17 12:32:12 PM PST 24 47029367 ps
T125 /workspace/coverage/cover_reg_top/30.hmac_intr_test.3132034603 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:27 PM PST 24 162855701 ps
T68 /workspace/coverage/cover_reg_top/16.hmac_tl_intg_err.1295579409 Jan 17 12:32:16 PM PST 24 Jan 17 12:32:20 PM PST 24 217405486 ps
T27 /workspace/coverage/cover_reg_top/1.hmac_csr_mem_rw_with_rand_reset.2682400193 Jan 17 12:32:09 PM PST 24 Jan 17 12:32:12 PM PST 24 91824789 ps
T71 /workspace/coverage/cover_reg_top/13.hmac_tl_intg_err.3091194840 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:28 PM PST 24 462430628 ps
T135 /workspace/coverage/cover_reg_top/37.hmac_intr_test.2184162287 Jan 17 12:32:43 PM PST 24 Jan 17 12:32:44 PM PST 24 18436289 ps
T136 /workspace/coverage/cover_reg_top/29.hmac_intr_test.2248009751 Jan 17 12:32:39 PM PST 24 Jan 17 12:32:43 PM PST 24 30078002 ps
T28 /workspace/coverage/cover_reg_top/6.hmac_tl_errors.2838998800 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:29 PM PST 24 64943080 ps
T137 /workspace/coverage/cover_reg_top/15.hmac_intr_test.1503458341 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:25 PM PST 24 13625960 ps
T138 /workspace/coverage/cover_reg_top/2.hmac_csr_rw.930580780 Jan 17 12:32:14 PM PST 24 Jan 17 12:32:18 PM PST 24 75420944 ps
T139 /workspace/coverage/cover_reg_top/6.hmac_csr_mem_rw_with_rand_reset.1640132731 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:29 PM PST 24 36390318 ps
T77 /workspace/coverage/cover_reg_top/1.hmac_csr_bit_bash.1706993569 Jan 17 12:32:23 PM PST 24 Jan 17 12:32:31 PM PST 24 343166347 ps
T60 /workspace/coverage/cover_reg_top/15.hmac_tl_errors.77622259 Jan 17 12:32:20 PM PST 24 Jan 17 12:32:30 PM PST 24 47540870 ps
T140 /workspace/coverage/cover_reg_top/41.hmac_intr_test.3242313275 Jan 17 12:32:27 PM PST 24 Jan 17 12:32:30 PM PST 24 15525395 ps
T141 /workspace/coverage/cover_reg_top/0.hmac_csr_bit_bash.4085845966 Jan 17 12:32:03 PM PST 24 Jan 17 12:32:10 PM PST 24 260425343 ps
T142 /workspace/coverage/cover_reg_top/48.hmac_intr_test.2648706476 Jan 17 12:32:29 PM PST 24 Jan 17 12:32:30 PM PST 24 17674960 ps
T83 /workspace/coverage/cover_reg_top/8.hmac_csr_rw.2262627293 Jan 17 12:32:28 PM PST 24 Jan 17 12:32:31 PM PST 24 15305854 ps
T78 /workspace/coverage/cover_reg_top/4.hmac_csr_aliasing.1150183340 Jan 17 12:32:11 PM PST 24 Jan 17 12:32:16 PM PST 24 50762771 ps
T143 /workspace/coverage/cover_reg_top/10.hmac_csr_mem_rw_with_rand_reset.3364778858 Jan 17 12:32:22 PM PST 24 Jan 17 12:32:28 PM PST 24 20106040 ps
T144 /workspace/coverage/cover_reg_top/15.hmac_same_csr_outstanding.993431501 Jan 17 12:32:23 PM PST 24 Jan 17 12:32:28 PM PST 24 28358788 ps
T145 /workspace/coverage/cover_reg_top/0.hmac_intr_test.3446158859 Jan 17 12:32:09 PM PST 24 Jan 17 12:32:10 PM PST 24 41724325 ps
T128 /workspace/coverage/cover_reg_top/11.hmac_tl_intg_err.290311251 Jan 17 12:32:29 PM PST 24 Jan 17 12:32:32 PM PST 24 478121672 ps
T146 /workspace/coverage/cover_reg_top/27.hmac_intr_test.1721033238 Jan 17 12:32:40 PM PST 24 Jan 17 12:32:43 PM PST 24 16056249 ps
T147 /workspace/coverage/cover_reg_top/7.hmac_intr_test.3948128632 Jan 17 12:32:15 PM PST 24 Jan 17 12:32:19 PM PST 24 15120847 ps
T148 /workspace/coverage/cover_reg_top/23.hmac_intr_test.1393314544 Jan 17 12:35:47 PM PST 24 Jan 17 12:35:49 PM PST 24 24750872 ps
T149 /workspace/coverage/cover_reg_top/42.hmac_intr_test.3130604289 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:27 PM PST 24 50258889 ps
T150 /workspace/coverage/cover_reg_top/4.hmac_tl_errors.3431596142 Jan 17 12:32:21 PM PST 24 Jan 17 12:32:31 PM PST 24 69600928 ps
T151 /workspace/coverage/cover_reg_top/9.hmac_tl_errors.2558711086 Jan 17 12:32:30 PM PST 24 Jan 17 12:32:34 PM PST 24 705363210 ps
T152 /workspace/coverage/cover_reg_top/39.hmac_intr_test.2158676255 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:27 PM PST 24 17356588 ps
T127 /workspace/coverage/cover_reg_top/14.hmac_tl_intg_err.2267363755 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:28 PM PST 24 77773970 ps
T153 /workspace/coverage/cover_reg_top/18.hmac_tl_errors.1227570386 Jan 17 12:32:27 PM PST 24 Jan 17 12:32:32 PM PST 24 288223193 ps
T154 /workspace/coverage/cover_reg_top/10.hmac_intr_test.372049967 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:27 PM PST 24 15595657 ps
T79 /workspace/coverage/cover_reg_top/19.hmac_csr_rw.189169002 Jan 17 12:32:13 PM PST 24 Jan 17 12:32:16 PM PST 24 18923294 ps
T155 /workspace/coverage/cover_reg_top/19.hmac_intr_test.3810642935 Jan 17 12:32:37 PM PST 24 Jan 17 12:32:40 PM PST 24 59818086 ps
T156 /workspace/coverage/cover_reg_top/19.hmac_tl_intg_err.2936459854 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:29 PM PST 24 980559661 ps
T157 /workspace/coverage/cover_reg_top/46.hmac_intr_test.3289974869 Jan 17 12:32:28 PM PST 24 Jan 17 12:32:30 PM PST 24 109447698 ps
T158 /workspace/coverage/cover_reg_top/2.hmac_intr_test.3029087578 Jan 17 12:32:03 PM PST 24 Jan 17 12:32:04 PM PST 24 33416950 ps
T159 /workspace/coverage/cover_reg_top/11.hmac_same_csr_outstanding.2081225044 Jan 17 12:32:25 PM PST 24 Jan 17 12:32:28 PM PST 24 18655603 ps
T160 /workspace/coverage/cover_reg_top/3.hmac_same_csr_outstanding.3709843258 Jan 17 12:32:06 PM PST 24 Jan 17 12:32:08 PM PST 24 295459042 ps
T161 /workspace/coverage/cover_reg_top/14.hmac_tl_errors.4272918947 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:22 PM PST 24 42005913 ps
T162 /workspace/coverage/cover_reg_top/32.hmac_intr_test.1809924414 Jan 17 12:32:40 PM PST 24 Jan 17 12:32:43 PM PST 24 12314196 ps
T163 /workspace/coverage/cover_reg_top/1.hmac_intr_test.158991686 Jan 17 12:32:00 PM PST 24 Jan 17 12:32:02 PM PST 24 28230190 ps
T164 /workspace/coverage/cover_reg_top/44.hmac_intr_test.2558810964 Jan 17 12:32:21 PM PST 24 Jan 17 12:32:28 PM PST 24 107366020 ps
T165 /workspace/coverage/cover_reg_top/16.hmac_same_csr_outstanding.3836392830 Jan 17 12:32:26 PM PST 24 Jan 17 12:32:30 PM PST 24 58438025 ps
T166 /workspace/coverage/cover_reg_top/0.hmac_same_csr_outstanding.127546450 Jan 17 12:32:08 PM PST 24 Jan 17 12:32:10 PM PST 24 25421216 ps
T167 /workspace/coverage/cover_reg_top/25.hmac_intr_test.3133187989 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:20 PM PST 24 17026638 ps
T168 /workspace/coverage/cover_reg_top/10.hmac_tl_intg_err.2703401595 Jan 17 12:32:12 PM PST 24 Jan 17 12:32:16 PM PST 24 61887489 ps
T169 /workspace/coverage/cover_reg_top/12.hmac_tl_errors.2835383279 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:30 PM PST 24 298993242 ps
T170 /workspace/coverage/cover_reg_top/0.hmac_csr_hw_reset.1468461167 Jan 17 12:32:23 PM PST 24 Jan 17 12:32:28 PM PST 24 16550397 ps
T171 /workspace/coverage/cover_reg_top/12.hmac_csr_mem_rw_with_rand_reset.2336598417 Jan 17 12:32:23 PM PST 24 Jan 17 12:32:29 PM PST 24 44244891 ps
T172 /workspace/coverage/cover_reg_top/9.hmac_intr_test.587904059 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:27 PM PST 24 29364860 ps
T173 /workspace/coverage/cover_reg_top/4.hmac_same_csr_outstanding.3911173779 Jan 17 12:32:16 PM PST 24 Jan 17 12:32:20 PM PST 24 354587710 ps
T174 /workspace/coverage/cover_reg_top/14.hmac_intr_test.3853808677 Jan 17 12:32:19 PM PST 24 Jan 17 12:32:29 PM PST 24 69537722 ps
T80 /workspace/coverage/cover_reg_top/1.hmac_csr_aliasing.1216057768 Jan 17 12:32:08 PM PST 24 Jan 17 12:32:10 PM PST 24 23019437 ps
T175 /workspace/coverage/cover_reg_top/18.hmac_intr_test.3345211274 Jan 17 12:32:37 PM PST 24 Jan 17 12:32:40 PM PST 24 130702597 ps
T176 /workspace/coverage/cover_reg_top/17.hmac_intr_test.2908889144 Jan 17 12:32:14 PM PST 24 Jan 17 12:32:18 PM PST 24 17412322 ps
T177 /workspace/coverage/cover_reg_top/0.hmac_csr_mem_rw_with_rand_reset.3100882693 Jan 17 12:31:53 PM PST 24 Jan 17 12:31:56 PM PST 24 29601742 ps
T178 /workspace/coverage/cover_reg_top/8.hmac_csr_mem_rw_with_rand_reset.3751175994 Jan 17 12:32:24 PM PST 24 Jan 17 12:32:29 PM PST 24 20585066 ps
T131 /workspace/coverage/cover_reg_top/3.hmac_tl_intg_err.3217441803 Jan 17 12:32:07 PM PST 24 Jan 17 12:32:10 PM PST 24 63977987 ps
T179 /workspace/coverage/cover_reg_top/6.hmac_same_csr_outstanding.2850519259 Jan 17 12:32:10 PM PST 24 Jan 17 12:32:12 PM PST 24 56464230 ps
T180 /workspace/coverage/cover_reg_top/8.hmac_intr_test.2262130211 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:20 PM PST 24 10932492 ps
T81 /workspace/coverage/cover_reg_top/2.hmac_csr_hw_reset.3175743009 Jan 17 12:32:10 PM PST 24 Jan 17 12:32:12 PM PST 24 47672582 ps
T181 /workspace/coverage/cover_reg_top/1.hmac_csr_hw_reset.3314284975 Jan 17 12:32:14 PM PST 24 Jan 17 12:32:18 PM PST 24 30972985 ps
T182 /workspace/coverage/cover_reg_top/7.hmac_csr_rw.2397799740 Jan 17 12:32:18 PM PST 24 Jan 17 12:32:20 PM PST 24 14636583 ps
T1 /workspace/coverage/default/22.hmac_smoke.3176564756 Jan 17 12:50:53 PM PST 24 Jan 17 12:50:56 PM PST 24 214858705 ps
T2 /workspace/coverage/default/197.hmac_stress_all_with_rand_reset.1240154480 Jan 17 12:52:42 PM PST 24 Jan 17 12:54:52 PM PST 24 6587470547 ps
T3 /workspace/coverage/default/12.hmac_long_msg.1902817827 Jan 17 12:50:28 PM PST 24 Jan 17 12:51:30 PM PST 24 1174109507 ps
T10 /workspace/coverage/default/41.hmac_alert_test.1624389354 Jan 17 12:51:43 PM PST 24 Jan 17 12:51:45 PM PST 24 54707570 ps
T8 /workspace/coverage/default/0.hmac_datapath_stress.1328264430 Jan 17 12:50:07 PM PST 24 Jan 17 12:51:35 PM PST 24 1628683428 ps
T6 /workspace/coverage/default/15.hmac_smoke.2427766530 Jan 17 12:50:32 PM PST 24 Jan 17 12:50:36 PM PST 24 1301265644 ps
T7 /workspace/coverage/default/17.hmac_smoke.2191932561 Jan 17 12:50:38 PM PST 24 Jan 17 12:50:42 PM PST 24 365572073 ps
T4 /workspace/coverage/default/68.hmac_stress_all_with_rand_reset.2817966624 Jan 17 12:52:23 PM PST 24 Jan 17 12:58:14 PM PST 24 26735944752 ps
T5 /workspace/coverage/default/57.hmac_stress_all_with_rand_reset.3568930019 Jan 17 12:52:10 PM PST 24 Jan 17 01:19:56 PM PST 24 108790743977 ps
T9 /workspace/coverage/default/10.hmac_test_sha_vectors.2460664637 Jan 17 12:51:00 PM PST 24 Jan 17 12:56:49 PM PST 24 7861182655 ps
T11 /workspace/coverage/default/21.hmac_datapath_stress.3908949919 Jan 17 12:50:41 PM PST 24 Jan 17 12:51:31 PM PST 24 1260686572 ps
T38 /workspace/coverage/default/18.hmac_smoke.2711942716 Jan 17 12:50:33 PM PST 24 Jan 17 12:50:37 PM PST 24 682057343 ps
T31 /workspace/coverage/default/28.hmac_stress_all_with_rand_reset.3354842783 Jan 17 12:51:08 PM PST 24 Jan 17 01:16:54 PM PST 24 91721862798 ps
T39 /workspace/coverage/default/27.hmac_alert_test.2629189225 Jan 17 12:51:04 PM PST 24 Jan 17 12:51:06 PM PST 24 31211778 ps
T32 /workspace/coverage/default/25.hmac_long_msg.1357164794 Jan 17 12:51:03 PM PST 24 Jan 17 12:52:22 PM PST 24 11013785986 ps
T43 /workspace/coverage/default/91.hmac_stress_all_with_rand_reset.2856625357 Jan 17 12:52:26 PM PST 24 Jan 17 12:56:03 PM PST 24 25942162697 ps
T33 /workspace/coverage/default/50.hmac_stress_all_with_rand_reset.2116344620 Jan 17 12:52:04 PM PST 24 Jan 17 02:29:00 PM PST 24 235894559046 ps
T44 /workspace/coverage/default/37.hmac_alert_test.3449415322 Jan 17 12:51:31 PM PST 24 Jan 17 12:51:32 PM PST 24 43646746 ps
T96 /workspace/coverage/default/42.hmac_long_msg.3839767494 Jan 17 12:51:38 PM PST 24 Jan 17 12:52:28 PM PST 24 1951870193 ps
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