Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.60 99.53 98.58 100.00 100.00 99.76 99.49 99.86


Total tests in report: 897
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
50.55 50.55 40.00 40.00 42.39 42.39 56.78 56.78 100.00 100.00 26.59 26.59 81.06 81.06 7.02 7.02 /workspace/coverage/cover_reg_top/4.hmac_csr_aliasing.3276097041
85.91 35.36 98.13 58.13 88.50 46.11 61.31 4.52 100.00 0.00 95.53 68.94 95.45 14.39 62.45 55.43 /workspace/coverage/default/130.hmac_stress_all_with_rand_reset.906747203
94.53 8.62 99.38 1.25 95.84 7.34 88.94 27.64 100.00 0.00 99.06 3.53 97.22 1.77 81.29 18.84 /workspace/coverage/cover_reg_top/12.hmac_csr_mem_rw_with_rand_reset.181312895
96.66 2.13 99.38 0.00 97.37 1.53 94.72 5.78 100.00 0.00 99.06 0.00 97.22 0.00 88.86 7.57 /workspace/coverage/cover_reg_top/3.hmac_intr_test.931673938
97.70 1.04 99.53 0.16 97.81 0.44 97.49 2.76 100.00 0.00 99.53 0.47 97.22 0.00 92.30 3.44 /workspace/coverage/cover_reg_top/2.hmac_tl_intg_err.950071312
98.03 0.33 99.53 0.00 97.81 0.00 97.49 0.00 100.00 0.00 99.53 0.00 97.22 0.00 94.64 2.34 /workspace/coverage/default/129.hmac_stress_all_with_rand_reset.3393606074
98.35 0.32 99.53 0.00 97.81 0.00 99.25 1.76 100.00 0.00 99.53 0.00 97.73 0.51 94.64 0.00 /workspace/coverage/cover_reg_top/13.hmac_csr_rw.850376091
98.55 0.20 99.53 0.00 97.81 0.00 99.25 0.00 100.00 0.00 99.53 0.00 97.73 0.00 96.01 1.38 /workspace/coverage/default/2.hmac_stress_all.2886123342
98.74 0.19 99.53 0.00 97.81 0.00 99.25 0.00 100.00 0.00 99.53 0.00 97.98 0.25 97.11 1.10 /workspace/coverage/cover_reg_top/4.hmac_intr_test.3568569265
98.89 0.14 99.53 0.00 98.03 0.22 99.50 0.25 100.00 0.00 99.53 0.00 98.23 0.25 97.39 0.28 /workspace/coverage/default/0.hmac_sec_cm.3195659693
98.99 0.10 99.53 0.00 98.25 0.22 99.50 0.00 100.00 0.00 99.76 0.24 98.23 0.00 97.66 0.28 /workspace/coverage/default/139.hmac_stress_all_with_rand_reset.868349477
99.07 0.08 99.53 0.00 98.25 0.00 99.75 0.25 100.00 0.00 99.76 0.00 98.23 0.00 97.94 0.28 /workspace/coverage/cover_reg_top/5.hmac_intr_test.1059780312
99.13 0.07 99.53 0.00 98.47 0.22 100.00 0.25 100.00 0.00 99.76 0.00 98.23 0.00 97.94 0.00 /workspace/coverage/default/13.hmac_alert_test.1344470657
99.19 0.06 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.23 0.00 98.35 0.41 /workspace/coverage/default/53.hmac_stress_all_with_rand_reset.2691349705
99.23 0.04 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.23 0.00 98.62 0.28 /workspace/coverage/cover_reg_top/11.hmac_tl_intg_err.3350242377
99.27 0.04 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.23 0.00 98.90 0.28 /workspace/coverage/default/131.hmac_stress_all_with_rand_reset.1510759242
99.31 0.04 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.23 0.00 99.17 0.28 /workspace/coverage/default/78.hmac_stress_all_with_rand_reset.2388119606
99.35 0.04 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.25 99.17 0.00 /workspace/coverage/cover_reg_top/13.hmac_same_csr_outstanding.2493642674
99.37 0.02 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.31 0.14 /workspace/coverage/default/107.hmac_stress_all_with_rand_reset.3300482406
99.39 0.02 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.45 0.14 /workspace/coverage/default/136.hmac_stress_all_with_rand_reset.325672707
99.41 0.02 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.59 0.14 /workspace/coverage/default/161.hmac_stress_all_with_rand_reset.20952529
99.42 0.02 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.72 0.14 /workspace/coverage/default/181.hmac_stress_all_with_rand_reset.3992456317
99.44 0.02 99.53 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.86 0.14 /workspace/coverage/default/55.hmac_stress_all_with_rand_reset.2802614892
99.46 0.02 99.53 0.00 98.58 0.11 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.86 0.00 /workspace/coverage/cover_reg_top/6.hmac_tl_intg_err.2649359540

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.hmac_csr_aliasing.3839394287
/workspace/coverage/cover_reg_top/0.hmac_csr_bit_bash.3402043425
/workspace/coverage/cover_reg_top/0.hmac_csr_hw_reset.407445650
/workspace/coverage/cover_reg_top/0.hmac_csr_mem_rw_with_rand_reset.3708168557
/workspace/coverage/cover_reg_top/0.hmac_csr_rw.221552488
/workspace/coverage/cover_reg_top/0.hmac_intr_test.3011022409
/workspace/coverage/cover_reg_top/0.hmac_same_csr_outstanding.2272893412
/workspace/coverage/cover_reg_top/0.hmac_tl_errors.1802294353
/workspace/coverage/cover_reg_top/0.hmac_tl_intg_err.2106565572
/workspace/coverage/cover_reg_top/1.hmac_csr_aliasing.2504407359
/workspace/coverage/cover_reg_top/1.hmac_csr_bit_bash.3995021343
/workspace/coverage/cover_reg_top/1.hmac_csr_hw_reset.2298085935
/workspace/coverage/cover_reg_top/1.hmac_csr_mem_rw_with_rand_reset.3372174393
/workspace/coverage/cover_reg_top/1.hmac_csr_rw.176661950
/workspace/coverage/cover_reg_top/1.hmac_intr_test.2216033470
/workspace/coverage/cover_reg_top/1.hmac_same_csr_outstanding.1910078863
/workspace/coverage/cover_reg_top/1.hmac_tl_errors.1250511659
/workspace/coverage/cover_reg_top/1.hmac_tl_intg_err.1740546165
/workspace/coverage/cover_reg_top/10.hmac_csr_mem_rw_with_rand_reset.3970751928
/workspace/coverage/cover_reg_top/10.hmac_csr_rw.2830279460
/workspace/coverage/cover_reg_top/10.hmac_intr_test.3090594215
/workspace/coverage/cover_reg_top/10.hmac_same_csr_outstanding.1180421386
/workspace/coverage/cover_reg_top/10.hmac_tl_errors.391780762
/workspace/coverage/cover_reg_top/10.hmac_tl_intg_err.890982083
/workspace/coverage/cover_reg_top/11.hmac_csr_mem_rw_with_rand_reset.1301162887
/workspace/coverage/cover_reg_top/11.hmac_csr_rw.3590506793
/workspace/coverage/cover_reg_top/11.hmac_intr_test.3491487254
/workspace/coverage/cover_reg_top/11.hmac_same_csr_outstanding.2999722571
/workspace/coverage/cover_reg_top/11.hmac_tl_errors.4042381113
/workspace/coverage/cover_reg_top/12.hmac_csr_rw.2427430403
/workspace/coverage/cover_reg_top/12.hmac_intr_test.1308127282
/workspace/coverage/cover_reg_top/12.hmac_same_csr_outstanding.197594078
/workspace/coverage/cover_reg_top/12.hmac_tl_errors.344295629
/workspace/coverage/cover_reg_top/12.hmac_tl_intg_err.3519037142
/workspace/coverage/cover_reg_top/13.hmac_csr_mem_rw_with_rand_reset.2218037779
/workspace/coverage/cover_reg_top/13.hmac_intr_test.2305835503
/workspace/coverage/cover_reg_top/13.hmac_tl_errors.1438453598
/workspace/coverage/cover_reg_top/13.hmac_tl_intg_err.1419951664
/workspace/coverage/cover_reg_top/14.hmac_csr_mem_rw_with_rand_reset.871202720
/workspace/coverage/cover_reg_top/14.hmac_csr_rw.1113477658
/workspace/coverage/cover_reg_top/14.hmac_intr_test.523779620
/workspace/coverage/cover_reg_top/14.hmac_same_csr_outstanding.1316238412
/workspace/coverage/cover_reg_top/14.hmac_tl_errors.4155311237
/workspace/coverage/cover_reg_top/14.hmac_tl_intg_err.1227572263
/workspace/coverage/cover_reg_top/15.hmac_csr_mem_rw_with_rand_reset.2693912706
/workspace/coverage/cover_reg_top/15.hmac_csr_rw.711634056
/workspace/coverage/cover_reg_top/15.hmac_intr_test.243881519
/workspace/coverage/cover_reg_top/15.hmac_same_csr_outstanding.2773764430
/workspace/coverage/cover_reg_top/15.hmac_tl_errors.3798310277
/workspace/coverage/cover_reg_top/15.hmac_tl_intg_err.371451982
/workspace/coverage/cover_reg_top/16.hmac_csr_mem_rw_with_rand_reset.2502376512
/workspace/coverage/cover_reg_top/16.hmac_csr_rw.1548047916
/workspace/coverage/cover_reg_top/16.hmac_intr_test.415749063
/workspace/coverage/cover_reg_top/16.hmac_same_csr_outstanding.292453174
/workspace/coverage/cover_reg_top/16.hmac_tl_errors.3550124853
/workspace/coverage/cover_reg_top/16.hmac_tl_intg_err.2014896013
/workspace/coverage/cover_reg_top/17.hmac_csr_mem_rw_with_rand_reset.3618446057
/workspace/coverage/cover_reg_top/17.hmac_csr_rw.3378381715
/workspace/coverage/cover_reg_top/17.hmac_intr_test.3253898149
/workspace/coverage/cover_reg_top/17.hmac_same_csr_outstanding.3949748645
/workspace/coverage/cover_reg_top/17.hmac_tl_errors.108681620
/workspace/coverage/cover_reg_top/17.hmac_tl_intg_err.1982318292
/workspace/coverage/cover_reg_top/18.hmac_csr_mem_rw_with_rand_reset.1108680361
/workspace/coverage/cover_reg_top/18.hmac_csr_rw.3396020622
/workspace/coverage/cover_reg_top/18.hmac_intr_test.3950295438
/workspace/coverage/cover_reg_top/18.hmac_same_csr_outstanding.3148986673
/workspace/coverage/cover_reg_top/18.hmac_tl_errors.2839153403
/workspace/coverage/cover_reg_top/18.hmac_tl_intg_err.3113274528
/workspace/coverage/cover_reg_top/19.hmac_csr_mem_rw_with_rand_reset.335522507
/workspace/coverage/cover_reg_top/19.hmac_csr_rw.2041824765
/workspace/coverage/cover_reg_top/19.hmac_intr_test.2883682806
/workspace/coverage/cover_reg_top/19.hmac_same_csr_outstanding.566196293
/workspace/coverage/cover_reg_top/19.hmac_tl_errors.3581521853
/workspace/coverage/cover_reg_top/19.hmac_tl_intg_err.2694478105
/workspace/coverage/cover_reg_top/2.hmac_csr_aliasing.912161560
/workspace/coverage/cover_reg_top/2.hmac_csr_bit_bash.2580490447
/workspace/coverage/cover_reg_top/2.hmac_csr_hw_reset.2378672374
/workspace/coverage/cover_reg_top/2.hmac_csr_mem_rw_with_rand_reset.4283902016
/workspace/coverage/cover_reg_top/2.hmac_csr_rw.2426834093
/workspace/coverage/cover_reg_top/2.hmac_intr_test.596521777
/workspace/coverage/cover_reg_top/2.hmac_same_csr_outstanding.3732380855
/workspace/coverage/cover_reg_top/2.hmac_tl_errors.787205204
/workspace/coverage/cover_reg_top/20.hmac_intr_test.633101006
/workspace/coverage/cover_reg_top/21.hmac_intr_test.950023006
/workspace/coverage/cover_reg_top/22.hmac_intr_test.3909101683
/workspace/coverage/cover_reg_top/23.hmac_intr_test.500341080
/workspace/coverage/cover_reg_top/24.hmac_intr_test.294250511
/workspace/coverage/cover_reg_top/25.hmac_intr_test.1869325059
/workspace/coverage/cover_reg_top/26.hmac_intr_test.2992059845
/workspace/coverage/cover_reg_top/27.hmac_intr_test.3030405802
/workspace/coverage/cover_reg_top/28.hmac_intr_test.3484792573
/workspace/coverage/cover_reg_top/29.hmac_intr_test.552478155
/workspace/coverage/cover_reg_top/3.hmac_csr_aliasing.471808715
/workspace/coverage/cover_reg_top/3.hmac_csr_bit_bash.2625654391
/workspace/coverage/cover_reg_top/3.hmac_csr_hw_reset.4235338931
/workspace/coverage/cover_reg_top/3.hmac_csr_mem_rw_with_rand_reset.1310141614
/workspace/coverage/cover_reg_top/3.hmac_csr_rw.985331640
/workspace/coverage/cover_reg_top/3.hmac_same_csr_outstanding.2106201438
/workspace/coverage/cover_reg_top/3.hmac_tl_errors.788887934
/workspace/coverage/cover_reg_top/3.hmac_tl_intg_err.1219691415
/workspace/coverage/cover_reg_top/30.hmac_intr_test.3469382970
/workspace/coverage/cover_reg_top/31.hmac_intr_test.764780638
/workspace/coverage/cover_reg_top/32.hmac_intr_test.3479259058
/workspace/coverage/cover_reg_top/33.hmac_intr_test.3206980183
/workspace/coverage/cover_reg_top/34.hmac_intr_test.1776564190
/workspace/coverage/cover_reg_top/35.hmac_intr_test.802604561
/workspace/coverage/cover_reg_top/36.hmac_intr_test.2449495128
/workspace/coverage/cover_reg_top/37.hmac_intr_test.4263725739
/workspace/coverage/cover_reg_top/38.hmac_intr_test.89513573
/workspace/coverage/cover_reg_top/39.hmac_intr_test.3738660689
/workspace/coverage/cover_reg_top/4.hmac_csr_bit_bash.3060106427
/workspace/coverage/cover_reg_top/4.hmac_csr_hw_reset.3991115631
/workspace/coverage/cover_reg_top/4.hmac_csr_mem_rw_with_rand_reset.3970200641
/workspace/coverage/cover_reg_top/4.hmac_csr_rw.604515755
/workspace/coverage/cover_reg_top/4.hmac_same_csr_outstanding.4187847994
/workspace/coverage/cover_reg_top/4.hmac_tl_errors.3196919398
/workspace/coverage/cover_reg_top/4.hmac_tl_intg_err.106574557
/workspace/coverage/cover_reg_top/40.hmac_intr_test.52645981
/workspace/coverage/cover_reg_top/41.hmac_intr_test.2537164469
/workspace/coverage/cover_reg_top/42.hmac_intr_test.1301661917
/workspace/coverage/cover_reg_top/43.hmac_intr_test.4262018424
/workspace/coverage/cover_reg_top/44.hmac_intr_test.3895323242
/workspace/coverage/cover_reg_top/45.hmac_intr_test.268059143
/workspace/coverage/cover_reg_top/46.hmac_intr_test.232568428
/workspace/coverage/cover_reg_top/47.hmac_intr_test.1854583901
/workspace/coverage/cover_reg_top/48.hmac_intr_test.4254003519
/workspace/coverage/cover_reg_top/49.hmac_intr_test.3775106985
/workspace/coverage/cover_reg_top/5.hmac_csr_mem_rw_with_rand_reset.2192880132
/workspace/coverage/cover_reg_top/5.hmac_csr_rw.2770710419
/workspace/coverage/cover_reg_top/5.hmac_same_csr_outstanding.2011696065
/workspace/coverage/cover_reg_top/5.hmac_tl_errors.3863842361
/workspace/coverage/cover_reg_top/5.hmac_tl_intg_err.3210318024
/workspace/coverage/cover_reg_top/6.hmac_csr_mem_rw_with_rand_reset.1808551387
/workspace/coverage/cover_reg_top/6.hmac_csr_rw.1173151860
/workspace/coverage/cover_reg_top/6.hmac_intr_test.935873585
/workspace/coverage/cover_reg_top/6.hmac_same_csr_outstanding.3460765226
/workspace/coverage/cover_reg_top/6.hmac_tl_errors.3838840181
/workspace/coverage/cover_reg_top/7.hmac_csr_mem_rw_with_rand_reset.875741782
/workspace/coverage/cover_reg_top/7.hmac_csr_rw.804117648
/workspace/coverage/cover_reg_top/7.hmac_intr_test.19190986
/workspace/coverage/cover_reg_top/7.hmac_same_csr_outstanding.1590353704
/workspace/coverage/cover_reg_top/7.hmac_tl_errors.3143507948
/workspace/coverage/cover_reg_top/7.hmac_tl_intg_err.3462532150
/workspace/coverage/cover_reg_top/8.hmac_csr_mem_rw_with_rand_reset.296947593
/workspace/coverage/cover_reg_top/8.hmac_csr_rw.2645644749
/workspace/coverage/cover_reg_top/8.hmac_intr_test.3178000225
/workspace/coverage/cover_reg_top/8.hmac_same_csr_outstanding.1858513898
/workspace/coverage/cover_reg_top/8.hmac_tl_errors.4180964207
/workspace/coverage/cover_reg_top/8.hmac_tl_intg_err.4048608103
/workspace/coverage/cover_reg_top/9.hmac_csr_mem_rw_with_rand_reset.1511069153
/workspace/coverage/cover_reg_top/9.hmac_csr_rw.2317504194
/workspace/coverage/cover_reg_top/9.hmac_intr_test.3746313931
/workspace/coverage/cover_reg_top/9.hmac_same_csr_outstanding.3963315282
/workspace/coverage/cover_reg_top/9.hmac_tl_errors.1117114355
/workspace/coverage/cover_reg_top/9.hmac_tl_intg_err.3795532661
/workspace/coverage/default/0.hmac_alert_test.2289948264
/workspace/coverage/default/0.hmac_back_pressure.2072224670
/workspace/coverage/default/0.hmac_burst_wr.378424575
/workspace/coverage/default/0.hmac_datapath_stress.3980148578
/workspace/coverage/default/0.hmac_error.1144579228
/workspace/coverage/default/0.hmac_long_msg.489890547
/workspace/coverage/default/0.hmac_smoke.1345301368
/workspace/coverage/default/0.hmac_stress_all.211388571
/workspace/coverage/default/0.hmac_stress_all_with_rand_reset.3664780381
/workspace/coverage/default/0.hmac_test_hmac_vectors.78113860
/workspace/coverage/default/0.hmac_test_sha_vectors.3202423418
/workspace/coverage/default/0.hmac_wipe_secret.4113056438
/workspace/coverage/default/1.hmac_alert_test.1362575902
/workspace/coverage/default/1.hmac_back_pressure.4027646625
/workspace/coverage/default/1.hmac_burst_wr.2894269964
/workspace/coverage/default/1.hmac_datapath_stress.1392135901
/workspace/coverage/default/1.hmac_error.2531434323
/workspace/coverage/default/1.hmac_long_msg.485598213
/workspace/coverage/default/1.hmac_sec_cm.859878919
/workspace/coverage/default/1.hmac_smoke.1177608813
/workspace/coverage/default/1.hmac_stress_all.131334681
/workspace/coverage/default/1.hmac_stress_all_with_rand_reset.443918669
/workspace/coverage/default/1.hmac_test_hmac_vectors.3441269011
/workspace/coverage/default/1.hmac_test_sha_vectors.742262364
/workspace/coverage/default/1.hmac_wipe_secret.625093899
/workspace/coverage/default/10.hmac_alert_test.2615251752
/workspace/coverage/default/10.hmac_back_pressure.423953902
/workspace/coverage/default/10.hmac_burst_wr.757622365
/workspace/coverage/default/10.hmac_datapath_stress.4294378510
/workspace/coverage/default/10.hmac_error.894788727
/workspace/coverage/default/10.hmac_long_msg.3830197323
/workspace/coverage/default/10.hmac_smoke.3697169409
/workspace/coverage/default/10.hmac_stress_all.1912143526
/workspace/coverage/default/10.hmac_stress_all_with_rand_reset.1157023045
/workspace/coverage/default/10.hmac_test_hmac_vectors.3681660893
/workspace/coverage/default/10.hmac_test_sha_vectors.3168327753
/workspace/coverage/default/10.hmac_wipe_secret.1024356448
/workspace/coverage/default/100.hmac_stress_all_with_rand_reset.309407810
/workspace/coverage/default/101.hmac_stress_all_with_rand_reset.2199480630
/workspace/coverage/default/102.hmac_stress_all_with_rand_reset.201441137
/workspace/coverage/default/103.hmac_stress_all_with_rand_reset.2991271362
/workspace/coverage/default/104.hmac_stress_all_with_rand_reset.1815611300
/workspace/coverage/default/105.hmac_stress_all_with_rand_reset.3647086160
/workspace/coverage/default/106.hmac_stress_all_with_rand_reset.595482433
/workspace/coverage/default/108.hmac_stress_all_with_rand_reset.2760821907
/workspace/coverage/default/109.hmac_stress_all_with_rand_reset.3836772679
/workspace/coverage/default/11.hmac_alert_test.1374000285
/workspace/coverage/default/11.hmac_back_pressure.982217181
/workspace/coverage/default/11.hmac_burst_wr.1958787859
/workspace/coverage/default/11.hmac_datapath_stress.2837338385
/workspace/coverage/default/11.hmac_error.2908377236
/workspace/coverage/default/11.hmac_long_msg.3091557871
/workspace/coverage/default/11.hmac_smoke.578240687
/workspace/coverage/default/11.hmac_stress_all.2177379261
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/workspace/coverage/default/8.hmac_test_sha_vectors.2805464413
/workspace/coverage/default/8.hmac_wipe_secret.747973201
/workspace/coverage/default/80.hmac_stress_all_with_rand_reset.2516597009
/workspace/coverage/default/81.hmac_stress_all_with_rand_reset.2148224943
/workspace/coverage/default/82.hmac_stress_all_with_rand_reset.2811488019
/workspace/coverage/default/83.hmac_stress_all_with_rand_reset.2010112407
/workspace/coverage/default/84.hmac_stress_all_with_rand_reset.880359224
/workspace/coverage/default/85.hmac_stress_all_with_rand_reset.2070198881
/workspace/coverage/default/86.hmac_stress_all_with_rand_reset.3538432758
/workspace/coverage/default/87.hmac_stress_all_with_rand_reset.723625177
/workspace/coverage/default/88.hmac_stress_all_with_rand_reset.3438474953
/workspace/coverage/default/9.hmac_alert_test.701527540
/workspace/coverage/default/9.hmac_back_pressure.1498655767
/workspace/coverage/default/9.hmac_burst_wr.2308031189
/workspace/coverage/default/9.hmac_datapath_stress.3266508194
/workspace/coverage/default/9.hmac_error.2206590221
/workspace/coverage/default/9.hmac_long_msg.249725673
/workspace/coverage/default/9.hmac_smoke.88788335
/workspace/coverage/default/9.hmac_stress_all.3992700446
/workspace/coverage/default/9.hmac_stress_all_with_rand_reset.39799585
/workspace/coverage/default/9.hmac_test_hmac_vectors.1655274646
/workspace/coverage/default/9.hmac_test_sha_vectors.3030003003
/workspace/coverage/default/9.hmac_wipe_secret.2538471056
/workspace/coverage/default/90.hmac_stress_all_with_rand_reset.3134851670
/workspace/coverage/default/91.hmac_stress_all_with_rand_reset.1996855012
/workspace/coverage/default/92.hmac_stress_all_with_rand_reset.4164644933
/workspace/coverage/default/93.hmac_stress_all_with_rand_reset.1518536674
/workspace/coverage/default/95.hmac_stress_all_with_rand_reset.940955105
/workspace/coverage/default/96.hmac_stress_all_with_rand_reset.3927420818
/workspace/coverage/default/97.hmac_stress_all_with_rand_reset.3087396557
/workspace/coverage/default/98.hmac_stress_all_with_rand_reset.1307618955
/workspace/coverage/default/99.hmac_stress_all_with_rand_reset.3452972073



Total test records in report: 897
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T12 /workspace/coverage/cover_reg_top/4.hmac_csr_aliasing.3276097041 Jan 24 12:57:51 PM PST 24 Jan 24 12:58:17 PM PST 24 511586711 ps
T13 /workspace/coverage/cover_reg_top/13.hmac_csr_mem_rw_with_rand_reset.2218037779 Jan 24 12:58:35 PM PST 24 Jan 24 12:58:49 PM PST 24 64844357 ps
T14 /workspace/coverage/cover_reg_top/7.hmac_intr_test.19190986 Jan 24 01:03:42 PM PST 24 Jan 24 01:04:23 PM PST 24 20703249 ps
T15 /workspace/coverage/cover_reg_top/17.hmac_tl_intg_err.1982318292 Jan 24 12:58:50 PM PST 24 Jan 24 12:59:09 PM PST 24 155124231 ps
T16 /workspace/coverage/cover_reg_top/6.hmac_csr_rw.1173151860 Jan 24 12:57:56 PM PST 24 Jan 24 12:58:23 PM PST 24 13745726 ps
T17 /workspace/coverage/cover_reg_top/1.hmac_csr_rw.176661950 Jan 24 12:57:55 PM PST 24 Jan 24 12:58:21 PM PST 24 17788531 ps
T18 /workspace/coverage/cover_reg_top/12.hmac_csr_mem_rw_with_rand_reset.181312895 Jan 24 12:58:38 PM PST 24 Jan 24 01:02:57 PM PST 24 19354724468 ps
T19 /workspace/coverage/cover_reg_top/0.hmac_tl_intg_err.2106565572 Jan 24 12:57:36 PM PST 24 Jan 24 12:58:01 PM PST 24 147278690 ps
T20 /workspace/coverage/cover_reg_top/33.hmac_intr_test.3206980183 Jan 24 12:59:01 PM PST 24 Jan 24 12:59:27 PM PST 24 45457102 ps
T21 /workspace/coverage/cover_reg_top/38.hmac_intr_test.89513573 Jan 24 12:59:03 PM PST 24 Jan 24 12:59:28 PM PST 24 42762105 ps
T23 /workspace/coverage/cover_reg_top/4.hmac_intr_test.3568569265 Jan 24 12:57:47 PM PST 24 Jan 24 12:58:11 PM PST 24 15638358 ps
T44 /workspace/coverage/cover_reg_top/2.hmac_csr_aliasing.912161560 Jan 24 12:57:50 PM PST 24 Jan 24 12:58:17 PM PST 24 130276432 ps
T59 /workspace/coverage/cover_reg_top/3.hmac_intr_test.931673938 Jan 24 12:57:47 PM PST 24 Jan 24 12:58:11 PM PST 24 31384122 ps
T64 /workspace/coverage/cover_reg_top/7.hmac_csr_rw.804117648 Jan 24 12:58:04 PM PST 24 Jan 24 12:58:28 PM PST 24 81071973 ps
T65 /workspace/coverage/cover_reg_top/0.hmac_csr_hw_reset.407445650 Jan 24 12:57:35 PM PST 24 Jan 24 12:57:59 PM PST 24 89426231 ps
T73 /workspace/coverage/cover_reg_top/42.hmac_intr_test.1301661917 Jan 24 01:19:56 PM PST 24 Jan 24 01:21:00 PM PST 24 13257032 ps
T82 /workspace/coverage/cover_reg_top/2.hmac_intr_test.596521777 Jan 24 12:57:52 PM PST 24 Jan 24 12:58:16 PM PST 24 14854114 ps
T83 /workspace/coverage/cover_reg_top/4.hmac_csr_bit_bash.3060106427 Jan 24 12:57:52 PM PST 24 Jan 24 12:58:19 PM PST 24 293455047 ps
T66 /workspace/coverage/cover_reg_top/4.hmac_csr_rw.604515755 Jan 24 12:57:46 PM PST 24 Jan 24 12:58:10 PM PST 24 40372071 ps
T67 /workspace/coverage/cover_reg_top/3.hmac_csr_hw_reset.4235338931 Jan 24 12:57:51 PM PST 24 Jan 24 12:58:16 PM PST 24 97861076 ps
T22 /workspace/coverage/cover_reg_top/1.hmac_csr_mem_rw_with_rand_reset.3372174393 Jan 24 12:57:50 PM PST 24 Jan 24 12:58:16 PM PST 24 121080998 ps
T134 /workspace/coverage/cover_reg_top/18.hmac_intr_test.3950295438 Jan 24 12:58:45 PM PST 24 Jan 24 12:58:59 PM PST 24 71754900 ps
T68 /workspace/coverage/cover_reg_top/3.hmac_same_csr_outstanding.2106201438 Jan 24 12:57:49 PM PST 24 Jan 24 12:58:14 PM PST 24 107318981 ps
T60 /workspace/coverage/cover_reg_top/2.hmac_tl_intg_err.950071312 Jan 24 01:29:52 PM PST 24 Jan 24 01:30:14 PM PST 24 496122052 ps
T69 /workspace/coverage/cover_reg_top/29.hmac_intr_test.552478155 Jan 24 12:58:57 PM PST 24 Jan 24 12:59:17 PM PST 24 43487019 ps
T75 /workspace/coverage/cover_reg_top/5.hmac_csr_rw.2770710419 Jan 24 01:43:22 PM PST 24 Jan 24 01:43:42 PM PST 24 22782987 ps
T70 /workspace/coverage/cover_reg_top/35.hmac_intr_test.802604561 Jan 24 01:12:38 PM PST 24 Jan 24 01:13:31 PM PST 24 13326251 ps
T76 /workspace/coverage/cover_reg_top/13.hmac_csr_rw.850376091 Jan 24 12:58:39 PM PST 24 Jan 24 12:58:53 PM PST 24 49272688 ps
T141 /workspace/coverage/cover_reg_top/43.hmac_intr_test.4262018424 Jan 24 01:14:21 PM PST 24 Jan 24 01:14:42 PM PST 24 38389856 ps
T24 /workspace/coverage/cover_reg_top/14.hmac_csr_mem_rw_with_rand_reset.871202720 Jan 24 12:58:36 PM PST 24 Jan 24 12:58:49 PM PST 24 67633293 ps
T142 /workspace/coverage/cover_reg_top/39.hmac_intr_test.3738660689 Jan 24 01:08:27 PM PST 24 Jan 24 01:09:01 PM PST 24 12219920 ps
T25 /workspace/coverage/cover_reg_top/7.hmac_csr_mem_rw_with_rand_reset.875741782 Jan 24 12:58:05 PM PST 24 Jan 24 12:58:29 PM PST 24 20624058 ps
T26 /workspace/coverage/cover_reg_top/1.hmac_tl_errors.1250511659 Jan 24 12:57:53 PM PST 24 Jan 24 12:58:18 PM PST 24 59641131 ps
T77 /workspace/coverage/cover_reg_top/19.hmac_csr_rw.2041824765 Jan 24 12:58:57 PM PST 24 Jan 24 12:59:17 PM PST 24 158270958 ps
T61 /workspace/coverage/cover_reg_top/6.hmac_tl_intg_err.2649359540 Jan 24 12:57:57 PM PST 24 Jan 24 12:58:25 PM PST 24 125258806 ps
T143 /workspace/coverage/cover_reg_top/1.hmac_csr_hw_reset.2298085935 Jan 24 12:57:50 PM PST 24 Jan 24 12:58:15 PM PST 24 19686362 ps
T144 /workspace/coverage/cover_reg_top/44.hmac_intr_test.3895323242 Jan 24 12:59:05 PM PST 24 Jan 24 12:59:33 PM PST 24 14647812 ps
T145 /workspace/coverage/cover_reg_top/36.hmac_intr_test.2449495128 Jan 24 12:58:58 PM PST 24 Jan 24 12:59:18 PM PST 24 26731281 ps
T27 /workspace/coverage/cover_reg_top/16.hmac_csr_mem_rw_with_rand_reset.2502376512 Jan 24 12:58:44 PM PST 24 Jan 24 01:07:28 PM PST 24 55170419959 ps
T71 /workspace/coverage/cover_reg_top/15.hmac_tl_intg_err.371451982 Jan 24 12:58:39 PM PST 24 Jan 24 12:58:54 PM PST 24 288083612 ps
T28 /workspace/coverage/cover_reg_top/8.hmac_tl_errors.4180964207 Jan 24 12:58:07 PM PST 24 Jan 24 12:58:32 PM PST 24 46711753 ps
T74 /workspace/coverage/cover_reg_top/3.hmac_tl_intg_err.1219691415 Jan 24 12:57:52 PM PST 24 Jan 24 12:58:17 PM PST 24 47424006 ps
T29 /workspace/coverage/cover_reg_top/13.hmac_tl_errors.1438453598 Jan 24 12:58:41 PM PST 24 Jan 24 12:58:55 PM PST 24 395974387 ps
T85 /workspace/coverage/cover_reg_top/14.hmac_same_csr_outstanding.1316238412 Jan 24 12:58:41 PM PST 24 Jan 24 12:58:55 PM PST 24 81708013 ps
T78 /workspace/coverage/cover_reg_top/17.hmac_csr_rw.3378381715 Jan 24 12:58:43 PM PST 24 Jan 24 12:58:58 PM PST 24 20720539 ps
T30 /workspace/coverage/cover_reg_top/11.hmac_csr_mem_rw_with_rand_reset.1301162887 Jan 24 12:58:25 PM PST 24 Jan 24 12:58:40 PM PST 24 74671838 ps
T146 /workspace/coverage/cover_reg_top/2.hmac_csr_mem_rw_with_rand_reset.4283902016 Jan 24 12:57:51 PM PST 24 Jan 24 12:58:16 PM PST 24 44439294 ps
T62 /workspace/coverage/cover_reg_top/12.hmac_tl_errors.344295629 Jan 24 12:58:28 PM PST 24 Jan 24 12:58:44 PM PST 24 274620582 ps
T79 /workspace/coverage/cover_reg_top/1.hmac_csr_aliasing.2504407359 Jan 24 12:57:45 PM PST 24 Jan 24 12:58:11 PM PST 24 175022256 ps
T147 /workspace/coverage/cover_reg_top/5.hmac_intr_test.1059780312 Jan 24 12:57:54 PM PST 24 Jan 24 12:58:20 PM PST 24 62018159 ps
T80 /workspace/coverage/cover_reg_top/15.hmac_csr_rw.711634056 Jan 24 12:58:39 PM PST 24 Jan 24 12:58:53 PM PST 24 69143304 ps
T72 /workspace/coverage/cover_reg_top/1.hmac_tl_intg_err.1740546165 Jan 24 12:57:53 PM PST 24 Jan 24 12:58:18 PM PST 24 45605297 ps
T148 /workspace/coverage/cover_reg_top/32.hmac_intr_test.3479259058 Jan 24 12:58:56 PM PST 24 Jan 24 12:59:17 PM PST 24 13615887 ps
T149 /workspace/coverage/cover_reg_top/0.hmac_csr_rw.221552488 Jan 24 12:57:38 PM PST 24 Jan 24 12:58:01 PM PST 24 70912589 ps
T86 /workspace/coverage/cover_reg_top/2.hmac_csr_rw.2426834093 Jan 24 01:03:38 PM PST 24 Jan 24 01:04:13 PM PST 24 18629989 ps
T150 /workspace/coverage/cover_reg_top/13.hmac_tl_intg_err.1419951664 Jan 24 12:58:37 PM PST 24 Jan 24 12:58:51 PM PST 24 114319623 ps
T63 /workspace/coverage/cover_reg_top/19.hmac_tl_errors.3581521853 Jan 24 12:58:58 PM PST 24 Jan 24 12:59:21 PM PST 24 498626902 ps
T151 /workspace/coverage/cover_reg_top/30.hmac_intr_test.3469382970 Jan 24 12:59:05 PM PST 24 Jan 24 12:59:33 PM PST 24 63628503 ps
T87 /workspace/coverage/cover_reg_top/2.hmac_same_csr_outstanding.3732380855 Jan 24 12:57:54 PM PST 24 Jan 24 12:58:20 PM PST 24 79793515 ps
T152 /workspace/coverage/cover_reg_top/18.hmac_tl_intg_err.3113274528 Jan 24 12:58:49 PM PST 24 Jan 24 12:59:07 PM PST 24 263474803 ps
T153 /workspace/coverage/cover_reg_top/0.hmac_tl_errors.1802294353 Jan 24 12:57:38 PM PST 24 Jan 24 12:58:04 PM PST 24 483553030 ps
T154 /workspace/coverage/cover_reg_top/13.hmac_intr_test.2305835503 Jan 24 12:58:37 PM PST 24 Jan 24 12:58:50 PM PST 24 47245758 ps
T155 /workspace/coverage/cover_reg_top/11.hmac_intr_test.3491487254 Jan 24 12:58:25 PM PST 24 Jan 24 12:58:38 PM PST 24 25142965 ps
T156 /workspace/coverage/cover_reg_top/15.hmac_intr_test.243881519 Jan 24 12:58:34 PM PST 24 Jan 24 12:58:48 PM PST 24 55068364 ps
T157 /workspace/coverage/cover_reg_top/7.hmac_tl_errors.3143507948 Jan 24 01:15:38 PM PST 24 Jan 24 01:16:28 PM PST 24 121457790 ps
T88 /workspace/coverage/cover_reg_top/16.hmac_same_csr_outstanding.292453174 Jan 24 12:58:48 PM PST 24 Jan 24 12:59:05 PM PST 24 30266470 ps
T158 /workspace/coverage/cover_reg_top/10.hmac_intr_test.3090594215 Jan 24 12:58:19 PM PST 24 Jan 24 12:58:36 PM PST 24 32914020 ps
T159 /workspace/coverage/cover_reg_top/21.hmac_intr_test.950023006 Jan 24 12:58:58 PM PST 24 Jan 24 12:59:18 PM PST 24 16473708 ps
T160 /workspace/coverage/cover_reg_top/10.hmac_csr_mem_rw_with_rand_reset.3970751928 Jan 24 12:58:27 PM PST 24 Jan 24 01:02:30 PM PST 24 17060809244 ps
T161 /workspace/coverage/cover_reg_top/9.hmac_intr_test.3746313931 Jan 24 12:58:20 PM PST 24 Jan 24 12:58:37 PM PST 24 47163936 ps
T162 /workspace/coverage/cover_reg_top/22.hmac_intr_test.3909101683 Jan 24 12:58:58 PM PST 24 Jan 24 12:59:18 PM PST 24 30320802 ps
T163 /workspace/coverage/cover_reg_top/34.hmac_intr_test.1776564190 Jan 24 12:59:01 PM PST 24 Jan 24 12:59:27 PM PST 24 44832698 ps
T164 /workspace/coverage/cover_reg_top/10.hmac_tl_intg_err.890982083 Jan 24 12:58:28 PM PST 24 Jan 24 12:58:42 PM PST 24 99147182 ps
T165 /workspace/coverage/cover_reg_top/8.hmac_tl_intg_err.4048608103 Jan 24 12:58:05 PM PST 24 Jan 24 12:58:30 PM PST 24 1569992904 ps
T166 /workspace/coverage/cover_reg_top/6.hmac_intr_test.935873585 Jan 24 01:19:53 PM PST 24 Jan 24 01:20:55 PM PST 24 37543665 ps
T84 /workspace/coverage/cover_reg_top/4.hmac_csr_hw_reset.3991115631 Jan 24 12:57:48 PM PST 24 Jan 24 12:58:11 PM PST 24 112722528 ps
T167 /workspace/coverage/cover_reg_top/19.hmac_csr_mem_rw_with_rand_reset.335522507 Jan 24 12:58:57 PM PST 24 Jan 24 12:59:18 PM PST 24 33655403 ps
T140 /workspace/coverage/cover_reg_top/3.hmac_csr_mem_rw_with_rand_reset.1310141614 Jan 24 12:57:51 PM PST 24 Jan 24 12:58:16 PM PST 24 80861083 ps
T168 /workspace/coverage/cover_reg_top/15.hmac_tl_errors.3798310277 Jan 24 12:58:41 PM PST 24 Jan 24 12:58:57 PM PST 24 592700682 ps
T135 /workspace/coverage/cover_reg_top/19.hmac_tl_intg_err.2694478105 Jan 24 12:58:57 PM PST 24 Jan 24 12:59:18 PM PST 24 111372560 ps
T137 /workspace/coverage/cover_reg_top/14.hmac_tl_intg_err.1227572263 Jan 24 12:58:35 PM PST 24 Jan 24 12:58:49 PM PST 24 1158300702 ps
T169 /workspace/coverage/cover_reg_top/27.hmac_intr_test.3030405802 Jan 24 12:59:03 PM PST 24 Jan 24 12:59:28 PM PST 24 14212717 ps
T170 /workspace/coverage/cover_reg_top/16.hmac_tl_errors.3550124853 Jan 24 12:58:37 PM PST 24 Jan 24 12:58:52 PM PST 24 863707369 ps
T171 /workspace/coverage/cover_reg_top/1.hmac_intr_test.2216033470 Jan 24 12:57:52 PM PST 24 Jan 24 12:58:16 PM PST 24 16029095 ps
T172 /workspace/coverage/cover_reg_top/2.hmac_tl_errors.787205204 Jan 24 12:57:48 PM PST 24 Jan 24 12:58:12 PM PST 24 227770821 ps
T173 /workspace/coverage/cover_reg_top/40.hmac_intr_test.52645981 Jan 24 12:59:03 PM PST 24 Jan 24 12:59:28 PM PST 24 46021421 ps
T81 /workspace/coverage/cover_reg_top/8.hmac_csr_rw.2645644749 Jan 24 01:36:54 PM PST 24 Jan 24 01:37:32 PM PST 24 40205187 ps
T89 /workspace/coverage/cover_reg_top/13.hmac_same_csr_outstanding.2493642674 Jan 24 12:58:35 PM PST 24 Jan 24 12:58:48 PM PST 24 95002537 ps
T174 /workspace/coverage/cover_reg_top/28.hmac_intr_test.3484792573 Jan 24 12:59:01 PM PST 24 Jan 24 12:59:25 PM PST 24 23793234 ps
T175 /workspace/coverage/cover_reg_top/18.hmac_csr_rw.3396020622 Jan 24 12:58:42 PM PST 24 Jan 24 12:58:56 PM PST 24 28749512 ps
T90 /workspace/coverage/cover_reg_top/8.hmac_same_csr_outstanding.1858513898 Jan 24 12:58:08 PM PST 24 Jan 24 12:58:30 PM PST 24 16178880 ps
T176 /workspace/coverage/cover_reg_top/5.hmac_tl_intg_err.3210318024 Jan 24 12:57:57 PM PST 24 Jan 24 12:58:25 PM PST 24 191243026 ps
T177 /workspace/coverage/cover_reg_top/14.hmac_csr_rw.1113477658 Jan 24 12:58:36 PM PST 24 Jan 24 12:58:48 PM PST 24 94438338 ps
T178 /workspace/coverage/cover_reg_top/10.hmac_tl_errors.391780762 Jan 24 12:58:20 PM PST 24 Jan 24 12:58:39 PM PST 24 121044058 ps
T179 /workspace/coverage/cover_reg_top/18.hmac_tl_errors.2839153403 Jan 24 12:58:51 PM PST 24 Jan 24 12:59:11 PM PST 24 412478059 ps
T180 /workspace/coverage/cover_reg_top/3.hmac_csr_bit_bash.2625654391 Jan 24 12:57:51 PM PST 24 Jan 24 12:58:21 PM PST 24 445715916 ps
T181 /workspace/coverage/cover_reg_top/6.hmac_tl_errors.3838840181 Jan 24 01:14:34 PM PST 24 Jan 24 01:15:02 PM PST 24 526825814 ps
T1 /workspace/coverage/default/6.hmac_long_msg.344544604 Jan 24 11:26:56 PM PST 24 Jan 24 11:28:23 PM PST 24 24270570720 ps
T2 /workspace/coverage/default/139.hmac_stress_all_with_rand_reset.868349477 Jan 24 11:40:47 PM PST 24 Jan 24 11:46:47 PM PST 24 24125121509 ps
T3 /workspace/coverage/default/40.hmac_long_msg.2293850880 Jan 24 11:35:13 PM PST 24 Jan 24 11:35:40 PM PST 24 2902703040 ps
T6 /workspace/coverage/default/3.hmac_datapath_stress.3538713453 Jan 24 11:25:58 PM PST 24 Jan 24 11:27:36 PM PST 24 1726399735 ps
T7 /workspace/coverage/default/8.hmac_datapath_stress.692401538 Jan 24 11:26:54 PM PST 24 Jan 24 11:29:08 PM PST 24 2516807061 ps
T8 /workspace/coverage/default/14.hmac_datapath_stress.4200787770 Jan 25 12:40:40 AM PST 24 Jan 25 12:42:02 AM PST 24 5740249659 ps
T9 /workspace/coverage/default/48.hmac_test_sha_vectors.3016569380 Jan 24 11:37:14 PM PST 24 Jan 24 11:44:20 PM PST 24 25347222423 ps
T10 /workspace/coverage/default/33.hmac_datapath_stress.241810381 Jan 24 11:33:19 PM PST 24 Jan 24 11:34:57 PM PST 24 27131879532 ps
T4 /workspace/coverage/default/130.hmac_stress_all_with_rand_reset.906747203 Jan 24 11:40:00 PM PST 24 Jan 25 12:15:43 AM PST 24 77792570884 ps
T11 /workspace/coverage/default/22.hmac_alert_test.1786880069 Jan 24 11:29:58 PM PST 24 Jan 24 11:30:03 PM PST 24 30685653 ps
T5 /workspace/coverage/default/194.hmac_stress_all_with_rand_reset.359994408 Jan 25 01:17:15 AM PST 24 Jan 25 02:06:55 AM PST 24 51013535150 ps
T37 /workspace/coverage/default/44.hmac_stress_all.810619680 Jan 24 11:36:25 PM PST 24 Jan 24 11:36:50 PM PST 24 4983114066 ps
T38 /workspace/coverage/default/28.hmac_smoke.853871887 Jan 24 11:31:26 PM PST 24 Jan 24 11:31:30 PM PST 24 271333115 ps
T42 /workspace/coverage/default/45.hmac_alert_test.2247339685 Jan 24 11:36:41 PM PST 24 Jan 24 11:36:44 PM PST 24 22865234 ps
T91 /workspace/coverage/default/11.hmac_stress_all_with_rand_reset.4098168569 Jan 24 11:27:46 PM PST 24 Jan 24 11:44:08 PM PST 24 130251626960 ps
T139 /workspace/coverage/default/35.hmac_wipe_secret.2426396750 Jan 24 11:33:34 PM PST 24 Jan 24 11:34:28 PM PST 24 1385197768 ps
T182 /workspace/coverage/default/9.hmac_test_sha_vectors.3030003003 Jan 24 11:27:12 PM PST 24 Jan 24 11:34:48 PM PST 24 27106037271 ps
T131 /workspace/coverage/default/22.hmac_long_msg.1943396778 Jan 24 11:30:00 PM PST 24 Jan 24 11:31:56 PM PST 24 5876676039 ps
T31 /workspace/coverage/default/22.hmac_back_pressure.118441145 Jan 24 11:30:00 PM PST 24 Jan 24 11:30:42 PM PST 24 2023082474 ps
T32 /workspace/coverage/default/5.hmac_datapath_stress.563285819 Jan 24 11:26:23 PM PST 24 Jan 24 11:28:39 PM PST 24 9462272560 ps
T33 /workspace/coverage/default/34.hmac_back_pressure.3630457046 Jan 24 11:33:17 PM PST 24 Jan 24 11:34:11 PM PST 24 7424849055 ps
T104 /workspace/coverage/default/30.hmac_stress_all_with_rand_reset.2425764001 Jan 24 11:32:18 PM PST 24 Jan 24 11:40:03 PM PST 24 70786807371 ps
T34 /workspace/coverage/default/11.hmac_datapath_stress.2837338385 Jan 24 11:27:33 PM PST 24 Jan 24 11:28:37 PM PST 24 2505127091 ps
T183 /workspace/coverage/default/63.hmac_stress_all_with_rand_reset.1583823126 Jan 24 11:38:12 PM PST 24 Jan 24 11:44:51 PM PST 24 56411675505 ps
T92 /workspace/coverage/default/31.hmac_error.1560106519 Jan 24 11:32:42 PM PST 24 Jan 24 11:33:41 PM PST 24 8986035671 ps
T105 /workspace/coverage/default/28.hmac_long_msg.5968933 Jan 24 11:31:43 PM PST 24 Jan 24 11:32:25 PM PST 24 2389000739 ps
T35 /workspace/coverage/default/178.hmac_stress_all_with_rand_reset.432590094 Jan 24 11:43:43 PM PST 24 Jan 24 11:58:30 PM PST 24 125166481235 ps
T184 /workspace/coverage/default/17.hmac_datapath_stress.2225515675 Jan 24 11:28:52 PM PST 24 Jan 24 11:29:21 PM PST 24 2014761828 ps
T36 /workspace/coverage/default/41.hmac_back_pressure.3610567652 Jan 24 11:35:37 PM PST 24 Jan 24 11:35:56 PM PST 24 1654032593 ps
T43 /workspace/coverage/default/35.hmac_alert_test.325002648 Jan 25 05:28:16 AM PST 24 Jan 25 05:28:18 AM PST 24 34336780 ps
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