Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 39159288 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 39518226 1 T1 2 T2 494293 T3 31415



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 31465873 1 T1 1 T2 387632 T3 28104
values[0x0] 22057447 1 T1 2 T2 273004 T3 18559
values[0x1] 25154194 1 T1 7 T2 302951 T3 22794



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 29337260 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 49340254 1 T1 3 T2 602578 T3 41667



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 264705 1 T2 9 T3 259 T4 2808
valid_sources[0x01] 257362 1 T2 95 T3 284 T4 2721
valid_sources[0x02] 273669 1 T2 69 T3 324 T4 2725
valid_sources[0x03] 659071 1 T2 404179 T3 304 T4 2839
valid_sources[0x04] 267405 1 T2 125 T3 292 T4 2831
valid_sources[0x05] 606293 1 T2 61 T3 303 T4 2785
valid_sources[0x06] 259954 1 T2 76 T3 229 T4 2805
valid_sources[0x07] 1008260 1 T2 37 T3 326 T4 2710
valid_sources[0x08] 299506 1 T2 11 T3 264 T4 2772
valid_sources[0x09] 285606 1 T2 62 T3 199 T4 2838
valid_sources[0x0a] 276490 1 T2 32 T3 276 T4 2784
valid_sources[0x0b] 268421 1 T2 65 T3 251 T4 2814
valid_sources[0x0c] 261301 1 T2 31 T3 295 T4 2763
valid_sources[0x0d] 259843 1 T2 43 T3 253 T4 2780
valid_sources[0x0e] 309794 1 T2 5801 T3 257 T4 2795
valid_sources[0x0f] 256949 1 T2 82 T3 391 T4 2752
valid_sources[0x10] 265022 1 T2 48 T3 210 T4 2841
valid_sources[0x11] 281451 1 T2 96 T3 225 T4 2725
valid_sources[0x12] 257636 1 T2 75 T3 288 T4 2829
valid_sources[0x13] 305467 1 T2 104 T3 226 T4 2792
valid_sources[0x14] 275314 1 T2 49 T3 365 T4 2910
valid_sources[0x15] 273906 1 T2 113 T3 196 T4 2825
valid_sources[0x16] 285394 1 T2 63 T3 278 T4 2829
valid_sources[0x17] 352238 1 T2 97 T3 383 T4 2799
valid_sources[0x18] 267923 1 T2 74 T3 219 T4 2801
valid_sources[0x19] 263547 1 T2 100 T3 281 T4 2696
valid_sources[0x1a] 288604 1 T2 72 T3 292 T4 2755
valid_sources[0x1b] 287623 1 T2 146 T3 303 T4 2834
valid_sources[0x1c] 282620 1 T2 37 T3 312 T4 2789
valid_sources[0x1d] 262546 1 T2 33 T3 310 T4 2876
valid_sources[0x1e] 284702 1 T2 280 T3 231 T4 2713
valid_sources[0x1f] 263134 1 T2 106 T3 329 T4 2708
valid_sources[0x20] 270831 1 T2 3496 T3 282 T4 2681
valid_sources[0x21] 273083 1 T2 19 T3 224 T4 2631
valid_sources[0x22] 257596 1 T2 29 T3 188 T4 2748
valid_sources[0x23] 260477 1 T2 78 T3 275 T4 2825
valid_sources[0x24] 273067 1 T2 21 T3 204 T4 2665
valid_sources[0x25] 262786 1 T2 40 T3 204 T4 2693
valid_sources[0x26] 261498 1 T2 106 T3 253 T4 2851
valid_sources[0x27] 274748 1 T2 62 T3 280 T4 2755
valid_sources[0x28] 280640 1 T2 31 T3 271 T4 2790
valid_sources[0x29] 273197 1 T2 45 T3 216 T4 2787
valid_sources[0x2a] 280569 1 T2 55 T3 295 T4 2748
valid_sources[0x2b] 260718 1 T2 12 T3 228 T4 2829
valid_sources[0x2c] 594346 1 T2 112 T3 303 T4 2825
valid_sources[0x2d] 276400 1 T2 31 T3 259 T4 2763
valid_sources[0x2e] 317468 1 T2 77 T3 262 T4 2825
valid_sources[0x2f] 273591 1 T2 100 T3 310 T4 2688
valid_sources[0x30] 266090 1 T2 98 T3 291 T4 2696
valid_sources[0x31] 285467 1 T2 52 T3 203 T4 2830
valid_sources[0x32] 272663 1 T2 29 T3 233 T4 2784
valid_sources[0x33] 264988 1 T2 53 T3 314 T4 2752
valid_sources[0x34] 267769 1 T2 63 T3 238 T4 2710
valid_sources[0x35] 265277 1 T2 31 T3 261 T4 2781
valid_sources[0x36] 282744 1 T2 50 T3 295 T4 2776
valid_sources[0x37] 286266 1 T2 61 T3 237 T4 2736
valid_sources[0x38] 282918 1 T2 42 T3 260 T4 2727
valid_sources[0x39] 257117 1 T2 113 T3 354 T4 2685
valid_sources[0x3a] 307377 1 T2 251 T3 239 T4 2891
valid_sources[0x3b] 283389 1 T2 24 T3 286 T4 2839
valid_sources[0x3c] 273846 1 T2 52 T3 359 T4 2883
valid_sources[0x3d] 277874 1 T2 76 T3 213 T4 2702
valid_sources[0x3e] 307787 1 T2 112 T3 275 T4 2798
valid_sources[0x3f] 294009 1 T2 37 T3 286 T4 2788
valid_sources[0x40] 264320 1 T2 48 T3 241 T4 2733
valid_sources[0x41] 277834 1 T2 65 T3 215 T4 2697
valid_sources[0x42] 267581 1 T2 448 T3 275 T4 2788
valid_sources[0x43] 280737 1 T2 70 T3 307 T4 2864
valid_sources[0x44] 278042 1 T2 36 T3 238 T4 2766
valid_sources[0x45] 294254 1 T2 43 T3 244 T4 2711
valid_sources[0x46] 285310 1 T2 3392 T3 266 T4 2827
valid_sources[0x47] 262264 1 T2 58 T3 236 T4 2734
valid_sources[0x48] 266672 1 T2 135 T3 269 T4 2635
valid_sources[0x49] 289685 1 T2 27 T3 243 T4 2811
valid_sources[0x4a] 272856 1 T2 44 T3 249 T4 2774
valid_sources[0x4b] 265469 1 T2 39 T3 293 T4 2731
valid_sources[0x4c] 263920 1 T2 100 T3 221 T4 2662
valid_sources[0x4d] 286150 1 T2 114 T3 249 T4 2790
valid_sources[0x4e] 654396 1 T2 75 T3 273 T4 2818
valid_sources[0x4f] 274478 1 T2 853 T3 268 T4 2662
valid_sources[0x50] 265730 1 T2 86 T3 242 T4 2717
valid_sources[0x51] 260804 1 T2 227 T3 233 T4 2706
valid_sources[0x52] 268603 1 T2 27 T3 262 T4 2826
valid_sources[0x53] 265019 1 T2 41 T3 263 T4 2756
valid_sources[0x54] 666189 1 T2 348 T3 288 T4 2675
valid_sources[0x55] 283400 1 T2 190 T3 288 T4 2766
valid_sources[0x56] 265902 1 T2 53 T3 301 T4 2735
valid_sources[0x57] 259674 1 T2 60 T3 370 T4 2669
valid_sources[0x58] 260673 1 T2 95 T3 285 T4 2796
valid_sources[0x59] 275621 1 T2 107 T3 305 T4 2791
valid_sources[0x5a] 262612 1 T2 18 T3 360 T4 2779
valid_sources[0x5b] 255875 1 T2 48 T3 353 T4 2721
valid_sources[0x5c] 273150 1 T2 91 T3 285 T4 2694
valid_sources[0x5d] 268020 1 T2 7868 T3 261 T4 2789
valid_sources[0x5e] 278696 1 T2 145 T3 249 T4 2680
valid_sources[0x5f] 290366 1 T2 42 T3 291 T4 2694
valid_sources[0x60] 269476 1 T2 72 T3 271 T4 2739
valid_sources[0x61] 272476 1 T2 54 T3 225 T4 2705
valid_sources[0x62] 283266 1 T2 60 T3 222 T4 2835
valid_sources[0x63] 282589 1 T2 844 T3 312 T4 2730
valid_sources[0x64] 265453 1 T2 91 T3 211 T4 2798
valid_sources[0x65] 285387 1 T2 55 T3 254 T4 2738
valid_sources[0x66] 398714 1 T2 28 T3 253 T4 2748
valid_sources[0x67] 269488 1 T2 86 T3 319 T4 2736
valid_sources[0x68] 332501 1 T2 89 T3 218 T4 2769
valid_sources[0x69] 260903 1 T2 65 T3 224 T4 2821
valid_sources[0x6a] 273366 1 T2 70 T3 239 T4 2770
valid_sources[0x6b] 308028 1 T2 80 T3 245 T4 2814
valid_sources[0x6c] 260082 1 T2 4 T3 311 T4 2848
valid_sources[0x6d] 290390 1 T2 42 T3 233 T4 2687
valid_sources[0x6e] 277973 1 T2 86 T3 229 T4 2770
valid_sources[0x6f] 266628 1 T2 40 T3 310 T4 2798
valid_sources[0x70] 271649 1 T2 42 T3 305 T4 2753
valid_sources[0x71] 277956 1 T2 5301 T3 305 T4 2731
valid_sources[0x72] 279848 1 T2 86 T3 195 T4 2798
valid_sources[0x73] 636355 1 T2 49 T3 270 T4 2685
valid_sources[0x74] 275225 1 T2 114 T3 332 T4 2710
valid_sources[0x75] 262377 1 T2 59 T3 294 T4 2758
valid_sources[0x76] 265393 1 T2 68 T3 214 T4 2821
valid_sources[0x77] 265425 1 T2 17 T3 308 T4 2802
valid_sources[0x78] 287694 1 T2 63 T3 239 T4 2681
valid_sources[0x79] 277900 1 T2 13 T3 308 T4 2886
valid_sources[0x7a] 261315 1 T2 127 T3 227 T4 2716
valid_sources[0x7b] 263667 1 T2 67 T3 301 T4 2779
valid_sources[0x7c] 261031 1 T2 70 T3 264 T4 2656
valid_sources[0x7d] 267202 1 T2 166 T3 253 T4 2708
valid_sources[0x7e] 278475 1 T2 50 T3 290 T4 2909
valid_sources[0x7f] 263980 1 T2 126 T3 232 T4 2870
valid_sources[0x80] 281306 1 T2 42 T3 296 T4 2772



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 15178594 1 T2 193647 T3 14026 T4 139869
values[0x0] all_enables biggest_size 12811926 1 T1 1 T2 158253 T3 9364
values[0x1] all_enables biggest_size 11527706 1 T1 1 T2 142393 T3 8025

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%