Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	18381941	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

19675136

1

T1

2747

T2

158

T3

198965

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14961418	1			T1	2167		T2	127		T3	157893
values[0x0]	10767492	1			T1	1120		T2	81		T3	110040
values[0x1]	12328167	1			T1	1203		T2	92		T3	122272

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13632955	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

24424122

1

T1

3167

T2

196

T3

246102

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	129232	1			T1	17		T2	1		T3	1620
valid_sources[0x01]	136804	1			T1	15		T2	3		T3	1502
valid_sources[0x02]	125517	1			T1	18		T3	1562		T4	822
valid_sources[0x03]	145621	1			T1	22		T3	1548		T4	1349
valid_sources[0x04]	176000	1			T1	11		T3	1520		T4	977
valid_sources[0x05]	141321	1			T1	20		T2	1		T3	1532
valid_sources[0x06]	184904	1			T1	13		T2	2		T3	1526
valid_sources[0x07]	125336	1			T1	12		T3	1503		T4	579
valid_sources[0x08]	131899	1			T1	12		T3	1518		T4	590
valid_sources[0x09]	128813	1			T1	19		T3	1470		T4	733
valid_sources[0x0a]	215395	1			T1	21		T2	4		T3	1503
valid_sources[0x0b]	156821	1			T1	13		T3	1433		T4	7825
valid_sources[0x0c]	157576	1			T1	19		T3	1582		T4	2701
valid_sources[0x0d]	127185	1			T1	15		T3	1474		T4	1588
valid_sources[0x0e]	215574	1			T1	17		T2	5		T3	1527
valid_sources[0x0f]	136252	1			T1	18		T3	1563		T4	507
valid_sources[0x10]	138056	1			T1	18		T2	6		T3	1590
valid_sources[0x11]	164215	1			T1	16		T2	4		T3	1482
valid_sources[0x12]	127291	1			T1	24		T2	3		T3	1581
valid_sources[0x13]	183511	1			T1	14		T3	1472		T4	695
valid_sources[0x14]	146058	1			T1	25		T3	1509		T4	1380
valid_sources[0x15]	127170	1			T1	12		T3	1587		T4	914
valid_sources[0x16]	170833	1			T1	15		T3	1585		T4	824
valid_sources[0x17]	207299	1			T1	26		T3	1439		T4	800
valid_sources[0x18]	124035	1			T1	13		T2	1		T3	1578
valid_sources[0x19]	191738	1			T1	15		T2	2		T3	1523
valid_sources[0x1a]	144238	1			T1	14		T2	2		T3	1573
valid_sources[0x1b]	138175	1			T1	15		T3	1504		T4	738
valid_sources[0x1c]	123415	1			T1	16		T3	1595		T4	600
valid_sources[0x1d]	193852	1			T1	12		T2	1		T3	1506
valid_sources[0x1e]	133180	1			T1	14		T2	1		T3	1584
valid_sources[0x1f]	133410	1			T1	17		T2	2		T3	1525
valid_sources[0x20]	135974	1			T1	24		T3	1507		T4	677
valid_sources[0x21]	185848	1			T1	13		T2	1		T3	1543
valid_sources[0x22]	140655	1			T1	16		T3	1534		T4	886
valid_sources[0x23]	137614	1			T1	14		T2	3		T3	1495
valid_sources[0x24]	126389	1			T1	15		T3	1503		T4	596
valid_sources[0x25]	144683	1			T1	18		T2	4		T3	1566
valid_sources[0x26]	209490	1			T1	19		T2	1		T3	1572
valid_sources[0x27]	129862	1			T1	18		T3	1557		T4	693
valid_sources[0x28]	123894	1			T1	11		T2	2		T3	1454
valid_sources[0x29]	154372	1			T1	15		T2	1		T3	1646
valid_sources[0x2a]	139352	1			T1	22		T2	1		T3	1559
valid_sources[0x2b]	127116	1			T1	21		T2	3		T3	1610
valid_sources[0x2c]	145270	1			T1	20		T3	1546		T4	756
valid_sources[0x2d]	139901	1			T1	17		T2	1		T3	1669
valid_sources[0x2e]	144439	1			T1	12		T3	1686		T4	969
valid_sources[0x2f]	132169	1			T1	18		T2	2		T3	1384
valid_sources[0x30]	126317	1			T1	21		T3	1694		T4	757
valid_sources[0x31]	130351	1			T1	12		T3	1473		T4	801
valid_sources[0x32]	130562	1			T1	16		T3	1390		T4	890
valid_sources[0x33]	191349	1			T1	21		T3	1465		T4	12971
valid_sources[0x34]	164625	1			T1	6		T2	3		T3	1489
valid_sources[0x35]	124915	1			T1	26		T3	1470		T4	624
valid_sources[0x36]	139224	1			T1	16		T3	1397		T4	5160
valid_sources[0x37]	124532	1			T1	17		T2	2		T3	1433
valid_sources[0x38]	159018	1			T1	10		T2	2		T3	1442
valid_sources[0x39]	132061	1			T1	15		T2	2		T3	1491
valid_sources[0x3a]	180794	1			T1	18		T3	1513		T4	780
valid_sources[0x3b]	146134	1			T1	11		T2	3		T3	1598
valid_sources[0x3c]	139739	1			T1	12		T3	1466		T4	573
valid_sources[0x3d]	139970	1			T1	25		T3	1484		T4	1561
valid_sources[0x3e]	149210	1			T1	14		T3	1447		T4	829
valid_sources[0x3f]	127964	1			T1	15		T3	1433		T4	1456
valid_sources[0x40]	131766	1			T1	14		T2	5		T3	1577
valid_sources[0x41]	130235	1			T1	17		T2	4		T3	1371
valid_sources[0x42]	127388	1			T1	22		T3	1608		T4	692
valid_sources[0x43]	162981	1			T1	13		T2	1		T3	1656
valid_sources[0x44]	134683	1			T1	19		T3	1242		T4	781
valid_sources[0x45]	136985	1			T1	15		T2	1		T3	1512
valid_sources[0x46]	162773	1			T1	16		T3	1448		T4	898
valid_sources[0x47]	135550	1			T1	17		T3	1597		T4	628
valid_sources[0x48]	180749	1			T1	20		T2	1		T3	1474
valid_sources[0x49]	140518	1			T1	19		T3	1589		T4	1152
valid_sources[0x4a]	162733	1			T1	27		T2	2		T3	1585
valid_sources[0x4b]	136147	1			T1	17		T3	1549		T4	672
valid_sources[0x4c]	185541	1			T1	15		T2	1		T3	1472
valid_sources[0x4d]	131109	1			T1	14		T2	2		T3	1492
valid_sources[0x4e]	124942	1			T1	14		T3	1597		T4	695
valid_sources[0x4f]	197100	1			T1	27		T2	2		T3	1603
valid_sources[0x50]	159915	1			T1	22		T3	1634		T4	789
valid_sources[0x51]	160717	1			T1	12		T3	1465		T4	615
valid_sources[0x52]	137797	1			T1	28		T3	1502		T4	937
valid_sources[0x53]	146531	1			T1	16		T3	1527		T4	894
valid_sources[0x54]	139646	1			T1	9		T2	1		T3	1618
valid_sources[0x55]	145496	1			T1	27		T2	5		T3	1391
valid_sources[0x56]	158962	1			T1	29		T2	1		T3	1647
valid_sources[0x57]	147567	1			T1	18		T3	1409		T4	833
valid_sources[0x58]	138378	1			T1	7		T3	1383		T4	838
valid_sources[0x59]	147779	1			T1	15		T2	3		T3	1623
valid_sources[0x5a]	211596	1			T1	26		T2	2		T3	1700
valid_sources[0x5b]	160778	1			T1	20		T3	1497		T4	5264
valid_sources[0x5c]	184817	1			T1	12		T3	1475		T4	910
valid_sources[0x5d]	137162	1			T1	24		T2	2		T3	1537
valid_sources[0x5e]	174675	1			T1	16		T3	1486		T4	686
valid_sources[0x5f]	163840	1			T1	26		T2	2		T3	1437
valid_sources[0x60]	192977	1			T1	12		T2	3		T3	1532
valid_sources[0x61]	152713	1			T1	7		T3	1651		T4	3860
valid_sources[0x62]	132750	1			T1	15		T3	1505		T4	680
valid_sources[0x63]	172248	1			T1	17		T2	1		T3	1403
valid_sources[0x64]	128040	1			T1	17		T2	2		T3	1545
valid_sources[0x65]	142234	1			T1	17		T3	1572		T4	781
valid_sources[0x66]	133417	1			T1	20		T3	1401		T4	775
valid_sources[0x67]	135877	1			T1	12		T2	2		T3	1521
valid_sources[0x68]	127099	1			T1	13		T2	1		T3	1453
valid_sources[0x69]	170781	1			T1	21		T2	5		T3	1547
valid_sources[0x6a]	161488	1			T1	15		T2	1		T3	1583
valid_sources[0x6b]	197262	1			T1	19		T2	1		T3	1510
valid_sources[0x6c]	206939	1			T1	18		T2	2		T3	1498
valid_sources[0x6d]	148416	1			T1	14		T3	1478		T4	846
valid_sources[0x6e]	190288	1			T1	16		T3	1651		T4	733
valid_sources[0x6f]	132059	1			T1	14		T3	1585		T4	755
valid_sources[0x70]	128827	1			T1	14		T2	7		T3	1500
valid_sources[0x71]	148495	1			T1	26		T3	1494		T4	923
valid_sources[0x72]	134950	1			T1	15		T2	3		T3	1413
valid_sources[0x73]	145372	1			T1	17		T3	1506		T4	790
valid_sources[0x74]	154944	1			T1	20		T3	1519		T4	3351
valid_sources[0x75]	130525	1			T1	17		T3	1561		T4	887
valid_sources[0x76]	172037	1			T1	23		T2	3		T3	1631
valid_sources[0x77]	127970	1			T1	11		T3	1626		T4	830
valid_sources[0x78]	160391	1			T1	25		T2	2		T3	1528
valid_sources[0x79]	134059	1			T1	17		T3	1523		T4	7546
valid_sources[0x7a]	138616	1			T1	26		T2	1		T3	1436
valid_sources[0x7b]	146100	1			T1	19		T2	4		T3	1436
valid_sources[0x7c]	152661	1			T1	9		T2	1		T3	1541
valid_sources[0x7d]	156161	1			T1	19		T3	1514		T4	745
valid_sources[0x7e]	143417	1			T1	14		T3	1435		T4	717
valid_sources[0x7f]	139527	1			T1	25		T2	1		T3	1683
valid_sources[0x80]	130303	1			T1	21		T3	1541		T4	737

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7389226

1

T1

973

T2

63

T3

79003

values[0x0]

all_enables

biggest_size

6477248

1

T1

896

T2

51

T3

63995

values[0x1]

all_enables

biggest_size

5808662

1

T1

878

T2

44

T3

55967