Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15107795	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

16401333

1

T1

52029

T2

21295

T3

134

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	12335553	1			T1	46069		T2	18207		T3	119
values[0x0]	8958790	1			T1	30278		T2	10809		T3	51
values[0x1]	10214785	1			T1	38350		T2	12111		T3	69

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	11207793	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

20301335

1

T1

69027

T2

25986

T3

156

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	101675	1			T1	435		T2	169		T4	24
valid_sources[0x01]	182443	1			T1	435		T2	145		T3	2
valid_sources[0x02]	117596	1			T1	433		T2	129		T4	14
valid_sources[0x03]	121076	1			T1	455		T2	118		T3	1
valid_sources[0x04]	154805	1			T1	478		T2	223		T3	1
valid_sources[0x05]	126658	1			T1	479		T2	215		T3	1
valid_sources[0x06]	146678	1			T1	447		T2	180		T4	16
valid_sources[0x07]	175039	1			T1	414		T2	95		T3	1
valid_sources[0x08]	138125	1			T1	520		T2	114		T4	18
valid_sources[0x09]	114145	1			T1	374		T2	184		T3	1
valid_sources[0x0a]	145242	1			T1	450		T2	251		T3	4
valid_sources[0x0b]	109432	1			T1	452		T2	174		T3	1
valid_sources[0x0c]	112118	1			T1	451		T2	152		T4	18
valid_sources[0x0d]	121193	1			T1	493		T2	190		T3	2
valid_sources[0x0e]	142060	1			T1	434		T2	200		T3	1
valid_sources[0x0f]	104562	1			T1	411		T2	106		T4	14
valid_sources[0x10]	163131	1			T1	444		T2	182		T3	1
valid_sources[0x11]	101543	1			T1	397		T2	179		T3	3
valid_sources[0x12]	128925	1			T1	430		T2	104		T3	1
valid_sources[0x13]	108661	1			T1	429		T2	222		T3	1
valid_sources[0x14]	105534	1			T1	410		T2	174		T3	4
valid_sources[0x15]	101765	1			T1	501		T2	139		T3	1
valid_sources[0x16]	108795	1			T1	441		T2	172		T3	1
valid_sources[0x17]	123381	1			T1	466		T2	223		T4	20
valid_sources[0x18]	151854	1			T1	478		T2	99		T4	6
valid_sources[0x19]	148284	1			T1	424		T2	204		T3	1
valid_sources[0x1a]	146217	1			T1	485		T2	151		T3	1
valid_sources[0x1b]	147620	1			T1	474		T2	177		T3	3
valid_sources[0x1c]	118130	1			T1	503		T2	131		T3	2
valid_sources[0x1d]	164022	1			T1	496		T2	116		T4	20
valid_sources[0x1e]	112971	1			T1	455		T2	75		T4	21
valid_sources[0x1f]	124104	1			T1	463		T2	195		T3	2
valid_sources[0x20]	102647	1			T1	500		T2	223		T3	2
valid_sources[0x21]	100879	1			T1	441		T2	222		T3	3
valid_sources[0x22]	123824	1			T1	438		T2	157		T3	1
valid_sources[0x23]	117391	1			T1	438		T2	89		T3	1
valid_sources[0x24]	108112	1			T1	445		T2	111		T3	1
valid_sources[0x25]	102645	1			T1	510		T2	179		T3	3
valid_sources[0x26]	100753	1			T1	416		T2	240		T4	18
valid_sources[0x27]	111935	1			T1	434		T2	191		T4	17
valid_sources[0x28]	99769	1			T1	488		T2	138		T3	1
valid_sources[0x29]	104438	1			T1	424		T2	179		T3	3
valid_sources[0x2a]	112573	1			T1	441		T2	199		T3	1
valid_sources[0x2b]	99111	1			T1	410		T2	258		T4	20
valid_sources[0x2c]	129752	1			T1	426		T2	94		T3	1
valid_sources[0x2d]	134547	1			T1	415		T2	83		T4	18
valid_sources[0x2e]	128647	1			T1	464		T2	121		T3	1
valid_sources[0x2f]	167374	1			T1	381		T2	128		T3	1
valid_sources[0x30]	115393	1			T1	404		T2	123		T4	21
valid_sources[0x31]	121412	1			T1	469		T2	134		T3	1
valid_sources[0x32]	114577	1			T1	458		T2	170		T4	21
valid_sources[0x33]	154506	1			T1	442		T2	190		T3	1
valid_sources[0x34]	144935	1			T1	484		T2	144		T3	2
valid_sources[0x35]	121956	1			T1	414		T2	79		T3	2
valid_sources[0x36]	109378	1			T1	509		T2	172		T3	4
valid_sources[0x37]	123547	1			T1	536		T2	127		T4	17
valid_sources[0x38]	97869	1			T1	428		T2	211		T3	1
valid_sources[0x39]	118735	1			T1	442		T2	104		T4	20
valid_sources[0x3a]	111398	1			T1	398		T2	122		T3	2
valid_sources[0x3b]	121202	1			T1	433		T2	181		T3	1
valid_sources[0x3c]	166429	1			T1	479		T2	145		T3	2
valid_sources[0x3d]	118658	1			T1	452		T2	123		T4	14
valid_sources[0x3e]	100076	1			T1	454		T2	159		T4	20
valid_sources[0x3f]	165629	1			T1	425		T2	163		T3	1
valid_sources[0x40]	106958	1			T1	451		T2	75		T4	10
valid_sources[0x41]	100950	1			T1	433		T2	144		T3	1
valid_sources[0x42]	153519	1			T1	429		T2	207		T3	1
valid_sources[0x43]	121369	1			T1	451		T2	138		T3	1
valid_sources[0x44]	109395	1			T1	427		T2	175		T3	1
valid_sources[0x45]	139309	1			T1	452		T2	111		T4	22
valid_sources[0x46]	99952	1			T1	428		T2	165		T4	21
valid_sources[0x47]	100005	1			T1	453		T2	183		T3	1
valid_sources[0x48]	99210	1			T1	424		T2	185		T3	1
valid_sources[0x49]	117240	1			T1	473		T2	158		T3	2
valid_sources[0x4a]	128837	1			T1	372		T2	129		T4	21
valid_sources[0x4b]	108723	1			T1	439		T2	159		T3	1
valid_sources[0x4c]	100724	1			T1	423		T2	198		T3	3
valid_sources[0x4d]	105303	1			T1	433		T2	96		T3	3
valid_sources[0x4e]	157526	1			T1	477		T2	109		T4	16
valid_sources[0x4f]	117896	1			T1	464		T2	200		T4	17
valid_sources[0x50]	102574	1			T1	448		T2	154		T4	14
valid_sources[0x51]	115845	1			T1	436		T2	164		T3	1
valid_sources[0x52]	162017	1			T1	397		T2	117		T4	25
valid_sources[0x53]	99716	1			T1	445		T2	195		T4	13
valid_sources[0x54]	122094	1			T1	416		T2	86		T3	1
valid_sources[0x55]	218361	1			T1	495		T2	209		T3	1
valid_sources[0x56]	102679	1			T1	517		T2	196		T3	1
valid_sources[0x57]	158444	1			T1	423		T2	121		T3	1
valid_sources[0x58]	119772	1			T1	428		T2	190		T3	1
valid_sources[0x59]	110526	1			T1	443		T2	194		T4	11
valid_sources[0x5a]	100952	1			T1	466		T2	294		T4	17
valid_sources[0x5b]	103085	1			T1	472		T2	181		T3	2
valid_sources[0x5c]	152319	1			T1	458		T2	181		T3	3
valid_sources[0x5d]	101070	1			T1	456		T2	193		T3	3
valid_sources[0x5e]	110650	1			T1	472		T2	319		T3	2
valid_sources[0x5f]	114512	1			T1	441		T2	146		T3	3
valid_sources[0x60]	99230	1			T1	530		T2	130		T4	22
valid_sources[0x61]	100381	1			T1	423		T2	150		T4	16
valid_sources[0x62]	141630	1			T1	434		T2	296		T3	1
valid_sources[0x63]	103904	1			T1	476		T2	97		T3	2
valid_sources[0x64]	116034	1			T1	435		T2	111		T4	20
valid_sources[0x65]	132421	1			T1	464		T2	154		T3	1
valid_sources[0x66]	119313	1			T1	460		T2	123		T4	13
valid_sources[0x67]	99100	1			T1	407		T2	104		T4	13
valid_sources[0x68]	100836	1			T1	427		T2	127		T4	17
valid_sources[0x69]	141113	1			T1	408		T2	264		T3	3
valid_sources[0x6a]	103916	1			T1	428		T2	171		T4	23
valid_sources[0x6b]	135417	1			T1	495		T2	281		T4	20
valid_sources[0x6c]	123289	1			T1	415		T2	133		T3	5
valid_sources[0x6d]	165851	1			T1	479		T2	142		T3	2
valid_sources[0x6e]	144722	1			T1	425		T2	143		T3	1
valid_sources[0x6f]	134334	1			T1	401		T2	92		T3	1
valid_sources[0x70]	110480	1			T1	497		T2	157		T3	2
valid_sources[0x71]	98137	1			T1	511		T2	103		T3	1
valid_sources[0x72]	103151	1			T1	515		T2	150		T3	1
valid_sources[0x73]	122314	1			T1	442		T2	132		T3	2
valid_sources[0x74]	119193	1			T1	421		T2	159		T4	16
valid_sources[0x75]	115042	1			T1	434		T2	140		T3	2
valid_sources[0x76]	121551	1			T1	456		T2	247		T4	17
valid_sources[0x77]	102809	1			T1	499		T2	108		T3	2
valid_sources[0x78]	113204	1			T1	484		T2	119		T4	15
valid_sources[0x79]	130945	1			T1	431		T2	134		T4	13
valid_sources[0x7a]	152154	1			T1	441		T2	203		T4	17
valid_sources[0x7b]	99019	1			T1	464		T2	285		T3	2
valid_sources[0x7c]	131783	1			T1	454		T2	256		T4	17
valid_sources[0x7d]	103225	1			T1	462		T2	203		T3	3
valid_sources[0x7e]	145649	1			T1	463		T2	166		T4	34
valid_sources[0x7f]	103617	1			T1	427		T2	106		T4	22
valid_sources[0x80]	159253	1			T1	477		T2	204		T3	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6093712

1

T1

22953

T2

9060

T3

62

values[0x0]

all_enables

biggest_size

5432525

1

T1

15351

T2

6451

T3

34

values[0x1]

all_enables

biggest_size

4875096

1

T1

13725

T2

5784

T3

38