Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32597541	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

34476361

1

T1

6959

T2

34157

T3

4

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	27022763	1			T1	6287		T2	30094		T3	1
values[0x0]	18649162	1			T1	3884		T2	19697		T3	4
values[0x1]	21401977	1			T1	4928		T2	24348		T3	8

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	24191029	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

42882873

1

T1

9132

T2

44914

T3

5

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	264308	1			T1	109		T2	296		T4	118
valid_sources[0x01]	222861	1			T2	292		T4	115		T7	7
valid_sources[0x02]	228133	1			T1	8		T2	292		T4	121
valid_sources[0x03]	266727	1			T1	2		T2	272		T4	101
valid_sources[0x04]	333484	1			T1	27		T2	292		T4	105
valid_sources[0x05]	307708	1			T1	92		T2	284		T4	129
valid_sources[0x06]	241679	1			T1	18		T2	297		T4	103
valid_sources[0x07]	259815	1			T1	1		T2	283		T4	112
valid_sources[0x08]	238108	1			T1	2		T2	280		T4	108
valid_sources[0x09]	245540	1			T1	6		T2	298		T4	108
valid_sources[0x0a]	243603	1			T1	7319		T2	281		T4	91
valid_sources[0x0b]	223679	1			T1	22		T2	286		T4	114
valid_sources[0x0c]	233240	1			T1	41		T2	269		T4	125
valid_sources[0x0d]	252061	1			T1	13		T2	261		T4	95
valid_sources[0x0e]	256004	1			T1	13		T2	295		T4	90
valid_sources[0x0f]	366796	1			T1	9		T2	275		T4	106
valid_sources[0x10]	293867	1			T1	30		T2	264		T3	1
valid_sources[0x11]	245662	1			T2	265		T4	92		T7	12
valid_sources[0x12]	310236	1			T2	251		T4	120		T7	9
valid_sources[0x13]	340547	1			T2	290		T4	121		T7	6
valid_sources[0x14]	218512	1			T1	24		T2	292		T4	104
valid_sources[0x15]	226107	1			T1	45		T2	266		T4	108
valid_sources[0x16]	234461	1			T1	9		T2	282		T4	108
valid_sources[0x17]	234609	1			T2	272		T3	1		T4	113
valid_sources[0x18]	229974	1			T1	1		T2	310		T4	118
valid_sources[0x19]	214973	1			T1	6		T2	319		T4	113
valid_sources[0x1a]	272861	1			T2	323		T4	76		T7	14
valid_sources[0x1b]	229998	1			T1	10		T2	299		T4	125
valid_sources[0x1c]	223302	1			T2	316		T4	103		T7	3
valid_sources[0x1d]	219446	1			T1	3		T2	284		T4	89
valid_sources[0x1e]	238012	1			T1	1		T2	300		T4	105
valid_sources[0x1f]	214590	1			T1	42		T2	255		T4	118
valid_sources[0x20]	243811	1			T1	3		T2	284		T4	117
valid_sources[0x21]	265154	1			T1	5		T2	290		T4	92
valid_sources[0x22]	242875	1			T1	1		T2	324		T4	124
valid_sources[0x23]	288510	1			T1	20		T2	305		T4	123
valid_sources[0x24]	277949	1			T2	307		T4	109		T7	19
valid_sources[0x25]	276354	1			T1	14		T2	281		T18	1
valid_sources[0x26]	309038	1			T1	17		T2	311		T4	101
valid_sources[0x27]	266493	1			T1	33		T2	300		T4	120
valid_sources[0x28]	245552	1			T1	28		T2	300		T4	119
valid_sources[0x29]	274778	1			T1	1		T2	326		T4	123
valid_sources[0x2a]	317060	1			T1	31		T2	295		T4	119
valid_sources[0x2b]	279415	1			T1	3		T2	314		T4	106
valid_sources[0x2c]	223455	1			T1	5		T2	274		T4	110
valid_sources[0x2d]	257376	1			T1	2		T2	330		T4	101
valid_sources[0x2e]	229630	1			T1	42		T2	268		T4	110
valid_sources[0x2f]	224494	1			T1	61		T2	286		T4	101
valid_sources[0x30]	271572	1			T1	42		T2	308		T4	110
valid_sources[0x31]	319211	1			T1	12		T2	305		T4	92
valid_sources[0x32]	249288	1			T1	45		T2	279		T4	104
valid_sources[0x33]	270733	1			T1	14		T2	253		T4	126
valid_sources[0x34]	262825	1			T1	7		T2	288		T4	117
valid_sources[0x35]	255172	1			T1	31		T2	286		T4	113
valid_sources[0x36]	337681	1			T1	20		T2	268		T4	107
valid_sources[0x37]	296088	1			T1	36		T2	279		T4	97
valid_sources[0x38]	261385	1			T2	298		T4	103		T7	6
valid_sources[0x39]	260412	1			T1	23		T2	286		T4	110
valid_sources[0x3a]	269722	1			T1	1		T2	270		T4	113
valid_sources[0x3b]	332290	1			T1	24		T2	264		T4	106
valid_sources[0x3c]	243381	1			T2	291		T4	123		T7	4
valid_sources[0x3d]	265057	1			T1	51		T2	277		T4	96
valid_sources[0x3e]	216854	1			T1	72		T2	304		T4	124
valid_sources[0x3f]	276031	1			T1	68		T2	310		T4	121
valid_sources[0x40]	226606	1			T1	26		T2	289		T4	105
valid_sources[0x41]	278387	1			T2	297		T4	124		T5	4274
valid_sources[0x42]	253454	1			T1	39		T2	279		T4	102
valid_sources[0x43]	356213	1			T1	71		T2	285		T4	119
valid_sources[0x44]	263687	1			T1	33		T2	276		T4	107
valid_sources[0x45]	218057	1			T1	9		T2	311		T4	99
valid_sources[0x46]	336104	1			T1	1		T2	306		T4	98
valid_sources[0x47]	250322	1			T2	283		T4	98		T7	10
valid_sources[0x48]	240503	1			T1	75		T2	292		T4	117
valid_sources[0x49]	279227	1			T1	2		T2	313		T4	106
valid_sources[0x4a]	298498	1			T1	1		T2	315		T4	115
valid_sources[0x4b]	234733	1			T2	302		T4	119		T7	10
valid_sources[0x4c]	237538	1			T1	14		T2	293		T4	92
valid_sources[0x4d]	297024	1			T1	17		T2	261		T4	117
valid_sources[0x4e]	249047	1			T1	7		T2	283		T4	93
valid_sources[0x4f]	288664	1			T1	14		T2	318		T4	99
valid_sources[0x50]	243146	1			T1	11		T2	289		T4	102
valid_sources[0x51]	283647	1			T1	19		T2	272		T4	111
valid_sources[0x52]	362752	1			T1	17		T2	293		T3	1
valid_sources[0x53]	230282	1			T1	29		T2	296		T4	108
valid_sources[0x54]	235874	1			T2	292		T4	117		T7	17
valid_sources[0x55]	276052	1			T1	23		T2	311		T4	90
valid_sources[0x56]	236672	1			T1	2		T2	311		T4	114
valid_sources[0x57]	270055	1			T1	23		T2	270		T4	80
valid_sources[0x58]	234824	1			T1	60		T2	275		T4	97
valid_sources[0x59]	253285	1			T1	62		T2	302		T4	103
valid_sources[0x5a]	295823	1			T2	293		T4	131		T7	3
valid_sources[0x5b]	241390	1			T1	18		T2	299		T4	94
valid_sources[0x5c]	260351	1			T1	1		T2	306		T4	111
valid_sources[0x5d]	245340	1			T2	258		T4	96		T7	1
valid_sources[0x5e]	322835	1			T1	25		T2	332		T4	116
valid_sources[0x5f]	258023	1			T1	53		T2	277		T4	114
valid_sources[0x60]	346750	1			T1	74		T2	293		T4	99
valid_sources[0x61]	273437	1			T1	21		T2	274		T4	88
valid_sources[0x62]	266998	1			T1	72		T2	264		T4	118
valid_sources[0x63]	217282	1			T1	17		T2	267		T4	112
valid_sources[0x64]	301668	1			T1	40		T2	304		T4	121
valid_sources[0x65]	287481	1			T1	2		T2	312		T4	72
valid_sources[0x66]	265218	1			T1	10		T2	276		T4	101
valid_sources[0x67]	276579	1			T1	5		T2	272		T4	111
valid_sources[0x68]	271753	1			T1	37		T2	263		T4	94
valid_sources[0x69]	217504	1			T1	26		T2	293		T4	95
valid_sources[0x6a]	236115	1			T1	10		T2	303		T4	111
valid_sources[0x6b]	241315	1			T2	282		T4	117		T7	4
valid_sources[0x6c]	255750	1			T1	3		T2	254		T4	111
valid_sources[0x6d]	276091	1			T1	19		T2	296		T4	119
valid_sources[0x6e]	235022	1			T1	7		T2	339		T4	104
valid_sources[0x6f]	244912	1			T1	6		T2	309		T4	103
valid_sources[0x70]	258248	1			T1	15		T2	283		T4	121
valid_sources[0x71]	265642	1			T1	8		T2	285		T4	109
valid_sources[0x72]	248203	1			T1	9		T2	285		T4	131
valid_sources[0x73]	253729	1			T1	11		T2	278		T4	117
valid_sources[0x74]	284147	1			T1	23		T2	306		T4	107
valid_sources[0x75]	217120	1			T1	43		T2	279		T4	103
valid_sources[0x76]	275637	1			T1	16		T2	285		T4	100
valid_sources[0x77]	322295	1			T1	15		T2	310		T4	98
valid_sources[0x78]	288541	1			T1	19		T2	266		T4	103
valid_sources[0x79]	299038	1			T1	5		T2	291		T4	83
valid_sources[0x7a]	230482	1			T1	14		T2	300		T4	116
valid_sources[0x7b]	263558	1			T1	10		T2	303		T4	117
valid_sources[0x7c]	271676	1			T2	273		T4	112		T7	1
valid_sources[0x7d]	231817	1			T1	11		T2	307		T4	100
valid_sources[0x7e]	220190	1			T1	20		T2	280		T4	119
valid_sources[0x7f]	225282	1			T1	2		T2	295		T4	122
valid_sources[0x80]	273016	1			T1	37		T2	273		T4	108

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

13284865

1

T1

3072

T2

14974

T3

1

values[0x0]

all_enables

biggest_size

11171980

1

T1

2032

T2

10234

T3

2

values[0x1]

all_enables

biggest_size

10019516

1

T1

1855

T2

8949

T3

1