Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	40011181	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

38191260

1

T1

9099

T2

53928

T3

104453

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	37233588	1			T1	10309		T2	55400		T3	970949
values[0x0]	19242960	1			T1	4670		T2	26840		T3	541292
values[0x1]	21725893	1			T1	5571		T2	30397		T3	590573

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30851975	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

47350466

1

T1

11742

T2

67144

T3

128235

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	231767	1			T3	8057		T29	19		T8	76
valid_sources[0x01]	233724	1			T3	8137		T29	20		T8	82
valid_sources[0x02]	233944	1			T3	8222		T29	24		T8	99
valid_sources[0x03]	241326	1			T3	8075		T29	20		T8	73
valid_sources[0x04]	233366	1			T3	8141		T29	28		T8	87
valid_sources[0x05]	233670	1			T3	8231		T29	18		T8	70
valid_sources[0x06]	232092	1			T3	8147		T29	25		T8	89
valid_sources[0x07]	364599	1			T3	8107		T29	25		T8	64
valid_sources[0x08]	232562	1			T3	8187		T29	18		T8	97
valid_sources[0x09]	234165	1			T3	8443		T29	15		T8	74
valid_sources[0x0a]	828748	1			T3	8339		T29	30		T8	101
valid_sources[0x0b]	272776	1			T3	8208		T29	16		T8	83
valid_sources[0x0c]	231207	1			T3	8196		T29	18		T8	90
valid_sources[0x0d]	243123	1			T3	8176		T29	13		T8	66
valid_sources[0x0e]	231174	1			T3	8453		T29	26		T8	88
valid_sources[0x0f]	560728	1			T3	8052		T29	25		T8	59
valid_sources[0x10]	231959	1			T3	8210		T29	23		T8	90
valid_sources[0x11]	256194	1			T3	8246		T29	22		T8	82
valid_sources[0x12]	235769	1			T3	8192		T29	13		T8	79
valid_sources[0x13]	235442	1			T3	8434		T29	26		T8	85
valid_sources[0x14]	230434	1			T3	8158		T29	19		T8	114
valid_sources[0x15]	232818	1			T3	8336		T29	27		T8	111
valid_sources[0x16]	231783	1			T3	8201		T29	26		T8	73
valid_sources[0x17]	237537	1			T3	8260		T29	31		T8	90
valid_sources[0x18]	232351	1			T3	8411		T29	22		T8	86
valid_sources[0x19]	238329	1			T3	8266		T29	19		T8	92
valid_sources[0x1a]	231104	1			T3	8100		T29	29		T8	77
valid_sources[0x1b]	235332	1			T3	8260		T29	23		T8	87
valid_sources[0x1c]	239596	1			T3	8140		T29	17		T8	76
valid_sources[0x1d]	233263	1			T3	8179		T29	24		T8	104
valid_sources[0x1e]	232246	1			T3	8098		T29	19		T8	61
valid_sources[0x1f]	250130	1			T3	8323		T29	26		T8	103
valid_sources[0x20]	234292	1			T3	8060		T29	22		T8	98
valid_sources[0x21]	231371	1			T3	8260		T29	22		T8	86
valid_sources[0x22]	231157	1			T3	8255		T29	30		T8	102
valid_sources[0x23]	230584	1			T3	8407		T29	22		T8	80
valid_sources[0x24]	235075	1			T3	8172		T29	15		T8	88
valid_sources[0x25]	235089	1			T3	8379		T29	27		T8	77
valid_sources[0x26]	235618	1			T3	8092		T29	25		T8	91
valid_sources[0x27]	250993	1			T1	20550		T3	8153		T29	22
valid_sources[0x28]	231500	1			T3	8200		T29	23		T8	89
valid_sources[0x29]	465877	1			T3	8091		T29	20		T8	76
valid_sources[0x2a]	233127	1			T3	8296		T29	25		T8	71
valid_sources[0x2b]	234578	1			T3	8319		T29	20		T8	73
valid_sources[0x2c]	235397	1			T3	8170		T29	28		T8	80
valid_sources[0x2d]	501309	1			T3	8360		T29	20		T8	89
valid_sources[0x2e]	2208133	1			T3	8123		T29	25		T8	102
valid_sources[0x2f]	232498	1			T3	8272		T29	15		T8	88
valid_sources[0x30]	274133	1			T3	8225		T29	20		T8	72
valid_sources[0x31]	293203	1			T3	7982		T29	18		T8	96
valid_sources[0x32]	285493	1			T3	8066		T29	21		T8	90
valid_sources[0x33]	230778	1			T3	8251		T29	15		T8	78
valid_sources[0x34]	1378674	1			T3	8253		T29	20		T8	93
valid_sources[0x35]	437367	1			T3	8148		T29	22		T8	79
valid_sources[0x36]	231428	1			T3	8118		T29	25		T8	92
valid_sources[0x37]	232312	1			T3	8172		T29	26		T8	81
valid_sources[0x38]	238873	1			T3	8124		T29	21		T8	81
valid_sources[0x39]	348046	1			T3	8104		T29	23		T8	82
valid_sources[0x3a]	2211705	1			T3	8198		T29	22		T8	95
valid_sources[0x3b]	267065	1			T3	8135		T29	27		T8	70
valid_sources[0x3c]	230996	1			T3	8192		T29	25		T8	81
valid_sources[0x3d]	346247	1			T3	8284		T29	14		T8	97
valid_sources[0x3e]	353077	1			T3	8411		T29	30		T8	54
valid_sources[0x3f]	325991	1			T3	8142		T29	24		T8	111
valid_sources[0x40]	248426	1			T3	8121		T29	24		T8	90
valid_sources[0x41]	236007	1			T3	8282		T29	23		T8	96
valid_sources[0x42]	388541	1			T3	8067		T29	17		T8	127
valid_sources[0x43]	233389	1			T3	8143		T29	23		T8	99
valid_sources[0x44]	232385	1			T3	8280		T29	24		T8	96
valid_sources[0x45]	231102	1			T3	8428		T29	25		T8	71
valid_sources[0x46]	234718	1			T3	8251		T29	19		T8	76
valid_sources[0x47]	241364	1			T3	8198		T29	25		T8	72
valid_sources[0x48]	232322	1			T3	8267		T29	14		T8	58
valid_sources[0x49]	312686	1			T3	8287		T29	13		T8	91
valid_sources[0x4a]	232832	1			T3	8175		T29	14		T8	79
valid_sources[0x4b]	232432	1			T3	8090		T29	19		T8	79
valid_sources[0x4c]	232833	1			T3	8134		T29	21		T8	79
valid_sources[0x4d]	232115	1			T3	8203		T29	15		T8	89
valid_sources[0x4e]	231588	1			T3	8028		T29	24		T8	95
valid_sources[0x4f]	312980	1			T3	8141		T29	24		T8	68
valid_sources[0x50]	232573	1			T3	8400		T29	17		T8	96
valid_sources[0x51]	240892	1			T3	8280		T29	22		T8	90
valid_sources[0x52]	233411	1			T3	8245		T29	19		T8	95
valid_sources[0x53]	233875	1			T3	8312		T29	20		T8	70
valid_sources[0x54]	231039	1			T3	8334		T29	20		T8	70
valid_sources[0x55]	302192	1			T3	8267		T29	15		T8	85
valid_sources[0x56]	235048	1			T3	8310		T29	25		T8	81
valid_sources[0x57]	232017	1			T3	8221		T29	22		T8	74
valid_sources[0x58]	491719	1			T3	8297		T29	16		T8	85
valid_sources[0x59]	233057	1			T3	8287		T29	27		T8	109
valid_sources[0x5a]	595727	1			T3	8240		T29	11		T8	90
valid_sources[0x5b]	235521	1			T3	8130		T29	22		T8	72
valid_sources[0x5c]	233511	1			T3	8266		T29	19		T8	90
valid_sources[0x5d]	231402	1			T3	8091		T29	23		T8	64
valid_sources[0x5e]	313516	1			T3	8180		T29	27		T8	90
valid_sources[0x5f]	868098	1			T3	8129		T29	23		T8	64
valid_sources[0x60]	243393	1			T3	8283		T29	28		T8	83
valid_sources[0x61]	232439	1			T3	8300		T29	22		T8	83
valid_sources[0x62]	234089	1			T3	8062		T29	23		T8	111
valid_sources[0x63]	229968	1			T3	8148		T29	22		T8	81
valid_sources[0x64]	245462	1			T3	8271		T29	22		T8	76
valid_sources[0x65]	231134	1			T3	8104		T29	24		T8	84
valid_sources[0x66]	236201	1			T3	8197		T29	21		T8	75
valid_sources[0x67]	232366	1			T3	8064		T29	18		T8	74
valid_sources[0x68]	233297	1			T3	8144		T29	24		T8	93
valid_sources[0x69]	233988	1			T3	8208		T29	17		T8	64
valid_sources[0x6a]	233226	1			T3	8170		T29	12		T8	97
valid_sources[0x6b]	233595	1			T3	8327		T29	26		T8	94
valid_sources[0x6c]	287066	1			T3	8196		T29	12		T8	87
valid_sources[0x6d]	232817	1			T3	8059		T29	16		T8	71
valid_sources[0x6e]	231613	1			T3	8292		T29	23		T8	96
valid_sources[0x6f]	232154	1			T3	8177		T29	17		T8	74
valid_sources[0x70]	263740	1			T3	8253		T29	26		T8	87
valid_sources[0x71]	396098	1			T3	8296		T28	5		T29	11
valid_sources[0x72]	231617	1			T3	8286		T29	22		T8	101
valid_sources[0x73]	302414	1			T3	8341		T29	30		T8	101
valid_sources[0x74]	231418	1			T3	8259		T29	15		T8	79
valid_sources[0x75]	234772	1			T3	8295		T29	19		T8	72
valid_sources[0x76]	282500	1			T3	8171		T29	23		T8	78
valid_sources[0x77]	229256	1			T3	8233		T29	19		T8	83
valid_sources[0x78]	230145	1			T3	8217		T29	28		T8	70
valid_sources[0x79]	240001	1			T3	8290		T29	28		T8	61
valid_sources[0x7a]	233863	1			T3	8220		T29	23		T8	96
valid_sources[0x7b]	257700	1			T3	8234		T29	27		T8	102
valid_sources[0x7c]	306785	1			T3	8225		T29	15		T8	73
valid_sources[0x7d]	236343	1			T3	8242		T29	25		T8	80
valid_sources[0x7e]	234585	1			T3	8262		T29	18		T8	83
valid_sources[0x7f]	303388	1			T3	8202		T29	20		T8	97
valid_sources[0x80]	236866	1			T3	8460		T29	15		T8	80

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18401407

1

T1

4994

T2

27722

T3

484963

values[0x0]

all_enables

biggest_size

10648001

1

T1

2285

T2

14125

T3

302098

values[0x1]

all_enables

biggest_size

9141852

1

T1

1820

T2

12081

T3

257476