Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 44862185 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 42022010 1 T1 33343 T2 14586 T3 69411



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 41457544 1 T1 28854 T2 16524 T3 79194
values[0x0] 21269655 1 T1 18448 T2 7462 T3 36077
values[0x1] 24156996 1 T1 20152 T2 8883 T3 42382



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34571462 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 52312733 1 T1 41064 T2 18757 T3 89553



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 282231 1 T1 183 T2 135 T23 21
valid_sources[0x01] 282086 1 T1 218 T2 112 T23 9
valid_sources[0x02] 283382 1 T1 251 T2 116 T23 8
valid_sources[0x03] 281343 1 T1 247 T2 145 T23 8
valid_sources[0x04] 282026 1 T1 231 T2 115 T23 20
valid_sources[0x05] 410909 1 T1 348 T2 132 T23 18
valid_sources[0x06] 283110 1 T1 278 T2 166 T23 30
valid_sources[0x07] 281439 1 T1 237 T2 130 T23 21
valid_sources[0x08] 1644272 1 T1 239 T2 90 T23 30
valid_sources[0x09] 418237 1 T1 269 T2 132 T23 18
valid_sources[0x0a] 282350 1 T1 264 T2 125 T23 13
valid_sources[0x0b] 282476 1 T1 268 T2 107 T23 10
valid_sources[0x0c] 373568 1 T1 240 T2 110 T23 19
valid_sources[0x0d] 310729 1 T1 241 T2 136 T23 20
valid_sources[0x0e] 282329 1 T1 250 T2 141 T23 14
valid_sources[0x0f] 280399 1 T1 207 T2 123 T23 14
valid_sources[0x10] 281102 1 T1 255 T2 108 T23 11
valid_sources[0x11] 283639 1 T1 236 T2 124 T23 27
valid_sources[0x12] 299965 1 T1 250 T2 135 T23 12
valid_sources[0x13] 305452 1 T1 312 T2 162 T23 16
valid_sources[0x14] 286479 1 T1 190 T2 125 T23 11
valid_sources[0x15] 282480 1 T1 189 T2 134 T23 21
valid_sources[0x16] 303966 1 T1 314 T2 129 T23 17
valid_sources[0x17] 307518 1 T1 264 T2 132 T23 19
valid_sources[0x18] 281221 1 T1 288 T2 137 T23 9
valid_sources[0x19] 284285 1 T1 254 T2 132 T23 15
valid_sources[0x1a] 281870 1 T1 296 T2 78 T23 18
valid_sources[0x1b] 280121 1 T1 199 T2 116 T23 11
valid_sources[0x1c] 281412 1 T1 265 T2 149 T23 5
valid_sources[0x1d] 282126 1 T1 215 T2 128 T23 18
valid_sources[0x1e] 280620 1 T1 222 T2 136 T23 27
valid_sources[0x1f] 2249158 1 T1 251 T2 117 T23 38
valid_sources[0x20] 1027590 1 T1 180 T2 116 T23 4
valid_sources[0x21] 281312 1 T1 306 T2 128 T23 25
valid_sources[0x22] 282624 1 T1 238 T2 129 T23 8
valid_sources[0x23] 284006 1 T1 226 T2 133 T23 27
valid_sources[0x24] 282948 1 T1 395 T2 142 T23 15
valid_sources[0x25] 378166 1 T1 223 T2 124 T23 15
valid_sources[0x26] 282200 1 T1 227 T2 124 T23 9
valid_sources[0x27] 281013 1 T1 271 T2 132 T23 9
valid_sources[0x28] 297056 1 T1 300 T2 106 T23 28
valid_sources[0x29] 281288 1 T1 311 T2 84 T23 15
valid_sources[0x2a] 281679 1 T1 222 T2 117 T23 5
valid_sources[0x2b] 737283 1 T1 259 T2 128 T23 19
valid_sources[0x2c] 282312 1 T1 244 T2 164 T23 8
valid_sources[0x2d] 281707 1 T1 272 T2 111 T23 19
valid_sources[0x2e] 283434 1 T1 283 T2 119 T23 23
valid_sources[0x2f] 283199 1 T1 306 T2 114 T23 40
valid_sources[0x30] 284543 1 T1 249 T2 118 T23 19
valid_sources[0x31] 281404 1 T1 255 T2 143 T23 9
valid_sources[0x32] 281929 1 T1 305 T2 132 T23 16
valid_sources[0x33] 284173 1 T1 293 T2 173 T23 16
valid_sources[0x34] 318570 1 T1 302 T2 116 T23 13
valid_sources[0x35] 282134 1 T1 187 T2 130 T23 29
valid_sources[0x36] 283285 1 T1 264 T2 147 T23 16
valid_sources[0x37] 439778 1 T1 353 T2 102 T3 157653
valid_sources[0x38] 465723 1 T1 278 T2 104 T23 18
valid_sources[0x39] 281857 1 T1 283 T2 117 T23 17
valid_sources[0x3a] 435737 1 T1 310 T2 100 T23 26
valid_sources[0x3b] 282027 1 T1 206 T2 126 T23 7
valid_sources[0x3c] 280806 1 T1 210 T2 163 T23 5
valid_sources[0x3d] 645734 1 T1 286 T2 134 T23 20
valid_sources[0x3e] 377081 1 T1 323 T2 107 T23 16
valid_sources[0x3f] 282903 1 T1 308 T2 146 T23 25
valid_sources[0x40] 281648 1 T1 241 T2 130 T23 16
valid_sources[0x41] 348226 1 T1 280 T2 142 T23 18
valid_sources[0x42] 282108 1 T1 264 T2 113 T23 6
valid_sources[0x43] 282726 1 T1 275 T2 162 T23 18
valid_sources[0x44] 285924 1 T1 304 T2 177 T23 11
valid_sources[0x45] 305294 1 T1 259 T2 153 T23 24
valid_sources[0x46] 321153 1 T1 277 T2 130 T23 16
valid_sources[0x47] 334776 1 T1 277 T2 135 T23 15
valid_sources[0x48] 322321 1 T1 221 T2 94 T23 19
valid_sources[0x49] 338760 1 T1 284 T2 134 T23 13
valid_sources[0x4a] 282469 1 T1 271 T2 160 T23 9
valid_sources[0x4b] 305043 1 T1 254 T2 121 T23 25
valid_sources[0x4c] 282094 1 T1 307 T2 140 T23 22
valid_sources[0x4d] 283369 1 T1 297 T2 129 T23 8
valid_sources[0x4e] 283576 1 T1 264 T2 107 T23 12
valid_sources[0x4f] 288994 1 T1 250 T2 150 T23 7
valid_sources[0x50] 281435 1 T1 205 T2 115 T23 22
valid_sources[0x51] 309841 1 T1 290 T2 151 T23 30
valid_sources[0x52] 284448 1 T1 246 T2 120 T23 9
valid_sources[0x53] 282708 1 T1 249 T2 130 T23 5
valid_sources[0x54] 301275 1 T1 256 T2 160 T23 31
valid_sources[0x55] 440312 1 T1 286 T2 154 T23 24
valid_sources[0x56] 390898 1 T1 257 T2 103 T23 15
valid_sources[0x57] 281805 1 T1 278 T2 150 T23 28
valid_sources[0x58] 282626 1 T1 233 T2 134 T23 19
valid_sources[0x59] 371705 1 T1 286 T2 147 T23 29
valid_sources[0x5a] 282960 1 T1 266 T2 100 T23 16
valid_sources[0x5b] 281005 1 T1 276 T2 92 T23 14
valid_sources[0x5c] 281087 1 T1 241 T2 125 T23 10
valid_sources[0x5d] 281714 1 T1 248 T2 147 T23 17
valid_sources[0x5e] 306065 1 T1 221 T2 134 T23 5
valid_sources[0x5f] 282904 1 T1 320 T2 153 T23 25
valid_sources[0x60] 283399 1 T1 328 T2 143 T23 21
valid_sources[0x61] 281967 1 T1 279 T2 148 T23 12
valid_sources[0x62] 284813 1 T1 280 T2 148 T23 11
valid_sources[0x63] 2146951 1 T1 305 T2 102 T23 35
valid_sources[0x64] 282508 1 T1 309 T2 147 T23 17
valid_sources[0x65] 284207 1 T1 260 T2 111 T23 12
valid_sources[0x66] 283513 1 T1 268 T2 129 T23 20
valid_sources[0x67] 288372 1 T1 308 T2 132 T23 16
valid_sources[0x68] 283894 1 T1 242 T2 133 T23 18
valid_sources[0x69] 399034 1 T1 268 T2 171 T23 14
valid_sources[0x6a] 339588 1 T1 276 T2 150 T23 15
valid_sources[0x6b] 283003 1 T1 231 T2 103 T23 18
valid_sources[0x6c] 827261 1 T1 243 T2 109 T23 12
valid_sources[0x6d] 290023 1 T1 282 T2 132 T23 12
valid_sources[0x6e] 294849 1 T1 247 T2 128 T23 19
valid_sources[0x6f] 282285 1 T1 283 T2 111 T23 9
valid_sources[0x70] 282490 1 T1 321 T2 124 T23 16
valid_sources[0x71] 282440 1 T1 246 T2 141 T23 36
valid_sources[0x72] 287783 1 T1 191 T2 128 T23 8
valid_sources[0x73] 281126 1 T1 215 T2 101 T23 23
valid_sources[0x74] 283362 1 T1 258 T2 144 T23 19
valid_sources[0x75] 284285 1 T1 225 T2 130 T23 13
valid_sources[0x76] 282091 1 T1 267 T2 120 T23 22
valid_sources[0x77] 283295 1 T1 223 T2 164 T23 15
valid_sources[0x78] 283697 1 T1 247 T2 104 T23 18
valid_sources[0x79] 282354 1 T1 265 T2 127 T23 29
valid_sources[0x7a] 285015 1 T1 271 T2 145 T23 17
valid_sources[0x7b] 437382 1 T1 235 T2 105 T23 15
valid_sources[0x7c] 282346 1 T1 311 T2 118 T23 19
valid_sources[0x7d] 281542 1 T1 223 T2 145 T23 5
valid_sources[0x7e] 333192 1 T1 249 T2 115 T23 17
valid_sources[0x7f] 280771 1 T1 347 T2 118 T23 19
valid_sources[0x80] 282062 1 T1 243 T2 127 T23 9



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 20562206 1 T1 14081 T2 8213 T3 39475
values[0x0] all_enables biggest_size 11583473 1 T1 10537 T2 3472 T3 16666
values[0x1] all_enables biggest_size 9876331 1 T1 8725 T2 2901 T3 13270

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%