Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 42288802 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 40049653 1 T1 3895 T2 37488 T3 1189



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 39195528 1 T1 3909 T2 42356 T3 1347
values[0x0] 20191468 1 T1 1597 T2 19450 T3 506
values[0x1] 22951459 1 T1 1786 T2 22626 T3 584



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 32524053 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 49814402 1 T1 4622 T2 48029 T3 1486



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 660784 1 T1 36 T2 322 T3 11
valid_sources[0x01] 245314 1 T1 36 T2 317 T3 8
valid_sources[0x02] 252346 1 T1 32 T2 326 T3 12
valid_sources[0x03] 244683 1 T1 39 T2 344 T3 5
valid_sources[0x04] 243312 1 T1 23 T2 265 T3 8
valid_sources[0x05] 244832 1 T1 23 T2 340 T3 5
valid_sources[0x06] 462111 1 T1 26 T2 365 T3 9
valid_sources[0x07] 244943 1 T1 24 T2 353 T3 17
valid_sources[0x08] 295379 1 T1 21 T2 289 T3 6
valid_sources[0x09] 246362 1 T1 32 T2 341 T3 8
valid_sources[0x0a] 251059 1 T1 19 T2 310 T3 12
valid_sources[0x0b] 246367 1 T1 30 T2 288 T3 11
valid_sources[0x0c] 247112 1 T1 23 T2 290 T3 14
valid_sources[0x0d] 307225 1 T1 28 T2 288 T3 11
valid_sources[0x0e] 252111 1 T1 29 T2 349 T3 6
valid_sources[0x0f] 386061 1 T1 30 T2 333 T3 12
valid_sources[0x10] 246709 1 T1 33 T2 346 T3 7
valid_sources[0x11] 258470 1 T1 25 T2 385 T3 15
valid_sources[0x12] 244825 1 T1 39 T2 324 T3 11
valid_sources[0x13] 245699 1 T1 22 T2 338 T3 7
valid_sources[0x14] 258174 1 T1 40 T2 296 T3 7
valid_sources[0x15] 267465 1 T1 25 T2 301 T3 10
valid_sources[0x16] 279150 1 T1 32 T2 292 T3 7
valid_sources[0x17] 246549 1 T1 34 T2 308 T3 4
valid_sources[0x18] 307641 1 T1 22 T2 295 T3 4
valid_sources[0x19] 246890 1 T1 27 T2 379 T3 17
valid_sources[0x1a] 247594 1 T1 26 T2 281 T3 11
valid_sources[0x1b] 244418 1 T1 25 T2 333 T3 13
valid_sources[0x1c] 299505 1 T1 34 T2 304 T3 12
valid_sources[0x1d] 247078 1 T1 22 T2 316 T3 4
valid_sources[0x1e] 781983 1 T1 31 T2 260 T3 8
valid_sources[0x1f] 246445 1 T1 33 T2 356 T3 11
valid_sources[0x20] 340332 1 T1 27 T2 306 T3 11
valid_sources[0x21] 245254 1 T1 26 T2 378 T3 9
valid_sources[0x22] 245565 1 T1 26 T2 316 T3 11
valid_sources[0x23] 243786 1 T1 25 T2 321 T3 11
valid_sources[0x24] 244975 1 T1 27 T2 279 T3 14
valid_sources[0x25] 304886 1 T1 42 T2 368 T3 21
valid_sources[0x26] 945752 1 T1 27 T2 274 T3 15
valid_sources[0x27] 246013 1 T1 37 T2 315 T3 6
valid_sources[0x28] 267214 1 T1 30 T2 374 T3 8
valid_sources[0x29] 289534 1 T1 27 T2 340 T3 7
valid_sources[0x2a] 246552 1 T1 19 T2 358 T3 6
valid_sources[0x2b] 272426 1 T1 32 T2 342 T3 5
valid_sources[0x2c] 249415 1 T1 33 T2 264 T3 4
valid_sources[0x2d] 524837 1 T1 29 T2 322 T3 5
valid_sources[0x2e] 248026 1 T1 26 T2 288 T3 12
valid_sources[0x2f] 401113 1 T1 29 T2 385 T3 13
valid_sources[0x30] 245646 1 T1 27 T2 348 T3 13
valid_sources[0x31] 281056 1 T1 23 T2 360 T3 13
valid_sources[0x32] 243241 1 T1 23 T2 335 T3 14
valid_sources[0x33] 248494 1 T1 28 T2 335 T3 7
valid_sources[0x34] 288769 1 T1 31 T2 349 T3 9
valid_sources[0x35] 245595 1 T1 23 T2 321 T3 8
valid_sources[0x36] 317663 1 T1 40 T2 291 T3 12
valid_sources[0x37] 244917 1 T1 26 T2 334 T3 7
valid_sources[0x38] 254075 1 T1 29 T2 328 T3 13
valid_sources[0x39] 245103 1 T1 28 T2 360 T3 7
valid_sources[0x3a] 249073 1 T1 16 T2 340 T3 5
valid_sources[0x3b] 255398 1 T1 33 T2 362 T3 7
valid_sources[0x3c] 244595 1 T1 31 T2 367 T3 13
valid_sources[0x3d] 253276 1 T1 30 T2 327 T3 7
valid_sources[0x3e] 290038 1 T1 34 T2 328 T3 8
valid_sources[0x3f] 244558 1 T1 23 T2 308 T3 6
valid_sources[0x40] 289683 1 T1 26 T2 319 T3 11
valid_sources[0x41] 339394 1 T1 36 T2 382 T3 9
valid_sources[0x42] 245349 1 T1 42 T2 313 T3 6
valid_sources[0x43] 306118 1 T1 23 T2 314 T3 15
valid_sources[0x44] 245070 1 T1 34 T2 305 T3 8
valid_sources[0x45] 264075 1 T1 23 T2 306 T3 13
valid_sources[0x46] 245956 1 T1 21 T2 344 T3 12
valid_sources[0x47] 254297 1 T1 19 T2 347 T3 17
valid_sources[0x48] 249880 1 T1 32 T2 321 T3 16
valid_sources[0x49] 244156 1 T1 29 T2 332 T3 12
valid_sources[0x4a] 272507 1 T1 30 T2 305 T3 17
valid_sources[0x4b] 258237 1 T1 20 T2 319 T3 7
valid_sources[0x4c] 555662 1 T1 28 T2 305 T3 12
valid_sources[0x4d] 244866 1 T1 28 T2 395 T3 4
valid_sources[0x4e] 244192 1 T1 26 T2 372 T3 12
valid_sources[0x4f] 263319 1 T1 35 T2 349 T3 9
valid_sources[0x50] 397090 1 T1 28 T2 369 T3 6
valid_sources[0x51] 247233 1 T1 31 T2 357 T3 7
valid_sources[0x52] 253772 1 T1 20 T2 352 T3 6
valid_sources[0x53] 248856 1 T1 34 T2 387 T3 10
valid_sources[0x54] 438531 1 T1 35 T2 296 T3 12
valid_sources[0x55] 245856 1 T1 28 T2 339 T3 13
valid_sources[0x56] 246739 1 T1 26 T2 287 T3 9
valid_sources[0x57] 248296 1 T1 36 T2 308 T3 7
valid_sources[0x58] 313099 1 T1 13 T2 326 T3 10
valid_sources[0x59] 242644 1 T1 33 T2 401 T3 6
valid_sources[0x5a] 484395 1 T1 22 T2 303 T3 8
valid_sources[0x5b] 277307 1 T1 29 T2 369 T3 12
valid_sources[0x5c] 245380 1 T1 33 T2 333 T3 11
valid_sources[0x5d] 246605 1 T1 30 T2 344 T3 5
valid_sources[0x5e] 672366 1 T1 34 T2 313 T3 12
valid_sources[0x5f] 245436 1 T1 30 T2 356 T3 10
valid_sources[0x60] 248449 1 T1 21 T2 377 T3 11
valid_sources[0x61] 384127 1 T1 15 T2 287 T3 10
valid_sources[0x62] 244196 1 T1 29 T2 328 T3 6
valid_sources[0x63] 370796 1 T1 30 T2 289 T3 8
valid_sources[0x64] 245538 1 T1 32 T2 344 T3 10
valid_sources[0x65] 260379 1 T1 28 T2 276 T3 8
valid_sources[0x66] 244691 1 T1 39 T2 299 T3 6
valid_sources[0x67] 246408 1 T1 21 T2 319 T3 10
valid_sources[0x68] 248458 1 T1 31 T2 358 T3 7
valid_sources[0x69] 249286 1 T1 18 T2 375 T3 7
valid_sources[0x6a] 269860 1 T1 33 T2 331 T3 16
valid_sources[0x6b] 247534 1 T1 27 T2 384 T3 6
valid_sources[0x6c] 253793 1 T1 28 T2 347 T3 3
valid_sources[0x6d] 254692 1 T1 27 T2 324 T3 6
valid_sources[0x6e] 245446 1 T1 32 T2 323 T3 11
valid_sources[0x6f] 257431 1 T1 20 T2 315 T3 12
valid_sources[0x70] 241926 1 T1 27 T2 383 T3 13
valid_sources[0x71] 247973 1 T1 33 T2 295 T3 11
valid_sources[0x72] 246975 1 T1 29 T2 404 T3 9
valid_sources[0x73] 245789 1 T1 28 T2 332 T3 12
valid_sources[0x74] 245072 1 T1 39 T2 360 T3 7
valid_sources[0x75] 2313031 1 T1 27 T2 361 T3 14
valid_sources[0x76] 244704 1 T1 31 T2 317 T3 15
valid_sources[0x77] 330778 1 T1 29 T2 348 T3 10
valid_sources[0x78] 246403 1 T1 33 T2 296 T3 6
valid_sources[0x79] 247990 1 T1 28 T2 308 T3 14
valid_sources[0x7a] 595426 1 T1 29 T2 384 T3 17
valid_sources[0x7b] 246789 1 T1 39 T2 402 T3 8
valid_sources[0x7c] 243398 1 T1 43 T2 319 T3 9
valid_sources[0x7d] 243730 1 T1 25 T2 347 T3 7
valid_sources[0x7e] 350808 1 T1 24 T2 309 T3 7
valid_sources[0x7f] 284067 1 T1 24 T2 341 T3 11
valid_sources[0x80] 248433 1 T1 32 T2 251 T3 10



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 19386257 1 T1 1889 T2 21239 T3 548
values[0x0] all_enables biggest_size 11125738 1 T1 1014 T2 9008 T3 326
values[0x1] all_enables biggest_size 9537658 1 T1 992 T2 7241 T3 315

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%