Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.81 99.07 96.52 100.00 98.26 98.13 100.00 92.65


Total tests in report: 1637
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
60.47 60.47 49.61 49.61 49.60 49.60 84.71 84.71 98.26 98.26 50.16 50.16 76.68 76.68 14.29 14.29 /workspace/coverage/cover_reg_top/3.i2c_tl_intg_err.1206590472
80.33 19.86 88.48 38.87 72.93 23.33 91.14 6.43 98.26 0.00 81.89 31.72 92.23 15.55 37.39 23.11 /workspace/coverage/default/12.i2c_host_fifo_watermark.2124620749
86.83 6.50 90.62 2.15 79.95 7.02 97.45 6.31 98.26 0.00 84.74 2.85 92.49 0.27 64.29 26.89 /workspace/coverage/cover_reg_top/45.i2c_intr_test.3252348277
92.04 5.21 97.85 7.23 87.10 7.15 98.30 0.85 98.26 0.00 95.72 10.98 93.83 1.34 73.21 8.93 /workspace/coverage/default/35.i2c_target_stress_all.3203774068
93.37 1.33 97.85 0.00 88.70 1.60 98.79 0.49 98.26 0.00 95.83 0.11 97.59 3.75 76.58 3.36 /workspace/coverage/cover_reg_top/4.i2c_tl_errors.3962056817
94.57 1.20 98.00 0.15 93.32 4.61 99.03 0.24 98.26 0.00 96.16 0.33 97.59 0.00 79.62 3.05 /workspace/coverage/default/36.i2c_host_stress_all.3096498859
95.08 0.51 98.58 0.59 93.65 0.33 99.03 0.00 98.26 0.00 97.15 0.99 97.59 0.00 81.30 1.68 /workspace/coverage/default/15.i2c_host_stress_all.2143807309
95.42 0.34 98.58 0.00 93.78 0.13 99.03 0.00 98.26 0.00 97.15 0.00 97.86 0.27 83.30 2.00 /workspace/coverage/cover_reg_top/11.i2c_tl_intg_err.1097670438
95.72 0.30 98.58 0.00 93.92 0.13 99.27 0.24 98.26 0.00 97.37 0.22 97.86 0.00 84.77 1.47 /workspace/coverage/default/17.i2c_host_override.2947789313
96.00 0.28 98.58 0.00 93.98 0.07 99.51 0.24 98.26 0.00 97.37 0.00 97.86 0.00 86.45 1.68 /workspace/coverage/cover_reg_top/46.i2c_intr_test.2181051238
96.27 0.27 98.58 0.00 93.98 0.00 99.51 0.00 98.26 0.00 97.37 0.00 99.73 1.88 86.45 0.00 /workspace/coverage/cover_reg_top/1.i2c_csr_rw.3502039745
96.43 0.16 98.58 0.00 94.45 0.47 99.51 0.00 98.26 0.00 97.37 0.00 99.73 0.00 87.08 0.63 /workspace/coverage/default/23.i2c_host_stress_all_with_rand_reset.3833648910
96.58 0.16 98.58 0.00 94.59 0.13 100.00 0.49 98.26 0.00 97.37 0.00 100.00 0.27 87.29 0.21 /workspace/coverage/default/2.i2c_sec_cm.2417343444
96.74 0.15 98.58 0.00 94.72 0.13 100.00 0.00 98.26 0.00 97.37 0.00 100.00 0.00 88.24 0.95 /workspace/coverage/default/0.i2c_target_glitch.935936006
96.88 0.14 98.93 0.34 94.85 0.13 100.00 0.00 98.26 0.00 97.69 0.33 100.00 0.00 88.45 0.21 /workspace/coverage/default/43.i2c_host_mode_toggle.4282433626
97.00 0.12 98.93 0.00 95.45 0.60 100.00 0.00 98.26 0.00 97.80 0.11 100.00 0.00 88.55 0.11 /workspace/coverage/default/0.i2c_host_fifo_overflow.1000780469
97.08 0.08 98.97 0.05 95.66 0.20 100.00 0.00 98.26 0.00 97.91 0.11 100.00 0.00 88.76 0.21 /workspace/coverage/default/18.i2c_target_bad_addr.2539113574
97.16 0.08 99.02 0.05 95.86 0.20 100.00 0.00 98.26 0.00 98.02 0.11 100.00 0.00 88.97 0.21 /workspace/coverage/default/35.i2c_host_stress_all.3955766464
97.23 0.06 99.02 0.00 95.99 0.13 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 89.29 0.32 /workspace/coverage/default/0.i2c_host_fifo_reset_fmt.728874299
97.29 0.06 99.02 0.00 95.99 0.00 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 89.71 0.42 /workspace/coverage/cover_reg_top/35.i2c_intr_test.1636588470
97.35 0.06 99.02 0.00 95.99 0.00 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 90.13 0.42 /workspace/coverage/default/25.i2c_target_stress_all.3575539473
97.41 0.06 99.02 0.00 95.99 0.00 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 90.55 0.42 /workspace/coverage/default/37.i2c_target_hrst.1793624595
97.45 0.05 99.02 0.00 95.99 0.00 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 90.86 0.32 /workspace/coverage/default/41.i2c_target_stress_all.4271856116
97.49 0.04 99.02 0.00 96.06 0.07 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 91.07 0.21 /workspace/coverage/cover_reg_top/4.i2c_tl_intg_err.577595916
97.52 0.03 99.02 0.00 96.06 0.00 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 91.28 0.21 /workspace/coverage/default/1.i2c_target_fifo_reset_acq.992259160
97.55 0.03 99.02 0.00 96.06 0.00 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 91.49 0.21 /workspace/coverage/default/10.i2c_host_smoke.3681348327
97.58 0.03 99.02 0.00 96.06 0.00 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 91.70 0.21 /workspace/coverage/default/16.i2c_host_fifo_overflow.644478476
97.61 0.03 99.02 0.00 96.06 0.00 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 91.91 0.21 /workspace/coverage/default/9.i2c_host_override.3247885825
97.64 0.03 99.07 0.05 96.19 0.13 100.00 0.00 98.26 0.00 98.02 0.00 100.00 0.00 91.91 0.00 /workspace/coverage/default/1.i2c_alert_test.3779481789
97.66 0.03 99.07 0.00 96.26 0.07 100.00 0.00 98.26 0.00 98.13 0.11 100.00 0.00 91.91 0.00 /workspace/coverage/default/15.i2c_target_stretch.3202265941
97.68 0.02 99.07 0.00 96.26 0.00 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.02 0.11 /workspace/coverage/cover_reg_top/1.i2c_tl_intg_err.463271089
97.69 0.02 99.07 0.00 96.26 0.00 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.12 0.11 /workspace/coverage/cover_reg_top/11.i2c_intr_test.162242596
97.71 0.02 99.07 0.00 96.26 0.00 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.23 0.11 /workspace/coverage/default/10.i2c_target_unexp_stop.653762637
97.72 0.02 99.07 0.00 96.26 0.00 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.33 0.11 /workspace/coverage/default/12.i2c_host_fifo_reset_rx.623267672
97.74 0.02 99.07 0.00 96.26 0.00 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.44 0.11 /workspace/coverage/default/20.i2c_host_fifo_reset_fmt.4070271230
97.75 0.02 99.07 0.00 96.26 0.00 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.54 0.11 /workspace/coverage/default/20.i2c_host_rx_oversample.17023133
97.77 0.02 99.07 0.00 96.26 0.00 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.65 0.11 /workspace/coverage/default/27.i2c_host_rx_oversample.4198648895
97.78 0.01 99.07 0.00 96.32 0.07 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.65 0.00 /workspace/coverage/cover_reg_top/0.i2c_tl_intg_err.1220274431
97.79 0.01 99.07 0.00 96.39 0.07 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.65 0.00 /workspace/coverage/cover_reg_top/10.i2c_tl_intg_err.3704843531
97.80 0.01 99.07 0.00 96.46 0.07 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.65 0.00 /workspace/coverage/default/14.i2c_target_fifo_reset_acq.2940082145
97.81 0.01 99.07 0.00 96.52 0.07 100.00 0.00 98.26 0.00 98.13 0.00 100.00 0.00 92.65 0.00 /workspace/coverage/default/16.i2c_host_mode_toggle.2625846799


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.i2c_csr_aliasing.3635798531
/workspace/coverage/cover_reg_top/0.i2c_csr_bit_bash.1283049722
/workspace/coverage/cover_reg_top/0.i2c_csr_hw_reset.2122381046
/workspace/coverage/cover_reg_top/0.i2c_csr_mem_rw_with_rand_reset.933254160
/workspace/coverage/cover_reg_top/0.i2c_csr_rw.4068719667
/workspace/coverage/cover_reg_top/0.i2c_intr_test.3816565324
/workspace/coverage/cover_reg_top/0.i2c_same_csr_outstanding.538300607
/workspace/coverage/cover_reg_top/0.i2c_tl_errors.2928653211
/workspace/coverage/cover_reg_top/1.i2c_csr_aliasing.4162097349
/workspace/coverage/cover_reg_top/1.i2c_csr_bit_bash.192889497
/workspace/coverage/cover_reg_top/1.i2c_csr_hw_reset.1406171336
/workspace/coverage/cover_reg_top/1.i2c_csr_mem_rw_with_rand_reset.558114442
/workspace/coverage/cover_reg_top/1.i2c_intr_test.3466186835
/workspace/coverage/cover_reg_top/1.i2c_same_csr_outstanding.3092203252
/workspace/coverage/cover_reg_top/1.i2c_tl_errors.1731289493
/workspace/coverage/cover_reg_top/10.i2c_csr_mem_rw_with_rand_reset.851848606
/workspace/coverage/cover_reg_top/10.i2c_csr_rw.3512824522
/workspace/coverage/cover_reg_top/10.i2c_intr_test.3220233296
/workspace/coverage/cover_reg_top/10.i2c_same_csr_outstanding.1933829189
/workspace/coverage/cover_reg_top/10.i2c_tl_errors.3077904961
/workspace/coverage/cover_reg_top/11.i2c_csr_mem_rw_with_rand_reset.1292219027
/workspace/coverage/cover_reg_top/11.i2c_csr_rw.1663437810
/workspace/coverage/cover_reg_top/11.i2c_same_csr_outstanding.787219993
/workspace/coverage/cover_reg_top/11.i2c_tl_errors.2312521939
/workspace/coverage/cover_reg_top/12.i2c_csr_mem_rw_with_rand_reset.2241886055
/workspace/coverage/cover_reg_top/12.i2c_csr_rw.3254848602
/workspace/coverage/cover_reg_top/12.i2c_intr_test.3442733942
/workspace/coverage/cover_reg_top/12.i2c_same_csr_outstanding.4090918386
/workspace/coverage/cover_reg_top/12.i2c_tl_errors.2239905749
/workspace/coverage/cover_reg_top/12.i2c_tl_intg_err.1965361411
/workspace/coverage/cover_reg_top/13.i2c_csr_mem_rw_with_rand_reset.2317606922
/workspace/coverage/cover_reg_top/13.i2c_csr_rw.3267845061
/workspace/coverage/cover_reg_top/13.i2c_intr_test.2666408082
/workspace/coverage/cover_reg_top/13.i2c_same_csr_outstanding.3415642194
/workspace/coverage/cover_reg_top/13.i2c_tl_errors.3195541969
/workspace/coverage/cover_reg_top/13.i2c_tl_intg_err.234088946
/workspace/coverage/cover_reg_top/14.i2c_csr_mem_rw_with_rand_reset.915555671
/workspace/coverage/cover_reg_top/14.i2c_csr_rw.3379742095
/workspace/coverage/cover_reg_top/14.i2c_intr_test.69368096
/workspace/coverage/cover_reg_top/14.i2c_same_csr_outstanding.3028621955
/workspace/coverage/cover_reg_top/14.i2c_tl_errors.2801383466
/workspace/coverage/cover_reg_top/14.i2c_tl_intg_err.3561720470
/workspace/coverage/cover_reg_top/15.i2c_csr_mem_rw_with_rand_reset.3626395435
/workspace/coverage/cover_reg_top/15.i2c_csr_rw.3368234747
/workspace/coverage/cover_reg_top/15.i2c_intr_test.1259048686
/workspace/coverage/cover_reg_top/15.i2c_same_csr_outstanding.3392783987
/workspace/coverage/cover_reg_top/15.i2c_tl_errors.83405100
/workspace/coverage/cover_reg_top/15.i2c_tl_intg_err.3899981480
/workspace/coverage/cover_reg_top/16.i2c_csr_mem_rw_with_rand_reset.2884154160
/workspace/coverage/cover_reg_top/16.i2c_csr_rw.3909402879
/workspace/coverage/cover_reg_top/16.i2c_intr_test.2850956519
/workspace/coverage/cover_reg_top/16.i2c_same_csr_outstanding.1133187849
/workspace/coverage/cover_reg_top/16.i2c_tl_errors.3791855154
/workspace/coverage/cover_reg_top/16.i2c_tl_intg_err.1151322202
/workspace/coverage/cover_reg_top/17.i2c_csr_mem_rw_with_rand_reset.4269767080
/workspace/coverage/cover_reg_top/17.i2c_csr_rw.3314714439
/workspace/coverage/cover_reg_top/17.i2c_intr_test.1107800489
/workspace/coverage/cover_reg_top/17.i2c_same_csr_outstanding.4059664043
/workspace/coverage/cover_reg_top/17.i2c_tl_errors.378703148
/workspace/coverage/cover_reg_top/17.i2c_tl_intg_err.1692911386
/workspace/coverage/cover_reg_top/18.i2c_csr_mem_rw_with_rand_reset.1352732423
/workspace/coverage/cover_reg_top/18.i2c_csr_rw.3631680576
/workspace/coverage/cover_reg_top/18.i2c_intr_test.3635670554
/workspace/coverage/cover_reg_top/18.i2c_same_csr_outstanding.417383302
/workspace/coverage/cover_reg_top/18.i2c_tl_errors.3469496652
/workspace/coverage/cover_reg_top/18.i2c_tl_intg_err.4092267489
/workspace/coverage/cover_reg_top/19.i2c_csr_mem_rw_with_rand_reset.1358336075
/workspace/coverage/cover_reg_top/19.i2c_csr_rw.1064646191
/workspace/coverage/cover_reg_top/19.i2c_intr_test.1707060510
/workspace/coverage/cover_reg_top/19.i2c_same_csr_outstanding.175502553
/workspace/coverage/cover_reg_top/19.i2c_tl_errors.2346834500
/workspace/coverage/cover_reg_top/19.i2c_tl_intg_err.2856678732
/workspace/coverage/cover_reg_top/2.i2c_csr_aliasing.11622124
/workspace/coverage/cover_reg_top/2.i2c_csr_bit_bash.1591526141
/workspace/coverage/cover_reg_top/2.i2c_csr_hw_reset.4040397611
/workspace/coverage/cover_reg_top/2.i2c_csr_mem_rw_with_rand_reset.3622923372
/workspace/coverage/cover_reg_top/2.i2c_csr_rw.2090143576
/workspace/coverage/cover_reg_top/2.i2c_intr_test.942954766
/workspace/coverage/cover_reg_top/2.i2c_same_csr_outstanding.558139861
/workspace/coverage/cover_reg_top/2.i2c_tl_errors.3846798440
/workspace/coverage/cover_reg_top/2.i2c_tl_intg_err.2424422450
/workspace/coverage/cover_reg_top/20.i2c_intr_test.433776103
/workspace/coverage/cover_reg_top/21.i2c_intr_test.2628877786
/workspace/coverage/cover_reg_top/22.i2c_intr_test.4230429403
/workspace/coverage/cover_reg_top/23.i2c_intr_test.2485545390
/workspace/coverage/cover_reg_top/24.i2c_intr_test.3727680589
/workspace/coverage/cover_reg_top/25.i2c_intr_test.3813321677
/workspace/coverage/cover_reg_top/26.i2c_intr_test.4077920536
/workspace/coverage/cover_reg_top/27.i2c_intr_test.274639704
/workspace/coverage/cover_reg_top/28.i2c_intr_test.2398245407
/workspace/coverage/cover_reg_top/29.i2c_intr_test.648943593
/workspace/coverage/cover_reg_top/3.i2c_csr_aliasing.1071683110
/workspace/coverage/cover_reg_top/3.i2c_csr_bit_bash.487227186
/workspace/coverage/cover_reg_top/3.i2c_csr_hw_reset.628030733
/workspace/coverage/cover_reg_top/3.i2c_csr_mem_rw_with_rand_reset.3027538298
/workspace/coverage/cover_reg_top/3.i2c_csr_rw.794006973
/workspace/coverage/cover_reg_top/3.i2c_intr_test.1839041804
/workspace/coverage/cover_reg_top/3.i2c_same_csr_outstanding.3649241709
/workspace/coverage/cover_reg_top/3.i2c_tl_errors.83646994
/workspace/coverage/cover_reg_top/30.i2c_intr_test.1465333943
/workspace/coverage/cover_reg_top/31.i2c_intr_test.3187498031
/workspace/coverage/cover_reg_top/32.i2c_intr_test.2928738224
/workspace/coverage/cover_reg_top/33.i2c_intr_test.2134363851
/workspace/coverage/cover_reg_top/34.i2c_intr_test.4157204680
/workspace/coverage/cover_reg_top/36.i2c_intr_test.996522065
/workspace/coverage/cover_reg_top/37.i2c_intr_test.330757272
/workspace/coverage/cover_reg_top/38.i2c_intr_test.3089821006
/workspace/coverage/cover_reg_top/39.i2c_intr_test.3429074052
/workspace/coverage/cover_reg_top/4.i2c_csr_aliasing.2103082212
/workspace/coverage/cover_reg_top/4.i2c_csr_bit_bash.760887783
/workspace/coverage/cover_reg_top/4.i2c_csr_hw_reset.2708651614
/workspace/coverage/cover_reg_top/4.i2c_csr_mem_rw_with_rand_reset.2030531035
/workspace/coverage/cover_reg_top/4.i2c_csr_rw.685495076
/workspace/coverage/cover_reg_top/4.i2c_intr_test.2399046328
/workspace/coverage/cover_reg_top/4.i2c_same_csr_outstanding.4215253665
/workspace/coverage/cover_reg_top/40.i2c_intr_test.2772793959
/workspace/coverage/cover_reg_top/41.i2c_intr_test.959542204
/workspace/coverage/cover_reg_top/42.i2c_intr_test.3922814378
/workspace/coverage/cover_reg_top/43.i2c_intr_test.2637732868
/workspace/coverage/cover_reg_top/44.i2c_intr_test.1220580211
/workspace/coverage/cover_reg_top/47.i2c_intr_test.1064475896
/workspace/coverage/cover_reg_top/48.i2c_intr_test.1532843537
/workspace/coverage/cover_reg_top/49.i2c_intr_test.1039580118
/workspace/coverage/cover_reg_top/5.i2c_csr_mem_rw_with_rand_reset.2582155808
/workspace/coverage/cover_reg_top/5.i2c_csr_rw.2280663717
/workspace/coverage/cover_reg_top/5.i2c_intr_test.96259253
/workspace/coverage/cover_reg_top/5.i2c_same_csr_outstanding.357446233
/workspace/coverage/cover_reg_top/5.i2c_tl_errors.192462099
/workspace/coverage/cover_reg_top/5.i2c_tl_intg_err.4115063558
/workspace/coverage/cover_reg_top/6.i2c_csr_mem_rw_with_rand_reset.3744443406
/workspace/coverage/cover_reg_top/6.i2c_csr_rw.724139268
/workspace/coverage/cover_reg_top/6.i2c_intr_test.3377355290
/workspace/coverage/cover_reg_top/6.i2c_same_csr_outstanding.1483483491
/workspace/coverage/cover_reg_top/6.i2c_tl_errors.2160112238
/workspace/coverage/cover_reg_top/6.i2c_tl_intg_err.2184446603
/workspace/coverage/cover_reg_top/7.i2c_csr_mem_rw_with_rand_reset.3175281496
/workspace/coverage/cover_reg_top/7.i2c_csr_rw.3265858338
/workspace/coverage/cover_reg_top/7.i2c_intr_test.2792039494
/workspace/coverage/cover_reg_top/7.i2c_same_csr_outstanding.306350745
/workspace/coverage/cover_reg_top/7.i2c_tl_errors.4036498634
/workspace/coverage/cover_reg_top/7.i2c_tl_intg_err.964076389
/workspace/coverage/cover_reg_top/8.i2c_csr_mem_rw_with_rand_reset.419510093
/workspace/coverage/cover_reg_top/8.i2c_csr_rw.862170506
/workspace/coverage/cover_reg_top/8.i2c_intr_test.664313693
/workspace/coverage/cover_reg_top/8.i2c_same_csr_outstanding.1774671549
/workspace/coverage/cover_reg_top/8.i2c_tl_errors.822710192
/workspace/coverage/cover_reg_top/8.i2c_tl_intg_err.793902186
/workspace/coverage/cover_reg_top/9.i2c_csr_mem_rw_with_rand_reset.42136960
/workspace/coverage/cover_reg_top/9.i2c_csr_rw.621848114
/workspace/coverage/cover_reg_top/9.i2c_intr_test.3430358938
/workspace/coverage/cover_reg_top/9.i2c_same_csr_outstanding.1441841186
/workspace/coverage/cover_reg_top/9.i2c_tl_errors.1669575100
/workspace/coverage/cover_reg_top/9.i2c_tl_intg_err.2646850021
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Total test records in report: 1637
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T20 /workspace/coverage/cover_reg_top/3.i2c_tl_intg_err.1206590472 Dec 31 12:40:06 PM PST 23 Dec 31 12:40:08 PM PST 23 66078659 ps
T21 /workspace/coverage/cover_reg_top/2.i2c_intr_test.942954766 Dec 31 12:39:50 PM PST 23 Dec 31 12:39:51 PM PST 23 22412657 ps
T22 /workspace/coverage/cover_reg_top/2.i2c_tl_errors.3846798440 Dec 31 12:39:52 PM PST 23 Dec 31 12:39:55 PM PST 23 54595955 ps
T23 /workspace/coverage/cover_reg_top/13.i2c_intr_test.2666408082 Dec 31 12:40:17 PM PST 23 Dec 31 12:40:20 PM PST 23 19690715 ps
T24 /workspace/coverage/cover_reg_top/43.i2c_intr_test.2637732868 Dec 31 12:41:02 PM PST 23 Dec 31 12:41:06 PM PST 23 33110984 ps
T25 /workspace/coverage/cover_reg_top/3.i2c_csr_bit_bash.487227186 Dec 31 12:40:18 PM PST 23 Dec 31 12:40:23 PM PST 23 153749226 ps
T26 /workspace/coverage/cover_reg_top/35.i2c_intr_test.1636588470 Dec 31 12:41:06 PM PST 23 Dec 31 12:41:08 PM PST 23 44592808 ps
T27 /workspace/coverage/cover_reg_top/46.i2c_intr_test.2181051238 Dec 31 12:41:00 PM PST 23 Dec 31 12:41:05 PM PST 23 54842181 ps
T28 /workspace/coverage/cover_reg_top/18.i2c_intr_test.3635670554 Dec 31 12:40:46 PM PST 23 Dec 31 12:40:47 PM PST 23 31710291 ps
T29 /workspace/coverage/cover_reg_top/17.i2c_tl_intg_err.1692911386 Dec 31 12:40:19 PM PST 23 Dec 31 12:40:24 PM PST 23 209029832 ps
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