Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.35 99.07 96.59 100.00 94.78 98.13 100.00 92.86


Total tests in report: 1637
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
58.99 58.99 50.24 50.24 51.74 51.74 81.07 81.07 94.78 94.78 50.16 50.16 76.94 76.94 7.98 7.98 /workspace/coverage/cover_reg_top/10.i2c_csr_mem_rw_with_rand_reset.1340533217
78.48 19.49 88.48 38.23 75.67 23.93 85.56 4.49 94.78 0.00 82.22 32.05 91.96 15.01 30.67 22.69 /workspace/coverage/default/35.i2c_host_smoke.1487811958
84.84 6.36 95.07 6.59 83.29 7.62 91.14 5.58 94.78 0.00 92.10 9.88 93.57 1.61 43.91 13.24 /workspace/coverage/default/34.i2c_target_stress_all.2698335057
89.87 5.04 97.22 2.15 87.97 4.68 96.48 5.34 94.78 0.00 94.95 2.85 93.83 0.27 63.87 19.96 /workspace/coverage/cover_reg_top/39.i2c_intr_test.4113376345
92.17 2.30 97.90 0.68 93.72 5.75 96.84 0.36 94.78 0.00 96.16 1.21 93.83 0.00 71.95 8.09 /workspace/coverage/default/26.i2c_host_stress_all.2233764199
94.36 2.19 97.90 0.00 93.72 0.00 97.33 0.49 94.78 0.00 96.16 0.00 99.20 5.36 81.41 9.45 /workspace/coverage/cover_reg_top/2.i2c_csr_bit_bash.1755336435
94.88 0.53 97.95 0.05 94.25 0.53 99.27 1.94 94.78 0.00 96.27 0.11 99.20 0.00 82.46 1.05 /workspace/coverage/cover_reg_top/3.i2c_tl_intg_err.2648246797
95.24 0.35 98.58 0.63 94.59 0.33 99.27 0.00 94.78 0.00 97.26 0.99 99.20 0.00 82.98 0.53 /workspace/coverage/default/4.i2c_target_stress_all.703793535
95.58 0.35 98.58 0.00 94.59 0.00 99.27 0.00 94.78 0.00 97.26 0.00 99.20 0.00 85.40 2.42 /workspace/coverage/default/34.i2c_host_stress_all.77822955
95.88 0.30 98.58 0.00 94.72 0.13 99.51 0.24 94.78 0.00 97.48 0.22 99.20 0.00 86.87 1.47 /workspace/coverage/default/24.i2c_host_override.116392828
96.05 0.17 98.58 0.00 94.85 0.13 99.51 0.00 94.78 0.00 97.48 0.00 99.20 0.00 87.92 1.05 /workspace/coverage/default/0.i2c_target_glitch.2348387546
96.20 0.16 98.58 0.00 94.99 0.13 100.00 0.49 94.78 0.00 97.48 0.00 99.46 0.27 88.13 0.21 /workspace/coverage/default/3.i2c_sec_cm.3829459949
96.34 0.14 98.58 0.00 94.99 0.00 100.00 0.00 94.78 0.00 97.48 0.00 99.46 0.00 89.08 0.95 /workspace/coverage/default/44.i2c_host_stress_all.2621691642
96.45 0.11 98.93 0.34 95.12 0.13 100.00 0.00 94.78 0.00 97.80 0.33 99.46 0.00 89.08 0.00 /workspace/coverage/default/0.i2c_host_mode_toggle.2042020882
96.53 0.08 98.97 0.05 95.32 0.20 100.00 0.00 94.78 0.00 97.91 0.11 99.46 0.00 89.29 0.21 /workspace/coverage/default/2.i2c_host_stress_all.2304738298
96.61 0.08 98.97 0.00 95.45 0.13 100.00 0.00 94.78 0.00 97.91 0.00 99.46 0.00 89.71 0.42 /workspace/coverage/default/2.i2c_host_fifo_reset_fmt.941071647
96.69 0.08 98.97 0.00 95.45 0.00 100.00 0.00 94.78 0.00 97.91 0.00 100.00 0.54 89.71 0.00 /workspace/coverage/cover_reg_top/3.i2c_csr_rw.3412404616
96.75 0.06 98.97 0.00 95.79 0.33 100.00 0.00 94.78 0.00 97.91 0.00 100.00 0.00 89.81 0.11 /workspace/coverage/default/12.i2c_host_stress_all_with_rand_reset.3262003905
96.81 0.06 98.97 0.00 95.79 0.00 100.00 0.00 94.78 0.00 97.91 0.00 100.00 0.00 90.23 0.42 /workspace/coverage/default/43.i2c_target_hrst.2778753679
96.86 0.05 99.02 0.05 95.99 0.20 100.00 0.00 94.78 0.00 98.02 0.11 100.00 0.00 90.23 0.00 /workspace/coverage/default/14.i2c_target_bad_addr.3393495245
96.91 0.05 99.02 0.00 95.99 0.00 100.00 0.00 94.78 0.00 98.02 0.00 100.00 0.00 90.55 0.32 /workspace/coverage/default/9.i2c_host_perf.802239142
96.95 0.04 99.02 0.00 96.06 0.07 100.00 0.00 94.78 0.00 98.02 0.00 100.00 0.00 90.76 0.21 /workspace/coverage/default/32.i2c_host_stress_all.2814955099
96.98 0.03 99.02 0.00 96.19 0.13 100.00 0.00 94.78 0.00 98.02 0.00 100.00 0.00 90.86 0.11 /workspace/coverage/cover_reg_top/5.i2c_tl_intg_err.4280400990
97.01 0.03 99.02 0.00 96.19 0.00 100.00 0.00 94.78 0.00 98.02 0.00 100.00 0.00 91.07 0.21 /workspace/coverage/default/10.i2c_host_override.1648622984
97.04 0.03 99.02 0.00 96.19 0.00 100.00 0.00 94.78 0.00 98.02 0.00 100.00 0.00 91.28 0.21 /workspace/coverage/default/12.i2c_host_rx_oversample.2972766013
97.07 0.03 99.02 0.00 96.19 0.00 100.00 0.00 94.78 0.00 98.02 0.00 100.00 0.00 91.49 0.21 /workspace/coverage/default/13.i2c_host_stress_all.2039618878
97.10 0.03 99.02 0.00 96.19 0.00 100.00 0.00 94.78 0.00 98.02 0.00 100.00 0.00 91.70 0.21 /workspace/coverage/default/13.i2c_target_hrst.2333150356
97.13 0.03 99.02 0.00 96.19 0.00 100.00 0.00 94.78 0.00 98.02 0.00 100.00 0.00 91.91 0.21 /workspace/coverage/default/17.i2c_host_stress_all.317157699
97.16 0.03 99.07 0.05 96.32 0.13 100.00 0.00 94.78 0.00 98.02 0.00 100.00 0.00 91.91 0.00 /workspace/coverage/default/17.i2c_alert_test.3432701095
97.18 0.03 99.07 0.00 96.39 0.07 100.00 0.00 94.78 0.00 98.13 0.11 100.00 0.00 91.91 0.00 /workspace/coverage/default/11.i2c_target_stretch.2851973487
97.20 0.02 99.07 0.00 96.39 0.00 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.02 0.11 /workspace/coverage/cover_reg_top/1.i2c_tl_intg_err.378474440
97.21 0.02 99.07 0.00 96.39 0.00 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.12 0.11 /workspace/coverage/default/10.i2c_target_fifo_reset_acq.936355168
97.23 0.02 99.07 0.00 96.39 0.00 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.23 0.11 /workspace/coverage/default/11.i2c_host_fifo_reset_rx.4243817453
97.24 0.02 99.07 0.00 96.39 0.00 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.33 0.11 /workspace/coverage/default/15.i2c_host_fifo_reset_fmt.1058626645
97.26 0.02 99.07 0.00 96.39 0.00 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.44 0.11 /workspace/coverage/default/28.i2c_host_stress_all.2378486551
97.27 0.02 99.07 0.00 96.39 0.00 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.54 0.11 /workspace/coverage/default/42.i2c_host_fifo_overflow.2220505971
97.29 0.02 99.07 0.00 96.39 0.00 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.65 0.11 /workspace/coverage/default/46.i2c_target_fifo_reset_acq.3754398022
97.30 0.02 99.07 0.00 96.39 0.00 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.75 0.11 /workspace/coverage/default/7.i2c_host_stress_all.3725839908
97.32 0.02 99.07 0.00 96.39 0.00 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.86 0.11 /workspace/coverage/default/8.i2c_host_stress_all.1134483895
97.33 0.01 99.07 0.00 96.46 0.07 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.86 0.00 /workspace/coverage/cover_reg_top/12.i2c_tl_intg_err.2617175982
97.34 0.01 99.07 0.00 96.52 0.07 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.86 0.00 /workspace/coverage/cover_reg_top/8.i2c_tl_intg_err.465407809
97.35 0.01 99.07 0.00 96.59 0.07 100.00 0.00 94.78 0.00 98.13 0.00 100.00 0.00 92.86 0.00 /workspace/coverage/default/29.i2c_target_fifo_reset_acq.384846560


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.i2c_csr_aliasing.1359066079
/workspace/coverage/cover_reg_top/0.i2c_csr_bit_bash.3078576309
/workspace/coverage/cover_reg_top/0.i2c_csr_hw_reset.3016011183
/workspace/coverage/cover_reg_top/0.i2c_csr_mem_rw_with_rand_reset.3097345820
/workspace/coverage/cover_reg_top/0.i2c_csr_rw.3574934354
/workspace/coverage/cover_reg_top/0.i2c_intr_test.685491912
/workspace/coverage/cover_reg_top/0.i2c_same_csr_outstanding.5547301
/workspace/coverage/cover_reg_top/0.i2c_tl_errors.727965673
/workspace/coverage/cover_reg_top/0.i2c_tl_intg_err.3681310155
/workspace/coverage/cover_reg_top/1.i2c_csr_aliasing.3154183058
/workspace/coverage/cover_reg_top/1.i2c_csr_bit_bash.3351980441
/workspace/coverage/cover_reg_top/1.i2c_csr_hw_reset.3589159118
/workspace/coverage/cover_reg_top/1.i2c_csr_mem_rw_with_rand_reset.608384871
/workspace/coverage/cover_reg_top/1.i2c_csr_rw.646350093
/workspace/coverage/cover_reg_top/1.i2c_intr_test.493442183
/workspace/coverage/cover_reg_top/1.i2c_same_csr_outstanding.1270053532
/workspace/coverage/cover_reg_top/1.i2c_tl_errors.1110308913
/workspace/coverage/cover_reg_top/10.i2c_csr_rw.736444423
/workspace/coverage/cover_reg_top/10.i2c_intr_test.509889189
/workspace/coverage/cover_reg_top/10.i2c_tl_errors.2808540410
/workspace/coverage/cover_reg_top/10.i2c_tl_intg_err.813074908
/workspace/coverage/cover_reg_top/11.i2c_csr_mem_rw_with_rand_reset.3294675564
/workspace/coverage/cover_reg_top/11.i2c_csr_rw.3906990650
/workspace/coverage/cover_reg_top/11.i2c_intr_test.3686009654
/workspace/coverage/cover_reg_top/11.i2c_same_csr_outstanding.263994273
/workspace/coverage/cover_reg_top/11.i2c_tl_errors.1925673126
/workspace/coverage/cover_reg_top/11.i2c_tl_intg_err.2230405278
/workspace/coverage/cover_reg_top/12.i2c_csr_mem_rw_with_rand_reset.4010449766
/workspace/coverage/cover_reg_top/12.i2c_csr_rw.3140569752
/workspace/coverage/cover_reg_top/12.i2c_intr_test.3796540074
/workspace/coverage/cover_reg_top/12.i2c_same_csr_outstanding.752307368
/workspace/coverage/cover_reg_top/12.i2c_tl_errors.2330370678
/workspace/coverage/cover_reg_top/13.i2c_csr_rw.1858845101
/workspace/coverage/cover_reg_top/13.i2c_intr_test.1668197488
/workspace/coverage/cover_reg_top/13.i2c_same_csr_outstanding.774530373
/workspace/coverage/cover_reg_top/13.i2c_tl_errors.2712708144
/workspace/coverage/cover_reg_top/13.i2c_tl_intg_err.540010950
/workspace/coverage/cover_reg_top/14.i2c_csr_mem_rw_with_rand_reset.514409787
/workspace/coverage/cover_reg_top/14.i2c_csr_rw.3100716566
/workspace/coverage/cover_reg_top/14.i2c_intr_test.1889823403
/workspace/coverage/cover_reg_top/14.i2c_same_csr_outstanding.2486246062
/workspace/coverage/cover_reg_top/14.i2c_tl_errors.2983626006
/workspace/coverage/cover_reg_top/14.i2c_tl_intg_err.1698994671
/workspace/coverage/cover_reg_top/15.i2c_csr_mem_rw_with_rand_reset.723782559
/workspace/coverage/cover_reg_top/15.i2c_csr_rw.1951198938
/workspace/coverage/cover_reg_top/15.i2c_intr_test.3511460432
/workspace/coverage/cover_reg_top/15.i2c_same_csr_outstanding.1633265155
/workspace/coverage/cover_reg_top/15.i2c_tl_errors.2872965625
/workspace/coverage/cover_reg_top/15.i2c_tl_intg_err.1508348345
/workspace/coverage/cover_reg_top/16.i2c_csr_mem_rw_with_rand_reset.2823244690
/workspace/coverage/cover_reg_top/16.i2c_csr_rw.474176791
/workspace/coverage/cover_reg_top/16.i2c_intr_test.1584181369
/workspace/coverage/cover_reg_top/16.i2c_same_csr_outstanding.2744542762
/workspace/coverage/cover_reg_top/16.i2c_tl_errors.1109812852
/workspace/coverage/cover_reg_top/16.i2c_tl_intg_err.1192442422
/workspace/coverage/cover_reg_top/17.i2c_csr_mem_rw_with_rand_reset.2039193893
/workspace/coverage/cover_reg_top/17.i2c_csr_rw.3040391297
/workspace/coverage/cover_reg_top/17.i2c_intr_test.4213481065
/workspace/coverage/cover_reg_top/17.i2c_same_csr_outstanding.3540532644
/workspace/coverage/cover_reg_top/17.i2c_tl_errors.1790779819
/workspace/coverage/cover_reg_top/18.i2c_csr_mem_rw_with_rand_reset.3392617976
/workspace/coverage/cover_reg_top/18.i2c_csr_rw.1895041271
/workspace/coverage/cover_reg_top/18.i2c_intr_test.355918100
/workspace/coverage/cover_reg_top/18.i2c_same_csr_outstanding.3053595404
/workspace/coverage/cover_reg_top/18.i2c_tl_errors.2535407827
/workspace/coverage/cover_reg_top/18.i2c_tl_intg_err.4283027653
/workspace/coverage/cover_reg_top/19.i2c_csr_mem_rw_with_rand_reset.3144203080
/workspace/coverage/cover_reg_top/19.i2c_csr_rw.3205126288
/workspace/coverage/cover_reg_top/19.i2c_intr_test.2800895677
/workspace/coverage/cover_reg_top/19.i2c_same_csr_outstanding.1321110616
/workspace/coverage/cover_reg_top/19.i2c_tl_intg_err.1655515581
/workspace/coverage/cover_reg_top/2.i2c_csr_aliasing.3983435730
/workspace/coverage/cover_reg_top/2.i2c_csr_hw_reset.4109989215
/workspace/coverage/cover_reg_top/2.i2c_csr_mem_rw_with_rand_reset.1873711598
/workspace/coverage/cover_reg_top/2.i2c_csr_rw.2139764881
/workspace/coverage/cover_reg_top/2.i2c_intr_test.470974043
/workspace/coverage/cover_reg_top/2.i2c_same_csr_outstanding.1841866778
/workspace/coverage/cover_reg_top/2.i2c_tl_errors.1169434035
/workspace/coverage/cover_reg_top/2.i2c_tl_intg_err.2950090770
/workspace/coverage/cover_reg_top/20.i2c_intr_test.1587079049
/workspace/coverage/cover_reg_top/21.i2c_intr_test.3012805159
/workspace/coverage/cover_reg_top/22.i2c_intr_test.382772228
/workspace/coverage/cover_reg_top/23.i2c_intr_test.587490415
/workspace/coverage/cover_reg_top/24.i2c_intr_test.2831162093
/workspace/coverage/cover_reg_top/25.i2c_intr_test.1530354419
/workspace/coverage/cover_reg_top/26.i2c_intr_test.3825488335
/workspace/coverage/cover_reg_top/27.i2c_intr_test.4060303347
/workspace/coverage/cover_reg_top/28.i2c_intr_test.2598389641
/workspace/coverage/cover_reg_top/29.i2c_intr_test.4232092610
/workspace/coverage/cover_reg_top/3.i2c_csr_aliasing.1154259474
/workspace/coverage/cover_reg_top/3.i2c_csr_bit_bash.3230711523
/workspace/coverage/cover_reg_top/3.i2c_csr_hw_reset.975307905
/workspace/coverage/cover_reg_top/3.i2c_csr_mem_rw_with_rand_reset.624168216
/workspace/coverage/cover_reg_top/3.i2c_intr_test.496158220
/workspace/coverage/cover_reg_top/3.i2c_same_csr_outstanding.899158015
/workspace/coverage/cover_reg_top/3.i2c_tl_errors.4141587032
/workspace/coverage/cover_reg_top/30.i2c_intr_test.2006807075
/workspace/coverage/cover_reg_top/31.i2c_intr_test.1371742010
/workspace/coverage/cover_reg_top/32.i2c_intr_test.1287338305
/workspace/coverage/cover_reg_top/33.i2c_intr_test.3448627373
/workspace/coverage/cover_reg_top/34.i2c_intr_test.2632750404
/workspace/coverage/cover_reg_top/35.i2c_intr_test.3310247265
/workspace/coverage/cover_reg_top/36.i2c_intr_test.2662061241
/workspace/coverage/cover_reg_top/37.i2c_intr_test.1817677604
/workspace/coverage/cover_reg_top/38.i2c_intr_test.4211786773
/workspace/coverage/cover_reg_top/4.i2c_csr_aliasing.3816564211
/workspace/coverage/cover_reg_top/4.i2c_csr_bit_bash.1918422058
/workspace/coverage/cover_reg_top/4.i2c_csr_hw_reset.3215531655
/workspace/coverage/cover_reg_top/4.i2c_csr_mem_rw_with_rand_reset.3230992997
/workspace/coverage/cover_reg_top/4.i2c_csr_rw.520485890
/workspace/coverage/cover_reg_top/4.i2c_intr_test.709776014
/workspace/coverage/cover_reg_top/4.i2c_same_csr_outstanding.598170387
/workspace/coverage/cover_reg_top/4.i2c_tl_errors.143795804
/workspace/coverage/cover_reg_top/4.i2c_tl_intg_err.909428489
/workspace/coverage/cover_reg_top/41.i2c_intr_test.2259021452
/workspace/coverage/cover_reg_top/42.i2c_intr_test.3372583630
/workspace/coverage/cover_reg_top/43.i2c_intr_test.3551356728
/workspace/coverage/cover_reg_top/44.i2c_intr_test.1753422969
/workspace/coverage/cover_reg_top/45.i2c_intr_test.99524930
/workspace/coverage/cover_reg_top/46.i2c_intr_test.1412713869
/workspace/coverage/cover_reg_top/47.i2c_intr_test.2287500081
/workspace/coverage/cover_reg_top/48.i2c_intr_test.671558341
/workspace/coverage/cover_reg_top/49.i2c_intr_test.1892270480
/workspace/coverage/cover_reg_top/5.i2c_csr_mem_rw_with_rand_reset.120474862
/workspace/coverage/cover_reg_top/5.i2c_csr_rw.1165342681
/workspace/coverage/cover_reg_top/5.i2c_intr_test.2826974596
/workspace/coverage/cover_reg_top/5.i2c_same_csr_outstanding.1379277050
/workspace/coverage/cover_reg_top/5.i2c_tl_errors.2948831239
/workspace/coverage/cover_reg_top/6.i2c_csr_mem_rw_with_rand_reset.647083981
/workspace/coverage/cover_reg_top/6.i2c_csr_rw.1551905505
/workspace/coverage/cover_reg_top/6.i2c_intr_test.1608228565
/workspace/coverage/cover_reg_top/6.i2c_same_csr_outstanding.1610599951
/workspace/coverage/cover_reg_top/6.i2c_tl_errors.117456852
/workspace/coverage/cover_reg_top/6.i2c_tl_intg_err.3353479609
/workspace/coverage/cover_reg_top/7.i2c_csr_mem_rw_with_rand_reset.1824209713
/workspace/coverage/cover_reg_top/7.i2c_csr_rw.3037322571
/workspace/coverage/cover_reg_top/7.i2c_intr_test.3534992686
/workspace/coverage/cover_reg_top/7.i2c_same_csr_outstanding.3187419818
/workspace/coverage/cover_reg_top/7.i2c_tl_errors.1782561245
/workspace/coverage/cover_reg_top/7.i2c_tl_intg_err.1267025887
/workspace/coverage/cover_reg_top/8.i2c_csr_mem_rw_with_rand_reset.2961275040
/workspace/coverage/cover_reg_top/8.i2c_csr_rw.3298487400
/workspace/coverage/cover_reg_top/8.i2c_intr_test.3791691517
/workspace/coverage/cover_reg_top/8.i2c_same_csr_outstanding.850802753
/workspace/coverage/cover_reg_top/8.i2c_tl_errors.2749668969
/workspace/coverage/cover_reg_top/9.i2c_csr_mem_rw_with_rand_reset.2379679807
/workspace/coverage/cover_reg_top/9.i2c_csr_rw.3272944297
/workspace/coverage/cover_reg_top/9.i2c_intr_test.6748838
/workspace/coverage/cover_reg_top/9.i2c_same_csr_outstanding.2491478986
/workspace/coverage/cover_reg_top/9.i2c_tl_errors.1784550848
/workspace/coverage/cover_reg_top/9.i2c_tl_intg_err.762477048
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Total test records in report: 1637
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T17 /workspace/coverage/cover_reg_top/10.i2c_csr_mem_rw_with_rand_reset.1340533217 Jan 03 12:34:55 PM PST 24 Jan 03 12:36:08 PM PST 24 27217553 ps
T18 /workspace/coverage/cover_reg_top/2.i2c_same_csr_outstanding.1841866778 Jan 03 12:35:00 PM PST 24 Jan 03 12:36:16 PM PST 24 73198239 ps
T19 /workspace/coverage/cover_reg_top/2.i2c_csr_bit_bash.1755336435 Jan 03 12:34:43 PM PST 24 Jan 03 12:35:59 PM PST 24 766720983 ps
T20 /workspace/coverage/cover_reg_top/3.i2c_tl_intg_err.2648246797 Jan 03 12:34:57 PM PST 24 Jan 03 12:36:12 PM PST 24 667757681 ps
T21 /workspace/coverage/cover_reg_top/19.i2c_csr_mem_rw_with_rand_reset.3144203080 Jan 03 12:35:12 PM PST 24 Jan 03 12:36:36 PM PST 24 29735474 ps
T22 /workspace/coverage/cover_reg_top/43.i2c_intr_test.3551356728 Jan 03 12:35:05 PM PST 24 Jan 03 12:36:57 PM PST 24 45185191 ps
T23 /workspace/coverage/cover_reg_top/4.i2c_csr_mem_rw_with_rand_reset.3230992997 Jan 03 12:35:06 PM PST 24 Jan 03 12:36:57 PM PST 24 99532642 ps
T24 /workspace/coverage/cover_reg_top/15.i2c_csr_rw.1951198938 Jan 03 12:35:00 PM PST 24 Jan 03 12:36:15 PM PST 24 35231890 ps
T25 /workspace/coverage/cover_reg_top/20.i2c_intr_test.1587079049 Jan 03 12:34:47 PM PST 24 Jan 03 12:36:09 PM PST 24 16344942 ps
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