Unified Coverage Report :: Module :: i2c_fsm

Module : i2c_fsm

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.i2c_core.u_i2c_fsm	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.i2c_core.u_i2c_fsm

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		i2c_core

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

Line Coverage for Module : i2c_fsm

	Line No.	Total	Covered	Percent
TOTAL		554	0	0.00
ALWAYS	153	17	0	0.00
CONT_ASSIGN	177	1	0	0.00
ALWAYS	180	3	0	0.00
ALWAYS	193	9	0	0.00
ALWAYS	209	7	0	0.00
ALWAYS	222	6	0	0.00
ALWAYS	233	5	0	0.00
ALWAYS	240	7	0	0.00
ALWAYS	253	5	0	0.00
ALWAYS	267	8	0	0.00
ALWAYS	279	8	0	0.00
CONT_ASSIGN	291	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	297	1	0	0.00
ALWAYS	301	9	0	0.00
CONT_ASSIGN	316	1	0	0.00
CONT_ASSIGN	317	1	0	0.00
CONT_ASSIGN	318	1	0	0.00
ALWAYS	322	7	0	0.00
ALWAYS	333	5	0	0.00
CONT_ASSIGN	346	1	0	0.00
CONT_ASSIGN	347	1	0	0.00
CONT_ASSIGN	405	1	0	0.00
ALWAYS	410	6	0	0.00
CONT_ASSIGN	428	1	0	0.00
ALWAYS	433	4	0	0.00
CONT_ASSIGN	450	1	0	0.00
CONT_ASSIGN	454	1	0	0.00
ALWAYS	458	180	0	0.00
CONT_ASSIGN	804	1	0	0.00
CONT_ASSIGN	813	1	0	0.00
CONT_ASSIGN	818	1	0	0.00
ALWAYS	822	239	0	0.00
ALWAYS	1322	3	0	0.00
ALWAYS	1331	5	0	0.00
CONT_ASSIGN	1340	1	0	0.00
CONT_ASSIGN	1341	1	0	0.00
CONT_ASSIGN	1344	1	0	0.00
CONT_ASSIGN	1347	1	0	0.00
CONT_ASSIGN	1351	1	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
153	0	1
154	0	1
155	0	1
156	0	1
157	0	1
158	0	1
159	0	1
160	0	1
161	0	1
162	0	1
163	0	1
164	0	1
165	0	1
166	0	1
169	0	1
170	0	1
172	0	1
177	0	1
180	0	1
181	0	1
183	0	1
193	0	1
194	0	1
195	0	1
196	0	1
197	0	1
199	0	1
200	0	1
201	0	1
203	0	1
209	0	1
210	0	1
211	0	1
212	0	1
213	0	1
214	0	1
216	0	1
222	0	1
223	0	1
224	0	1
225	0	1
226	0	1
227	0	1
			==> MISSING_ELSE
233	0	2
234	0	2
235	0	1
240	0	1
241	0	1
242	0	1
243	0	1
244	0	1
245	0	1
247	0	1
253	0	1
254	0	1
255	0	1
257	0	1
258	0	1
267	0	1
268	0	1
269	0	1
270	0	1
271	0	1
272	0	1
273	0	1
274	0	1
			==> MISSING_ELSE
279	0	1
280	0	1
281	0	1
282	0	1
283	0	1
284	0	1
285	0	1
286	0	1
			==> MISSING_ELSE
291	0	1
294	0	1
297	0	1
301	0	1
302	0	1
303	0	1
304	0	1
305	0	1
308	0	2
309	0	1
311	0	1
316	0	1
317	0	1
318	0	1
322	0	1
323	0	1
324	0	1
325	0	1
326	0	1
327	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
333	0	1
334	0	1
335	0	1
336	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
346	0	1
347	0	1
405	0	1
410	0	1
411	0	1
412	0	1
416	0	1
417	0	1
418	0	1
			==> MISSING_ELSE
428	0	1
433	0	1
434	0	1
435	0	1
436	0	1
			==> MISSING_ELSE
450	0	1
454	0	1
458	0	1
459	0	1
460	0	1
461	0	1
462	0	1
463	0	1
464	0	1
465	0	1
466	0	1
467	0	1
468	0	1
469	0	1
470	0	1
471	0	1
472	0	1
473	0	1
474	0	1
475	0	1
480	0	1
481	0	1
482	0	1
483	0	1
485	0	1
486	0	1
491	0	1
492	0	1
493	0	1
494	0	2
			==> MISSING_ELSE
498	0	1
499	0	1
500	0	1
504	0	1
505	0	1
506	0	1
509	0	1
510	0	1
511	0	1
513	0	1
515	0	1
519	0	1
520	0	1
521	0	1
522	0	1
523	0	2
			==> MISSING_ELSE
524	0	2
			==> MISSING_ELSE
528	0	1
529	0	1
530	0	1
534	0	1
535	0	1
536	0	1
540	0	1
541	0	1
542	0	1
543	0	2
			==> MISSING_ELSE
544	0	1
545	0	2
			==> MISSING_ELSE
546	0	2
			==> MISSING_ELSE
550	0	1
551	0	1
552	0	1
556	0	1
557	0	1
558	0	1
562	0	1
563	0	1
564	0	1
565	0	2
			==> MISSING_ELSE
566	0	2
			==> MISSING_ELSE
570	0	1
571	0	1
572	0	1
573	0	1
574	0	1
			==> MISSING_ELSE
579	0	1
580	0	1
584	0	2
585	0	2
586	0	1
590	0	1
591	0	2
592	0	2
593	0	1
594	0	1
595	0	1
596	0	2
			==> MISSING_ELSE
597	0	2
			==> MISSING_ELSE
601	0	1
602	0	2
603	0	2
604	0	1
605	0	1
609	0	1
610	0	1
611	0	1
615	0	1
616	0	1
617	0	1
621	0	1
622	0	1
623	0	1
624	0	1
628	0	1
634	0	1
638	0	1
639	0	2
640	0	1
641	0	1
645	0	1
649	0	1
650	0	1
654	0	1
658	0	1
659	0	1
663	0	1
664	0	1
668	0	1
669	0	1
672	0	1
674	0	1
675	0	1
			==> MISSING_ELSE
680	0	1
684	0	1
685	0	1
689	0	1
692	0	1
696	0	1
699	0	1
703	0	1
706	0	1
707	0	1
709	0	1
			==> MISSING_ELSE
714	0	1
715	0	1
716	0	1
720	0	1
724	0	1
728	0	1
729	0	1
733	0	1
734	0	1
738	0	1
739	0	1
741	0	1
742	0	1
743	0	1
			==> MISSING_ELSE
749	0	1
750	0	1
752	0	1
753	0	1
757	0	1
758	0	1
762	0	1
763	0	1
764	0	1
768	0	1
769	0	1
772	0	1
773	0	1
795	0	1
797	0	1
798	0	1
800	0	1
			==> MISSING_ELSE
804	0	1
813	0	1
818	0	1
822	0	1
823	0	1
824	0	1
825	0	1
826	0	1
827	0	1
828	0	1
829	0	1
830	0	1
831	0	1
832	0	1
833	0	1
834	0	1
835	0	1
836	0	1
838	0	1
841	0	2
842	0	1
843	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
849	0	1
850	0	1
851	0	1
852	0	1
853	0	1
			==> MISSING_ELSE
858	0	1
859	0	1
860	0	1
861	0	1
			==> MISSING_ELSE
866	0	1
867	0	1
868	0	1
869	0	1
			==> MISSING_ELSE
874	0	1
875	0	1
876	0	1
877	0	1
878	0	1
879	0	1
881	0	1
882	0	1
			==> MISSING_ELSE
889	0	1
890	0	1
891	0	1
892	0	1
893	0	1
			==> MISSING_ELSE
898	0	1
899	0	1
900	0	1
901	0	1
902	0	1
903	0	1
904	0	1
905	0	1
907	0	1
908	0	1
			==> MISSING_ELSE
915	0	1
916	0	1
917	0	1
918	0	1
			==> MISSING_ELSE
923	0	1
924	0	1
925	0	1
926	0	1
			==> MISSING_ELSE
931	0	1
932	0	1
933	0	1
934	0	1
935	0	1
937	0	1
938	0	1
939	0	1
			==> MISSING_ELSE
945	0	1
946	0	1
947	0	1
948	0	1
			==> MISSING_ELSE
953	0	1
954	0	1
955	0	1
956	0	1
957	0	1
			==> MISSING_ELSE
962	0	1
963	0	1
964	0	1
965	0	1
966	0	1
967	0	1
968	0	1
970	0	1
971	0	1
			==> MISSING_ELSE
978	0	1
979	0	1
980	0	1
981	0	1
982	0	1
			==> MISSING_ELSE
987	0	1
988	0	1
989	0	1
990	0	1
991	0	1
			==> MISSING_ELSE
996	0	1
997	0	1
998	0	1
999	0	1
1000	0	1
1001	0	1
1002	0	1
1003	0	1
1005	0	1
1006	0	1
1007	0	1
1010	0	1
1011	0	1
1012	0	1
1013	0	1
			==> MISSING_ELSE
1020	0	1
1021	0	1
1022	0	1
1023	0	1
			==> MISSING_ELSE
1028	0	1
1029	0	1
1030	0	1
1031	0	1
1032	0	1
			==> MISSING_ELSE
1037	0	1
1038	0	1
1039	0	1
1040	0	1
1041	0	1
1042	0	1
1043	0	1
1045	0	1
1046	0	1
1047	0	1
			==> MISSING_ELSE
1054	0	1
1055	0	1
1056	0	1
1057	0	1
1058	0	1
1059	0	1
1060	0	1
1061	0	1
1062	0	1
1064	0	1
1065	0	1
1066	0	1
1067	0	1
1073	0	1
1074	0	1
1075	0	1
1076	0	1
1077	0	1
1078	0	1
1079	0	1
1080	0	1
1082	0	1
1083	0	1
1084	0	1
1090	0	1
1092	0	1
1093	0	1
			==> MISSING_ELSE
1099	0	1
1100	0	1
1101	0	1
1102	0	1
1103	0	1
1104	0	1
			==> MISSING_ELSE
1110	0	1
1111	0	1
			==> MISSING_ELSE
1116	0	2
			==> MISSING_ELSE
1120	0	1
1121	0	1
1122	0	1
1123	0	1
			==> MISSING_ELSE
1128	0	1
1132	0	1
1133	0	1
1134	0	1
1135	0	1
1136	0	1
1137	0	1
			==> MISSING_ELSE
			==> MISSING_ELSE
1143	0	1
1144	0	1
1146	0	1
1147	0	1
1148	0	1
1153	0	2
			==> MISSING_ELSE
1157	0	1
1158	0	1
1159	0	1
1160	0	1
			==> MISSING_ELSE
1165	0	1
1166	0	1
1167	0	1
1169	0	1
1170	0	1
1171	0	1
			==> MISSING_ELSE
1178	0	1
1179	0	1
			==> MISSING_ELSE
1186	0	1
1188	0	1
1189	0	1
1192	0	1
			==> MISSING_ELSE
1201	0	1
1206	0	1
1207	0	1
1208	0	1
1209	0	1
			==> MISSING_ELSE
1215	0	1
1216	0	1
			==> MISSING_ELSE
1221	0	2
			==> MISSING_ELSE
1225	0	1
1226	0	1
1227	0	1
1228	0	1
			==> MISSING_ELSE
1233	0	1
1236	0	1
			==> MISSING_ELSE
1242	0	1
1248	0	1
			==> MISSING_ELSE
1254	0	1
1255	0	1
1262	0	1
1263	0	1
1264	0	1
1267	0	1
			==> MISSING_ELSE
1271	0	1
1272	0	1
			==> MISSING_ELSE
1279	0	2
			==> MISSING_ELSE
1303	0	1
1312	0	1
1313	0	1
1314	0	1
1315	0	1
1316	0	1
			==> MISSING_ELSE
1322	0	1
1323	0	1
1325	0	1
1331	0	1
1332	0	1
1333	0	1
1335	0	1
1336	0	1
1340	0	1
1341	0	1
1344	0	1
1347	0	1
1351	0	1

---

Cond Coverage for Module : i2c_fsm

	Total	Covered	Percent
Conditions	242	0	0.00
Logical	242	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       169
 EXPRESSION ((stretch_idle_cnt == '0) || target_enable_i)
             ------------1-----------    -------2-------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       169
 SUB-EXPRESSION (stretch_idle_cnt == '0)
                ------------1-----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       195
 EXPRESSION (stretch_en && scl_d && ((!scl_i)))
             -----1----    --2--    -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       197
 EXPRESSION (((!target_idle_o)) && event_host_timeout_o)
             ---------1--------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       200
 EXPRESSION (((!target_idle_o)) && scl_i)
             ---------1--------    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       234
 EXPRESSION (fmt_byte_i == '0)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       269
 EXPRESSION (trans_started && ((!host_enable_i)))
             ------1------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       281
 EXPRESSION (pend_restart && ((!host_enable_i)))
             ------1-----    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       291
 EXPRESSION (target_enable_i && ((scl_i_q && scl_i) & (sda_i_q && ((!sda_i)))))
             -------1-------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       291
 SUB-EXPRESSION ((scl_i_q && scl_i) & (sda_i_q && ((!sda_i))))
                 ---------1--------   -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       291
 SUB-EXPRESSION (scl_i_q && scl_i)
                 ---1---    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       291
 SUB-EXPRESSION (sda_i_q && ((!sda_i)))
                 ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       294
 EXPRESSION (target_enable_i && ((scl_i_q && scl_i) & (((!sda_i_q)) && sda_i)))
             -------1-------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       294
 SUB-EXPRESSION ((scl_i_q && scl_i) & (((!sda_i_q)) && sda_i))
                 ---------1--------   -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       294
 SUB-EXPRESSION (scl_i_q && scl_i)
                 ---1---    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       294
 SUB-EXPRESSION (((!sda_i_q)) && sda_i)
                 ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       297
 EXPRESSION (bit_idx == 4'd8)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       305
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       308
 EXPRESSION (input_byte_clr || bit_ack)
             -------1------    ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       316
 EXPRESSION ((input_byte[7:1] & target_mask0_i) == target_address0_i)
            ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       317
 EXPRESSION ((input_byte[7:1] & target_mask1_i) == target_address1_i)
            ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       318
 EXPRESSION (address0_match || address1_match)
             -------1------    -------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       326
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       335
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       412
 EXPRESSION (((!en_sda_interf_det)) && ((|sda_rise_cnt)))
             -----------1----------    --------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       417
 EXPRESSION (en_sda_interf_det && (sda_rise_cnt < sda_rise_latency))
             --------1--------    ----------------2----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       428
 EXPRESSION ((host_idle_o & host_enable_i & ((!sda_i))) | ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i))))
             ---------------------1--------------------   ----------------------------2----------------------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       428
 SUB-EXPRESSION (host_idle_o & host_enable_i & ((!sda_i)))
                 -----1-----   ------2------   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       428
 SUB-EXPRESSION ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i)))
                 -----------------1----------------   --2--   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       428
 SUB-EXPRESSION (sda_rise_cnt == sda_rise_latency)
                -----------------1----------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       435
 EXPRESSION (bit_ack && address_match)
             ---1---    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       454
 EXPRESSION (((!target_idle)) & rw_bit_q & stop_det & ((!expect_stop)))
             --------1-------   ----2---   ----3---   --------4-------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       481
 EXPRESSION (host_enable_i && trans_started)
             ------1------    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       523
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       524
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       543
 EXPRESSION (((!scl_i_q)) && scl_i && sda_i && ((!fmt_flag_nak_ok_i)))
             ------1-----    --2--    --3--    -----------4----------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       545
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       546
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       565
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       566
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       572
 EXPRESSION ((bit_index == '0) && (tcount_q == 20'b1))
             --------1--------    ---------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       572
 SUB-EXPRESSION (bit_index == '0)
                --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       572
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       585
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       592
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       596
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       597
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       603
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       634
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       672
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       741
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       795
 EXPRESSION (start_det || stop_det)
             ----1----    ----2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       798
 EXPRESSION (start_det ? ({AcqRestart, input_byte}) : ({AcqStop, input_byte}))
             ----1----

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       813
 EXPRESSION (((~tx_fifo_rvalid_i)) | (acq_fifo_depth_i > 7'(1'b1)))
             ----------1----------   --------------2--------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       841
 EXPRESSION (((!host_enable_i)) && ((!target_enable_i)))
             ---------1--------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       849
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       858
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       866
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       875
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       890
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       899
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       903
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       915
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       923
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       931
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       945
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       953
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       962
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       965
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       979
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       988
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       997
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       999
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1020
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1028
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1038
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1059
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1077
 EXPRESSION (fmt_fifo_depth_i == 7'b1)
            -------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1090
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1099
 EXPRESSION (bit_ack && address_match)
             ---1---    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1103
 EXPRESSION (bit_ack && ((!address_match)))
             ---1---    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1110
 EXPRESSION ((tcount_q == 20'b1) && ((!scl_i)))
             ---------1---------    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1110
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1128
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1165
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1215
 EXPRESSION ((tcount_q == 20'b1) && ((!scl_i)))
             ---------1---------    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1215
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1233
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1236
 EXPRESSION (acq_fifo_wready ? AcquireByte : StretchAcqFull)
             -------1-------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1248
 EXPRESSION (rw_bit_q ? StretchTx : AcquireByte)
             ----1---

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1271
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1303
 EXPRESSION (((!target_idle)) && ((!target_enable_i)))
             --------1-------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1344
 EXPRESSION (((!target_idle_o)) & (stretch_idle_cnt > host_timeout_i))
             ---------1--------   -----------------2-----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1347
 EXPRESSION (stretch_en && (stretch_idle_cnt[30:0] > stretch_timeout_i) && timeout_enable_i)
             -----1----    ----------------------2---------------------    --------3-------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

---

FSM Coverage for Module : i2c_fsm

Summary for FSM :: state_q

	Total	Covered	Percent
States	43	0	0.00	(Not included in score)
Transitions	142	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
AcquireAckHold	1226	Not Covered
AcquireAckPulse	1221	Not Covered
AcquireAckSetup	1216	Not Covered
AcquireAckWait	1207	Not Covered
AcquireByte	1137	Not Covered
AcquireStart	1314	Not Covered
Active	843	Not Covered
AddrAckHold	1121	Not Covered
AddrAckPulse	1116	Not Covered
AddrAckSetup	1111	Not Covered
AddrAckWait	1100	Not Covered
AddrRead	1092	Not Covered
ClockLow	867	Not Covered
ClockLowAck	904	Not Covered
ClockPulse	881	Not Covered
ClockPulseAck	916	Not Covered
ClockStart	859	Not Covered
ClockStop	933	Not Covered
HoldBit	891	Not Covered
HoldDevAck	924	Not Covered
HoldStart	850	Not Covered
HoldStop	1029	Not Covered
HostClockLowAck	966	Not Covered
HostClockPulseAck	980	Not Covered
HostHoldBitAck	989	Not Covered
Idle	841	Not Covered
PopFmtFifo	937	Not Covered
ReadClockLow	970	Not Covered
ReadClockPulse	946	Not Covered
ReadHoldBit	954	Not Covered
SetupStart	878	Not Covered
SetupStop	1021	Not Covered
StretchAcqFull	1236	Not Covered
StretchAddr	1133	Not Covered
StretchTx	1144	Not Covered
StretchTxSetup	1262	Not Covered
TransmitAck	1167	Not Covered
TransmitAckPulse	1179	Not Covered
TransmitHold	1158	Not Covered
TransmitPulse	1153	Not Covered
TransmitSetup	1146	Not Covered
TransmitWait	1135	Not Covered
WaitForStop	1192	Not Covered

transitions	Line No.	Covered	Tests
AcquireAckHold->AcquireByte	1236	Not Covered
AcquireAckHold->AcquireStart	1314	Not Covered
AcquireAckHold->Idle	1312	Not Covered
AcquireAckHold->StretchAcqFull	1236	Not Covered
AcquireAckPulse->AcquireAckHold	1226	Not Covered
AcquireAckPulse->AcquireStart	1314	Not Covered
AcquireAckPulse->Idle	1312	Not Covered
AcquireAckSetup->AcquireAckPulse	1221	Not Covered
AcquireAckSetup->AcquireStart	1314	Not Covered
AcquireAckSetup->Idle	1312	Not Covered
AcquireAckWait->AcquireAckSetup	1216	Not Covered
AcquireAckWait->AcquireStart	1314	Not Covered
AcquireAckWait->Idle	1312	Not Covered
AcquireByte->AcquireAckWait	1207	Not Covered
AcquireByte->AcquireStart	1314	Not Covered
AcquireByte->Idle	1312	Not Covered
AcquireStart->AddrRead	1092	Not Covered
AcquireStart->Idle	1312	Not Covered
Active->AcquireStart	1314	Not Covered
Active->ClockLow	1064	Not Covered
Active->Idle	1312	Not Covered
Active->ReadClockLow	1056	Not Covered
Active->SetupStart	1060	Not Covered
AddrAckHold->AcquireByte	1137	Not Covered
AddrAckHold->AcquireStart	1314	Not Covered
AddrAckHold->Idle	1312	Not Covered
AddrAckHold->StretchAddr	1133	Not Covered
AddrAckHold->TransmitWait	1135	Not Covered
AddrAckPulse->AcquireStart	1314	Not Covered
AddrAckPulse->AddrAckHold	1121	Not Covered
AddrAckPulse->Idle	1312	Not Covered
AddrAckSetup->AcquireStart	1314	Not Covered
AddrAckSetup->AddrAckPulse	1116	Not Covered
AddrAckSetup->Idle	1312	Not Covered
AddrAckWait->AcquireStart	1314	Not Covered
AddrAckWait->AddrAckSetup	1111	Not Covered
AddrAckWait->Idle	1312	Not Covered
AddrRead->AcquireStart	1314	Not Covered
AddrRead->AddrAckWait	1100	Not Covered
AddrRead->Idle	1104	Not Covered
ClockLow->AcquireStart	1314	Not Covered
ClockLow->ClockPulse	881	Not Covered
ClockLow->Idle	1312	Not Covered
ClockLow->SetupStart	878	Not Covered
ClockLowAck->AcquireStart	1314	Not Covered
ClockLowAck->ClockPulseAck	916	Not Covered
ClockLowAck->Idle	1312	Not Covered
ClockPulse->AcquireStart	1314	Not Covered
ClockPulse->HoldBit	891	Not Covered
ClockPulse->Idle	1312	Not Covered
ClockPulseAck->AcquireStart	1314	Not Covered
ClockPulseAck->HoldDevAck	924	Not Covered
ClockPulseAck->Idle	1312	Not Covered
ClockStart->AcquireStart	1314	Not Covered
ClockStart->ClockLow	867	Not Covered
ClockStart->Idle	1312	Not Covered
ClockStop->AcquireStart	1314	Not Covered
ClockStop->Idle	1312	Not Covered
ClockStop->SetupStop	1021	Not Covered
HoldBit->AcquireStart	1314	Not Covered
HoldBit->ClockLow	907	Not Covered
HoldBit->ClockLowAck	904	Not Covered
HoldBit->Idle	1312	Not Covered
HoldDevAck->AcquireStart	1314	Not Covered
HoldDevAck->ClockStop	933	Not Covered
HoldDevAck->Idle	1312	Not Covered
HoldDevAck->PopFmtFifo	937	Not Covered
HoldStart->AcquireStart	1314	Not Covered
HoldStart->ClockStart	859	Not Covered
HoldStart->Idle	1312	Not Covered
HoldStop->AcquireStart	1314	Not Covered
HoldStop->Idle	1041	Not Covered
HoldStop->PopFmtFifo	1045	Not Covered
HostClockLowAck->AcquireStart	1314	Not Covered
HostClockLowAck->HostClockPulseAck	980	Not Covered
HostClockLowAck->Idle	1312	Not Covered
HostClockPulseAck->AcquireStart	1314	Not Covered
HostClockPulseAck->HostHoldBitAck	989	Not Covered
HostClockPulseAck->Idle	1312	Not Covered
HostHoldBitAck->AcquireStart	1314	Not Covered
HostHoldBitAck->ClockStop	1001	Not Covered
HostHoldBitAck->Idle	1312	Not Covered
HostHoldBitAck->PopFmtFifo	1005	Not Covered
HostHoldBitAck->ReadClockLow	1010	Not Covered
Idle->AcquireStart	1314	Not Covered
Idle->Active	843	Not Covered
PopFmtFifo->AcquireStart	1314	Not Covered
PopFmtFifo->Active	1082	Not Covered
PopFmtFifo->ClockStop	1074	Not Covered
PopFmtFifo->Idle	1078	Not Covered
ReadClockLow->AcquireStart	1314	Not Covered
ReadClockLow->Idle	1312	Not Covered
ReadClockLow->ReadClockPulse	946	Not Covered
ReadClockPulse->AcquireStart	1314	Not Covered
ReadClockPulse->Idle	1312	Not Covered
ReadClockPulse->ReadHoldBit	954	Not Covered
ReadHoldBit->AcquireStart	1314	Not Covered
ReadHoldBit->HostClockLowAck	966	Not Covered
ReadHoldBit->Idle	1312	Not Covered
ReadHoldBit->ReadClockLow	970	Not Covered
SetupStart->AcquireStart	1314	Not Covered
SetupStart->HoldStart	850	Not Covered
SetupStart->Idle	1312	Not Covered
SetupStop->AcquireStart	1314	Not Covered
SetupStop->HoldStop	1029	Not Covered
SetupStop->Idle	1312	Not Covered
StretchAcqFull->AcquireByte	1279	Not Covered
StretchAcqFull->AcquireStart	1314	Not Covered
StretchAcqFull->Idle	1312	Not Covered
StretchAddr->AcquireByte	1248	Not Covered
StretchAddr->AcquireStart	1314	Not Covered
StretchAddr->Idle	1312	Not Covered
StretchAddr->StretchTx	1248	Not Covered
StretchTx->AcquireStart	1314	Not Covered
StretchTx->Idle	1312	Not Covered
StretchTx->StretchTxSetup	1262	Not Covered
StretchTxSetup->AcquireStart	1314	Not Covered
StretchTxSetup->Idle	1312	Not Covered
StretchTxSetup->TransmitSetup	1272	Not Covered
TransmitAck->AcquireStart	1314	Not Covered
TransmitAck->Idle	1312	Not Covered
TransmitAck->TransmitAckPulse	1179	Not Covered
TransmitAckPulse->AcquireStart	1314	Not Covered
TransmitAckPulse->Idle	1312	Not Covered
TransmitAckPulse->TransmitWait	1189	Not Covered
TransmitAckPulse->WaitForStop	1192	Not Covered
TransmitHold->AcquireStart	1314	Not Covered
TransmitHold->Idle	1312	Not Covered
TransmitHold->TransmitAck	1167	Not Covered
TransmitHold->TransmitSetup	1171	Not Covered
TransmitPulse->AcquireStart	1314	Not Covered
TransmitPulse->Idle	1312	Not Covered
TransmitPulse->TransmitHold	1158	Not Covered
TransmitSetup->AcquireStart	1314	Not Covered
TransmitSetup->Idle	1312	Not Covered
TransmitSetup->TransmitPulse	1153	Not Covered
TransmitWait->AcquireStart	1314	Not Covered
TransmitWait->Idle	1312	Not Covered
TransmitWait->StretchTx	1144	Not Covered
TransmitWait->TransmitSetup	1146	Not Covered
WaitForStop->AcquireStart	1314	Not Covered
WaitForStop->Idle	1312	Not Covered

---

Branch Coverage for Module : i2c_fsm

	Line No.	Total	Covered	Percent
Branches		258	0	0.00
IF	154	14	0	0.00
IF	180	2	0	0.00
IF	193	5	0	0.00
IF	209	4	0	0.00
IF	222	4	0	0.00
IF	233	3	0	0.00
IF	240	4	0	0.00
IF	253	2	0	0.00
IF	267	5	0	0.00
IF	279	5	0	0.00
IF	301	5	0	0.00
IF	322	5	0	0.00
IF	333	4	0	0.00
IF	410	4	0	0.00
IF	433	3	0	0.00
CASE	475	73	0	0.00
IF	795	3	0	0.00
CASE	838	105	0	0.00
IF	1303	4	0	0.00
IF	1322	2	0	0.00
IF	1331	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	154	if (load_tcount)
-2-:	155	case (tcount_sel)
-3-:	169	if (((stretch_idle_cnt == '0) || target_enable_i))

Branches:

-1-	-2-	-3-	Status	Tests
1	tSetupStart	-	Not Covered
1	tHoldStart	-	Not Covered
1	tSetupData	-	Not Covered
1	tClockStart	-	Not Covered
1	tClockLow	-	Not Covered
1	tClockPulse	-	Not Covered
1	tHoldBit	-	Not Covered
1	tClockStop	-	Not Covered
1	tSetupStop	-	Not Covered
1	tHoldStop	-	Not Covered
1	tNoDelay	-	Not Covered
1	default	-	Not Covered
0	-	1	Not Covered
0	-	0	Not Covered

	LineNo.	Expression
-1-:	180	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	193	if ((!rst_ni))
-2-:	195	if (((stretch_en && scl_d) && (!scl_i)))
-3-:	197	if (((!target_idle_o) && event_host_timeout_o))
-4-:	200	if (((!target_idle_o) && scl_i))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	209	if ((!rst_ni))
-2-:	211	if (bit_clr)
-3-:	213	if (bit_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	222	if ((!rst_ni))
-2-:	224	if (read_byte_clr)
-3-:	226	if (shift_data_en)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	233	if ((!fmt_flag_read_bytes_i))
-2-:	234	if ((fmt_byte_i == '0))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	240	if ((!rst_ni))
-2-:	242	if (byte_clr)
-3-:	244	if (byte_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	253	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	267	if ((!rst_ni))
-2-:	269	if ((trans_started && (!host_enable_i)))
-3-:	271	if (log_start)
-4-:	273	if (log_stop)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	279	if ((!rst_ni))
-2-:	281	if ((pend_restart && (!host_enable_i)))
-3-:	283	if (req_restart)
-4-:	285	if (log_start)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	301	if ((!rst_ni))
-2-:	303	if (start_det)
-3-:	305	if ((scl_i_q && (!scl_i)))
-4-:	308	if ((input_byte_clr || bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	322	if ((!rst_ni))
-2-:	324	if (input_byte_clr)
-3-:	326	if (((!scl_i_q) && scl_i))
-4-:	327	if ((!bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	333	if ((!rst_ni))
-2-:	335	if (((!scl_i_q) && scl_i))
-3-:	336	if (bit_ack)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	1	Not Covered
0	1	0	Not Covered
0	0	-	Not Covered

	LineNo.	Expression
-1-:	410	if ((!rst_ni))
-2-:	412	if (((!en_sda_interf_det) && (|sda_rise_cnt)))
-3-:	417	if ((en_sda_interf_det && (sda_rise_cnt < sda_rise_latency)))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	433	if ((!rst_ni))
-2-:	435	if ((bit_ack && address_match))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	475	case (state_q)
-2-:	481	if ((host_enable_i && trans_started))
-3-:	494	if (log_start)
-4-:	510	if (pend_restart)
-5-:	523	if ((scl_i_q && (!scl_i)))
-6-:	524	if ((sda_i_q != sda_i))
-7-:	543	if (((((!scl_i_q) && scl_i) && sda_i) && (!fmt_flag_nak_ok_i)))
-8-:	545	if ((scl_i_q && (!scl_i)))
-9-:	546	if ((sda_i_q != sda_i))
-10-:	565	if ((scl_i_q && (!scl_i)))
-11-:	566	if ((sda_i_q != sda_i))
-12-:	572	if (((bit_index == '0) && (tcount_q == 20'b1)))
-13-:	584	if (fmt_flag_read_continue_i)
-14-:	585	if ((byte_index == 9'b1))
-15-:	591	if (fmt_flag_read_continue_i)
-16-:	592	if ((byte_index == 9'b1))
-17-:	596	if ((scl_i_q && (!scl_i)))
-18-:	597	if ((sda_i_q != sda_i))
-19-:	602	if (fmt_flag_read_continue_i)
-20-:	603	if ((byte_index == 9'b1))
-21-:	639	if (fmt_flag_stop_after_i)
-22-:	672	if ((tcount_q == 20'b1))
-23-:	707	if ((!scl_i))
-24-:	741	if ((tcount_q == 20'b1))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	-21-	-22-	-23-	-24-	Status	Tests
Idle	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldBit	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLowAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldDevAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockLow	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	Not Covered
ClockStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Active	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	Not Covered
AcquireStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	Not Covered
TransmitWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	Not Covered
WaitForStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireByte	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchTx	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchTxSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAcqFull	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	795	if ((start_det || stop_det))
-2-:	798	(start_det) ? 

Branches:

-1-	-2-	Status	Tests
1	1	Not Covered
1	0	Not Covered
0	-	Not Covered

	LineNo.	Expression
-1-:	838	case (state_q)
-2-:	841	if (((!host_enable_i) && (!target_enable_i)))
-3-:	842	if (host_enable_i)
-4-:	843	if (fmt_fifo_rvalid_i)
-5-:	849	if ((tcount_q == 20'b1))
-6-:	858	if ((tcount_q == 20'b1))
-7-:	866	if ((tcount_q == 20'b1))
-8-:	875	if ((tcount_q == 20'b1))
-9-:	877	if (pend_restart)
-10-:	890	if ((tcount_q == 20'b1))
-11-:	899	if ((tcount_q == 20'b1))
-12-:	903	if ((bit_index == '0))
-13-:	915	if ((tcount_q == 20'b1))
-14-:	923	if ((tcount_q == 20'b1))
-15-:	931	if ((tcount_q == 20'b1))
-16-:	932	if (fmt_flag_stop_after_i)
-17-:	945	if ((tcount_q == 20'b1))
-18-:	953	if ((tcount_q == 20'b1))
-19-:	962	if ((tcount_q == 20'b1))
-20-:	965	if ((bit_index == '0))
-21-:	979	if ((tcount_q == 20'b1))
-22-:	988	if ((tcount_q == 20'b1))
-23-:	997	if ((tcount_q == 20'b1))
-24-:	999	if ((byte_index == 9'b1))
-25-:	1000	if (fmt_flag_stop_after_i)
-26-:	1020	if ((tcount_q == 20'b1))
-27-:	1028	if ((tcount_q == 20'b1))
-28-:	1038	if ((tcount_q == 20'b1))
-29-:	1040	if ((!host_enable_i))
-30-:	1054	if (fmt_flag_read_bytes_i)
-31-:	1059	if ((fmt_flag_start_before_i && (!trans_started)))
-32-:	1073	if ((!host_enable_i))
-33-:	1077	if ((fmt_fifo_depth_i == 7'b1))
-34-:	1090	if ((scl_i_q && (!scl_i)))
-35-:	1099	if ((bit_ack && address_match))
-36-:	1103	if ((bit_ack && (!address_match)))
-37-:	1110	if (((tcount_q == 20'b1) && (!scl_i)))
-38-:	1116	if (scl_i)
-39-:	1120	if ((!scl_i))
-40-:	1128	if ((tcount_q == 20'b1))
-41-:	1132	if (stretch_addr)
-42-:	1134	if (rw_bit_q)
-43-:	1136	if ((!rw_bit_q))
-44-:	1143	if (stretch_tx)
-45-:	1153	if (scl_i)
-46-:	1157	if ((!scl_i))
-47-:	1165	if ((tcount_q == 20'b1))
-48-:	1166	if (bit_ack)
-49-:	1178	if (scl_i)
-50-:	1186	if ((!scl_i))
-51-:	1188	if (host_ack)
-52-:	1206	if (bit_ack)
-53-:	1215	if (((tcount_q == 20'b1) && (!scl_i)))
-54-:	1221	if (scl_i)
-55-:	1225	if ((!scl_i))
-56-:	1233	if ((tcount_q == 20'b1))
-57-:	1236	(acq_fifo_wready) ? 
-58-:	1242	if ((!stretch_addr))
-59-:	1248	(rw_bit_q) ? 
-60-:	1255	if ((!stretch_tx))
-61-:	1271	if ((tcount_q == 20'b1))
-62-:	1279	if (acq_fifo_wready)

Branches:

Branch	Status	Tests
(1.Idle )->(2)	Not Covered
(1.Idle )->(!2)->(3)->(4)	Not Covered
(1.Idle )->(!2)->(3)->(!4)	Not Covered
(1.Idle )->(!2)->(!3)	Not Covered
(1.SetupStart )->(5)	Not Covered
(1.SetupStart )->(!5)	Not Covered
(1.HoldStart )->(6)	Not Covered
(1.HoldStart )->(!6)	Not Covered
(1.ClockStart )->(7)	Not Covered
(1.ClockStart )->(!7)	Not Covered
(1.ClockLow )->(8)->(9)	Not Covered
(1.ClockLow )->(8)->(!9)	Not Covered
(1.ClockLow )->(!8)	Not Covered
(1.ClockPulse )->(10)	Not Covered
(1.ClockPulse )->(!10)	Not Covered
(1.HoldBit )->(11)->(12)	Not Covered
(1.HoldBit )->(11)->(!12)	Not Covered
(1.HoldBit )->(!11)	Not Covered
(1.ClockLowAck )->(13)	Not Covered
(1.ClockLowAck )->(!13)	Not Covered
(1.ClockPulseAck )->(14)	Not Covered
(1.ClockPulseAck )->(!14)	Not Covered
(1.HoldDevAck )->(15)->(16)	Not Covered
(1.HoldDevAck )->(15)->(!16)	Not Covered
(1.HoldDevAck )->(!15)	Not Covered
(1.ReadClockLow )->(17)	Not Covered
(1.ReadClockLow )->(!17)	Not Covered
(1.ReadClockPulse )->(18)	Not Covered
(1.ReadClockPulse )->(!18)	Not Covered
(1.ReadHoldBit )->(19)->(20)	Not Covered
(1.ReadHoldBit )->(19)->(!20)	Not Covered
(1.ReadHoldBit )->(!19)	Not Covered
(1.HostClockLowAck )->(21)	Not Covered
(1.HostClockLowAck )->(!21)	Not Covered
(1.HostClockPulseAck )->(22)	Not Covered
(1.HostClockPulseAck )->(!22)	Not Covered
(1.HostHoldBitAck )->(23)->(24)->(25)	Not Covered
(1.HostHoldBitAck )->(23)->(24)->(!25)	Not Covered
(1.HostHoldBitAck )->(23)->(!24)	Not Covered
(1.HostHoldBitAck )->(!23)	Not Covered
(1.ClockStop )->(26)	Not Covered
(1.ClockStop )->(!26)	Not Covered
(1.SetupStop )->(27)	Not Covered
(1.SetupStop )->(!27)	Not Covered
(1.HoldStop )->(28)->(29)	Not Covered
(1.HoldStop )->(28)->(!29)	Not Covered
(1.HoldStop )->(!28)	Not Covered
(1.Active )->(30)	Not Covered
(1.Active )->(!30)->(31)	Not Covered
(1.Active )->(!30)->(!31)	Not Covered
(1.PopFmtFifo )->(32)	Not Covered
(1.PopFmtFifo )->(!32)->(33)	Not Covered
(1.PopFmtFifo )->(!32)->(!33)	Not Covered
(1.AcquireStart )->(34)	Not Covered
(1.AcquireStart )->(!34)	Not Covered
(1.AddrRead )->(35)	Not Covered
(1.AddrRead )->(!35)->(36)	Not Covered
(1.AddrRead )->(!35)->(!36)	Not Covered
(1.AddrAckWait )->(37)	Not Covered
(1.AddrAckWait )->(!37)	Not Covered
(1.AddrAckSetup )->(38)	Not Covered
(1.AddrAckSetup )->(!38)	Not Covered
(1.AddrAckPulse )->(39)	Not Covered
(1.AddrAckPulse )->(!39)	Not Covered
(1.AddrAckHold )->(40)->(41)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(42)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(!42)->(43)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(!42)->(!43)	Not Covered
(1.AddrAckHold )->(!40)	Not Covered
(1.TransmitWait )->(44)	Not Covered
(1.TransmitWait )->(!44)	Not Covered
(1.TransmitSetup )->(45)	Not Covered
(1.TransmitSetup )->(!45)	Not Covered
(1.TransmitPulse )->(46)	Not Covered
(1.TransmitPulse )->(!46)	Not Covered
(1.TransmitHold )->(47)->(48)	Not Covered
(1.TransmitHold )->(47)->(!48)	Not Covered
(1.TransmitHold )->(!47)	Not Covered
(1.TransmitAck )->(49)	Not Covered
(1.TransmitAck )->(!49)	Not Covered
(1.TransmitAckPulse )->(50)->(51)	Not Covered
(1.TransmitAckPulse )->(50)->(!51)	Not Covered
(1.TransmitAckPulse )->(!50)	Not Covered
(1.WaitForStop )	Not Covered
(1.AcquireByte )->(52)	Not Covered
(1.AcquireByte )->(!52)	Not Covered
(1.AcquireAckWait )->(53)	Not Covered
(1.AcquireAckWait )->(!53)	Not Covered
(1.AcquireAckSetup )->(54)	Not Covered
(1.AcquireAckSetup )->(!54)	Not Covered
(1.AcquireAckPulse )->(55)	Not Covered
(1.AcquireAckPulse )->(!55)	Not Covered
(1.AcquireAckHold )->(56)->(57)	Not Covered
(1.AcquireAckHold )->(56)->(!57)	Not Covered
(1.AcquireAckHold )->(!56)	Not Covered
(1.StretchAddr )->(58)->(59)	Not Covered
(1.StretchAddr )->(58)->(!59)	Not Covered
(1.StretchAddr )->(!58)	Not Covered
(1.StretchTx )->(60)	Not Covered
(1.StretchTx )->(!60)	Not Covered
(1.StretchTxSetup )->(61)	Not Covered
(1.StretchTxSetup )->(!61)	Not Covered
(1.StretchAcqFull )->(62)	Not Covered
(1.StretchAcqFull )->(!62)	Not Covered
(1.default)	Not Covered

	LineNo.	Expression
-1-:	1303	if (((!target_idle) && (!target_enable_i)))
-2-:	1313	if (start_det)
-3-:	1315	if (stop_det)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	1322	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	1331	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

Line Coverage for Instance : tb.dut.i2c_core.u_i2c_fsm

	Line No.	Total	Covered	Percent
TOTAL		554	0	0.00
ALWAYS	153	17	0	0.00
CONT_ASSIGN	177	1	0	0.00
ALWAYS	180	3	0	0.00
ALWAYS	193	9	0	0.00
ALWAYS	209	7	0	0.00
ALWAYS	222	6	0	0.00
ALWAYS	233	5	0	0.00
ALWAYS	240	7	0	0.00
ALWAYS	253	5	0	0.00
ALWAYS	267	8	0	0.00
ALWAYS	279	8	0	0.00
CONT_ASSIGN	291	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	297	1	0	0.00
ALWAYS	301	9	0	0.00
CONT_ASSIGN	316	1	0	0.00
CONT_ASSIGN	317	1	0	0.00
CONT_ASSIGN	318	1	0	0.00
ALWAYS	322	7	0	0.00
ALWAYS	333	5	0	0.00
CONT_ASSIGN	346	1	0	0.00
CONT_ASSIGN	347	1	0	0.00
CONT_ASSIGN	405	1	0	0.00
ALWAYS	410	6	0	0.00
CONT_ASSIGN	428	1	0	0.00
ALWAYS	433	4	0	0.00
CONT_ASSIGN	450	1	0	0.00
CONT_ASSIGN	454	1	0	0.00
ALWAYS	458	180	0	0.00
CONT_ASSIGN	804	1	0	0.00
CONT_ASSIGN	813	1	0	0.00
CONT_ASSIGN	818	1	0	0.00
ALWAYS	822	239	0	0.00
ALWAYS	1322	3	0	0.00
ALWAYS	1331	5	0	0.00
CONT_ASSIGN	1340	1	0	0.00
CONT_ASSIGN	1341	1	0	0.00
CONT_ASSIGN	1344	1	0	0.00
CONT_ASSIGN	1347	1	0	0.00
CONT_ASSIGN	1351	1	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
153	0	1
154	0	1
155	0	1
156	0	1
157	0	1
158	0	1
159	0	1
160	0	1
161	0	1
162	0	1
163	0	1
164	0	1
165	0	1
166	0	1
169	0	1
170	0	1
172	0	1
177	0	1
180	0	1
181	0	1
183	0	1
193	0	1
194	0	1
195	0	1
196	0	1
197	0	1
199	0	1
200	0	1
201	0	1
203	0	1
209	0	1
210	0	1
211	0	1
212	0	1
213	0	1
214	0	1
216	0	1
222	0	1
223	0	1
224	0	1
225	0	1
226	0	1
227	0	1
			==> MISSING_ELSE
233	0	2
234	0	2
235	0	1
240	0	1
241	0	1
242	0	1
243	0	1
244	0	1
245	0	1
247	0	1
253	0	1
254	0	1
255	0	1
257	0	1
258	0	1
267	0	1
268	0	1
269	0	1
270	0	1
271	0	1
272	0	1
273	0	1
274	0	1
			==> MISSING_ELSE
279	0	1
280	0	1
281	0	1
282	0	1
283	0	1
284	0	1
285	0	1
286	0	1
			==> MISSING_ELSE
291	0	1
294	0	1
297	0	1
301	0	1
302	0	1
303	0	1
304	0	1
305	0	1
308	0	2
309	0	1
311	0	1
316	0	1
317	0	1
318	0	1
322	0	1
323	0	1
324	0	1
325	0	1
326	0	1
327	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
333	0	1
334	0	1
335	0	1
336	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
346	0	1
347	0	1
405	0	1
410	0	1
411	0	1
412	0	1
416	0	1
417	0	1
418	0	1
			==> MISSING_ELSE
428	0	1
433	0	1
434	0	1
435	0	1
436	0	1
			==> MISSING_ELSE
450	0	1
454	0	1
458	0	1
459	0	1
460	0	1
461	0	1
462	0	1
463	0	1
464	0	1
465	0	1
466	0	1
467	0	1
468	0	1
469	0	1
470	0	1
471	0	1
472	0	1
473	0	1
474	0	1
475	0	1
480	0	1
481	0	1
482	0	1
483	0	1
485	0	1
486	0	1
491	0	1
492	0	1
493	0	1
494	0	2
			==> MISSING_ELSE
498	0	1
499	0	1
500	0	1
504	0	1
505	0	1
506	0	1
509	0	1
510	0	1
511	0	1
513	0	1
515	0	1
519	0	1
520	0	1
521	0	1
522	0	1
523	0	2
			==> MISSING_ELSE
524	0	2
			==> MISSING_ELSE
528	0	1
529	0	1
530	0	1
534	0	1
535	0	1
536	0	1
540	0	1
541	0	1
542	0	1
543	0	2
			==> MISSING_ELSE
544	0	1
545	0	2
			==> MISSING_ELSE
546	0	2
			==> MISSING_ELSE
550	0	1
551	0	1
552	0	1
556	0	1
557	0	1
558	0	1
562	0	1
563	0	1
564	0	1
565	0	2
			==> MISSING_ELSE
566	0	2
			==> MISSING_ELSE
570	0	1
571	0	1
572	0	1
573	0	1
574	0	1
			==> MISSING_ELSE
579	0	1
580	0	1
584	0	2
585	0	2
586	0	1
590	0	1
591	0	2
592	0	2
593	0	1
594	0	1
595	0	1
596	0	2
			==> MISSING_ELSE
597	0	2
			==> MISSING_ELSE
601	0	1
602	0	2
603	0	2
604	0	1
605	0	1
609	0	1
610	0	1
611	0	1
615	0	1
616	0	1
617	0	1
621	0	1
622	0	1
623	0	1
624	0	1
628	0	1
634	0	1
638	0	1
639	0	2
640	0	1
641	0	1
645	0	1
649	0	1
650	0	1
654	0	1
658	0	1
659	0	1
663	0	1
664	0	1
668	0	1
669	0	1
672	0	1
674	0	1
675	0	1
			==> MISSING_ELSE
680	0	1
684	0	1
685	0	1
689	0	1
692	0	1
696	0	1
699	0	1
703	0	1
706	0	1
707	0	1
709	0	1
			==> MISSING_ELSE
714	0	1
715	0	1
716	0	1
720	0	1
724	0	1
728	0	1
729	0	1
733	0	1
734	0	1
738	0	1
739	0	1
741	0	1
742	0	1
743	0	1
			==> MISSING_ELSE
749	0	1
750	0	1
752	0	1
753	0	1
757	0	1
758	0	1
762	0	1
763	0	1
764	0	1
768	0	1
769	0	1
772	0	1
773	0	1
795	0	1
797	0	1
798	0	1
800	0	1
			==> MISSING_ELSE
804	0	1
813	0	1
818	0	1
822	0	1
823	0	1
824	0	1
825	0	1
826	0	1
827	0	1
828	0	1
829	0	1
830	0	1
831	0	1
832	0	1
833	0	1
834	0	1
835	0	1
836	0	1
838	0	1
841	0	2
842	0	1
843	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
849	0	1
850	0	1
851	0	1
852	0	1
853	0	1
			==> MISSING_ELSE
858	0	1
859	0	1
860	0	1
861	0	1
			==> MISSING_ELSE
866	0	1
867	0	1
868	0	1
869	0	1
			==> MISSING_ELSE
874	0	1
875	0	1
876	0	1
877	0	1
878	0	1
879	0	1
881	0	1
882	0	1
			==> MISSING_ELSE
889	0	1
890	0	1
891	0	1
892	0	1
893	0	1
			==> MISSING_ELSE
898	0	1
899	0	1
900	0	1
901	0	1
902	0	1
903	0	1
904	0	1
905	0	1
907	0	1
908	0	1
			==> MISSING_ELSE
915	0	1
916	0	1
917	0	1
918	0	1
			==> MISSING_ELSE
923	0	1
924	0	1
925	0	1
926	0	1
			==> MISSING_ELSE
931	0	1
932	0	1
933	0	1
934	0	1
935	0	1
937	0	1
938	0	1
939	0	1
			==> MISSING_ELSE
945	0	1
946	0	1
947	0	1
948	0	1
			==> MISSING_ELSE
953	0	1
954	0	1
955	0	1
956	0	1
957	0	1
			==> MISSING_ELSE
962	0	1
963	0	1
964	0	1
965	0	1
966	0	1
967	0	1
968	0	1
970	0	1
971	0	1
			==> MISSING_ELSE
978	0	1
979	0	1
980	0	1
981	0	1
982	0	1
			==> MISSING_ELSE
987	0	1
988	0	1
989	0	1
990	0	1
991	0	1
			==> MISSING_ELSE
996	0	1
997	0	1
998	0	1
999	0	1
1000	0	1
1001	0	1
1002	0	1
1003	0	1
1005	0	1
1006	0	1
1007	0	1
1010	0	1
1011	0	1
1012	0	1
1013	0	1
			==> MISSING_ELSE
1020	0	1
1021	0	1
1022	0	1
1023	0	1
			==> MISSING_ELSE
1028	0	1
1029	0	1
1030	0	1
1031	0	1
1032	0	1
			==> MISSING_ELSE
1037	0	1
1038	0	1
1039	0	1
1040	0	1
1041	0	1
1042	0	1
1043	0	1
1045	0	1
1046	0	1
1047	0	1
			==> MISSING_ELSE
1054	0	1
1055	0	1
1056	0	1
1057	0	1
1058	0	1
1059	0	1
1060	0	1
1061	0	1
1062	0	1
1064	0	1
1065	0	1
1066	0	1
1067	0	1
1073	0	1
1074	0	1
1075	0	1
1076	0	1
1077	0	1
1078	0	1
1079	0	1
1080	0	1
1082	0	1
1083	0	1
1084	0	1
1090	0	1
1092	0	1
1093	0	1
			==> MISSING_ELSE
1099	0	1
1100	0	1
1101	0	1
1102	0	1
1103	0	1
1104	0	1
			==> MISSING_ELSE
1110	0	1
1111	0	1
			==> MISSING_ELSE
1116	0	2
			==> MISSING_ELSE
1120	0	1
1121	0	1
1122	0	1
1123	0	1
			==> MISSING_ELSE
1128	0	1
1132	0	1
1133	0	1
1134	0	1
1135	0	1
1136	0	1
1137	0	1
			==> MISSING_ELSE
			==> MISSING_ELSE
1143	0	1
1144	0	1
1146	0	1
1147	0	1
1148	0	1
1153	0	2
			==> MISSING_ELSE
1157	0	1
1158	0	1
1159	0	1
1160	0	1
			==> MISSING_ELSE
1165	0	1
1166	0	1
1167	0	1
1169	0	1
1170	0	1
1171	0	1
			==> MISSING_ELSE
1178	0	1
1179	0	1
			==> MISSING_ELSE
1186	0	1
1188	0	1
1189	0	1
1192	0	1
			==> MISSING_ELSE
1201	0	1
1206	0	1
1207	0	1
1208	0	1
1209	0	1
			==> MISSING_ELSE
1215	0	1
1216	0	1
			==> MISSING_ELSE
1221	0	2
			==> MISSING_ELSE
1225	0	1
1226	0	1
1227	0	1
1228	0	1
			==> MISSING_ELSE
1233	0	1
1236	0	1
			==> MISSING_ELSE
1242	0	1
1248	0	1
			==> MISSING_ELSE
1254	0	1
1255	0	1
1262	0	1
1263	0	1
1264	0	1
1267	0	1
			==> MISSING_ELSE
1271	0	1
1272	0	1
			==> MISSING_ELSE
1279	0	2
			==> MISSING_ELSE
1303	0	1
1312	0	1
1313	0	1
1314	0	1
1315	0	1
1316	0	1
			==> MISSING_ELSE
1322	0	1
1323	0	1
1325	0	1
1331	0	1
1332	0	1
1333	0	1
1335	0	1
1336	0	1
1340	0	1
1341	0	1
1344	0	1
1347	0	1
1351	0	1

---

Cond Coverage for Instance : tb.dut.i2c_core.u_i2c_fsm

	Total	Covered	Percent
Conditions	242	0	0.00
Logical	242	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       169
 EXPRESSION ((stretch_idle_cnt == '0) || target_enable_i)
             ------------1-----------    -------2-------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       169
 SUB-EXPRESSION (stretch_idle_cnt == '0)
                ------------1-----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       195
 EXPRESSION (stretch_en && scl_d && ((!scl_i)))
             -----1----    --2--    -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       197
 EXPRESSION (((!target_idle_o)) && event_host_timeout_o)
             ---------1--------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       200
 EXPRESSION (((!target_idle_o)) && scl_i)
             ---------1--------    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       234
 EXPRESSION (fmt_byte_i == '0)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       269
 EXPRESSION (trans_started && ((!host_enable_i)))
             ------1------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       281
 EXPRESSION (pend_restart && ((!host_enable_i)))
             ------1-----    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       291
 EXPRESSION (target_enable_i && ((scl_i_q && scl_i) & (sda_i_q && ((!sda_i)))))
             -------1-------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       291
 SUB-EXPRESSION ((scl_i_q && scl_i) & (sda_i_q && ((!sda_i))))
                 ---------1--------   -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       291
 SUB-EXPRESSION (scl_i_q && scl_i)
                 ---1---    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       291
 SUB-EXPRESSION (sda_i_q && ((!sda_i)))
                 ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       294
 EXPRESSION (target_enable_i && ((scl_i_q && scl_i) & (((!sda_i_q)) && sda_i)))
             -------1-------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       294
 SUB-EXPRESSION ((scl_i_q && scl_i) & (((!sda_i_q)) && sda_i))
                 ---------1--------   -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       294
 SUB-EXPRESSION (scl_i_q && scl_i)
                 ---1---    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       294
 SUB-EXPRESSION (((!sda_i_q)) && sda_i)
                 ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       297
 EXPRESSION (bit_idx == 4'd8)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       305
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       308
 EXPRESSION (input_byte_clr || bit_ack)
             -------1------    ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       316
 EXPRESSION ((input_byte[7:1] & target_mask0_i) == target_address0_i)
            ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       317
 EXPRESSION ((input_byte[7:1] & target_mask1_i) == target_address1_i)
            ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       318
 EXPRESSION (address0_match || address1_match)
             -------1------    -------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       326
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       335
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       412
 EXPRESSION (((!en_sda_interf_det)) && ((|sda_rise_cnt)))
             -----------1----------    --------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       417
 EXPRESSION (en_sda_interf_det && (sda_rise_cnt < sda_rise_latency))
             --------1--------    ----------------2----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       428
 EXPRESSION ((host_idle_o & host_enable_i & ((!sda_i))) | ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i))))
             ---------------------1--------------------   ----------------------------2----------------------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       428
 SUB-EXPRESSION (host_idle_o & host_enable_i & ((!sda_i)))
                 -----1-----   ------2------   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       428
 SUB-EXPRESSION ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i)))
                 -----------------1----------------   --2--   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       428
 SUB-EXPRESSION (sda_rise_cnt == sda_rise_latency)
                -----------------1----------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       435
 EXPRESSION (bit_ack && address_match)
             ---1---    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       454
 EXPRESSION (((!target_idle)) & rw_bit_q & stop_det & ((!expect_stop)))
             --------1-------   ----2---   ----3---   --------4-------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       481
 EXPRESSION (host_enable_i && trans_started)
             ------1------    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       523
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       524
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       543
 EXPRESSION (((!scl_i_q)) && scl_i && sda_i && ((!fmt_flag_nak_ok_i)))
             ------1-----    --2--    --3--    -----------4----------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       545
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       546
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       565
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       566
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       572
 EXPRESSION ((bit_index == '0) && (tcount_q == 20'b1))
             --------1--------    ---------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       572
 SUB-EXPRESSION (bit_index == '0)
                --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       572
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       585
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       592
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       596
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       597
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       603
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       634
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       672
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       741
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       795
 EXPRESSION (start_det || stop_det)
             ----1----    ----2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       798
 EXPRESSION (start_det ? ({AcqRestart, input_byte}) : ({AcqStop, input_byte}))
             ----1----

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       813
 EXPRESSION (((~tx_fifo_rvalid_i)) | (acq_fifo_depth_i > 7'(1'b1)))
             ----------1----------   --------------2--------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       841
 EXPRESSION (((!host_enable_i)) && ((!target_enable_i)))
             ---------1--------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       849
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       858
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       866
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       875
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       890
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       899
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       903
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       915
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       923
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       931
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       945
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       953
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       962
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       965
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       979
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       988
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       997
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       999
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1020
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1028
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1038
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1059
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1077
 EXPRESSION (fmt_fifo_depth_i == 7'b1)
            -------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1090
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1099
 EXPRESSION (bit_ack && address_match)
             ---1---    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1103
 EXPRESSION (bit_ack && ((!address_match)))
             ---1---    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1110
 EXPRESSION ((tcount_q == 20'b1) && ((!scl_i)))
             ---------1---------    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1110
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1128
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1165
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1215
 EXPRESSION ((tcount_q == 20'b1) && ((!scl_i)))
             ---------1---------    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1215
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1233
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1236
 EXPRESSION (acq_fifo_wready ? AcquireByte : StretchAcqFull)
             -------1-------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1248
 EXPRESSION (rw_bit_q ? StretchTx : AcquireByte)
             ----1---

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1271
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1303
 EXPRESSION (((!target_idle)) && ((!target_enable_i)))
             --------1-------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1344
 EXPRESSION (((!target_idle_o)) & (stretch_idle_cnt > host_timeout_i))
             ---------1--------   -----------------2-----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1347
 EXPRESSION (stretch_en && (stretch_idle_cnt[30:0] > stretch_timeout_i) && timeout_enable_i)
             -----1----    ----------------------2---------------------    --------3-------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

---

FSM Coverage for Instance : tb.dut.i2c_core.u_i2c_fsm

Summary for FSM :: state_q

	Total	Covered	Percent
States	43	0	0.00	(Not included in score)
Transitions	115	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
AcquireAckHold	1226	Not Covered
AcquireAckPulse	1221	Not Covered
AcquireAckSetup	1216	Not Covered
AcquireAckWait	1207	Not Covered
AcquireByte	1137	Not Covered
AcquireStart	1314	Not Covered
Active	843	Not Covered
AddrAckHold	1121	Not Covered
AddrAckPulse	1116	Not Covered
AddrAckSetup	1111	Not Covered
AddrAckWait	1100	Not Covered
AddrRead	1092	Not Covered
ClockLow	867	Not Covered
ClockLowAck	904	Not Covered
ClockPulse	881	Not Covered
ClockPulseAck	916	Not Covered
ClockStart	859	Not Covered
ClockStop	933	Not Covered
HoldBit	891	Not Covered
HoldDevAck	924	Not Covered
HoldStart	850	Not Covered
HoldStop	1029	Not Covered
HostClockLowAck	966	Not Covered
HostClockPulseAck	980	Not Covered
HostHoldBitAck	989	Not Covered
Idle	841	Not Covered
PopFmtFifo	937	Not Covered
ReadClockLow	970	Not Covered
ReadClockPulse	946	Not Covered
ReadHoldBit	954	Not Covered
SetupStart	878	Not Covered
SetupStop	1021	Not Covered
StretchAcqFull	1236	Not Covered
StretchAddr	1133	Not Covered
StretchTx	1144	Not Covered
StretchTxSetup	1262	Not Covered
TransmitAck	1167	Not Covered
TransmitAckPulse	1179	Not Covered
TransmitHold	1158	Not Covered
TransmitPulse	1153	Not Covered
TransmitSetup	1146	Not Covered
TransmitWait	1135	Not Covered
WaitForStop	1192	Not Covered

transitions	Line No.	Covered	Tests
AcquireAckHold->AcquireByte	1236	Not Covered
AcquireAckHold->AcquireStart	1314	Not Covered
AcquireAckHold->Idle	1312	Not Covered
AcquireAckHold->StretchAcqFull	1236	Not Covered
AcquireAckPulse->AcquireAckHold	1226	Not Covered
AcquireAckPulse->AcquireStart	1314	Not Covered
AcquireAckPulse->Idle	1312	Not Covered
AcquireAckSetup->AcquireAckPulse	1221	Not Covered
AcquireAckSetup->AcquireStart	1314	Not Covered
AcquireAckSetup->Idle	1312	Not Covered
AcquireAckWait->AcquireAckSetup	1216	Not Covered
AcquireAckWait->AcquireStart	1314	Not Covered
AcquireAckWait->Idle	1312	Not Covered
AcquireByte->AcquireAckWait	1207	Not Covered
AcquireByte->AcquireStart	1314	Not Covered
AcquireByte->Idle	1312	Not Covered
AcquireStart->AddrRead	1092	Not Covered
AcquireStart->Idle	1312	Not Covered
Active->AcquireStart	1314	Excluded
Active->ClockLow	1064	Not Covered
Active->Idle	1312	Excluded
Active->ReadClockLow	1056	Not Covered
Active->SetupStart	1060	Not Covered
AddrAckHold->AcquireByte	1137	Not Covered
AddrAckHold->AcquireStart	1314	Not Covered
AddrAckHold->Idle	1312	Not Covered
AddrAckHold->StretchAddr	1133	Not Covered
AddrAckHold->TransmitWait	1135	Not Covered
AddrAckPulse->AcquireStart	1314	Not Covered
AddrAckPulse->AddrAckHold	1121	Not Covered
AddrAckPulse->Idle	1312	Not Covered
AddrAckSetup->AcquireStart	1314	Not Covered
AddrAckSetup->AddrAckPulse	1116	Not Covered
AddrAckSetup->Idle	1312	Not Covered
AddrAckWait->AcquireStart	1314	Not Covered
AddrAckWait->AddrAckSetup	1111	Not Covered
AddrAckWait->Idle	1312	Not Covered
AddrRead->AcquireStart	1314	Not Covered
AddrRead->AddrAckWait	1100	Not Covered
AddrRead->Idle	1104	Not Covered
ClockLow->AcquireStart	1314	Excluded
ClockLow->ClockPulse	881	Not Covered
ClockLow->Idle	1312	Not Covered
ClockLow->SetupStart	878	Not Covered
ClockLowAck->AcquireStart	1314	Excluded
ClockLowAck->ClockPulseAck	916	Not Covered
ClockLowAck->Idle	1312	Not Covered
ClockPulse->AcquireStart	1314	Excluded
ClockPulse->HoldBit	891	Not Covered
ClockPulse->Idle	1312	Not Covered
ClockPulseAck->AcquireStart	1314	Excluded
ClockPulseAck->HoldDevAck	924	Not Covered
ClockPulseAck->Idle	1312	Not Covered
ClockStart->AcquireStart	1314	Excluded
ClockStart->ClockLow	867	Not Covered
ClockStart->Idle	1312	Excluded
ClockStop->AcquireStart	1314	Excluded
ClockStop->Idle	1312	Excluded
ClockStop->SetupStop	1021	Not Covered
HoldBit->AcquireStart	1314	Excluded
HoldBit->ClockLow	907	Not Covered
HoldBit->ClockLowAck	904	Not Covered
HoldBit->Idle	1312	Not Covered
HoldDevAck->AcquireStart	1314	Excluded
HoldDevAck->ClockStop	933	Not Covered
HoldDevAck->Idle	1312	Not Covered
HoldDevAck->PopFmtFifo	937	Not Covered
HoldStart->AcquireStart	1314	Excluded
HoldStart->ClockStart	859	Not Covered
HoldStart->Idle	1312	Excluded
HoldStop->AcquireStart	1314	Excluded
HoldStop->Idle	1041	Not Covered
HoldStop->PopFmtFifo	1045	Not Covered
HostClockLowAck->AcquireStart	1314	Excluded
HostClockLowAck->HostClockPulseAck	980	Not Covered
HostClockLowAck->Idle	1312	Excluded
HostClockPulseAck->AcquireStart	1314	Excluded
HostClockPulseAck->HostHoldBitAck	989	Not Covered
HostClockPulseAck->Idle	1312	Not Covered
HostHoldBitAck->AcquireStart	1314	Excluded
HostHoldBitAck->ClockStop	1001	Not Covered
HostHoldBitAck->Idle	1312	Not Covered
HostHoldBitAck->PopFmtFifo	1005	Not Covered
HostHoldBitAck->ReadClockLow	1010	Not Covered
Idle->AcquireStart	1314	Not Covered
Idle->Active	843	Not Covered
PopFmtFifo->AcquireStart	1314	Excluded
PopFmtFifo->Active	1082	Not Covered
PopFmtFifo->ClockStop	1074	Not Covered
PopFmtFifo->Idle	1078	Not Covered
ReadClockLow->AcquireStart	1314	Excluded
ReadClockLow->Idle	1312	Not Covered
ReadClockLow->ReadClockPulse	946	Not Covered
ReadClockPulse->AcquireStart	1314	Excluded
ReadClockPulse->Idle	1312	Not Covered
ReadClockPulse->ReadHoldBit	954	Not Covered
ReadHoldBit->AcquireStart	1314	Excluded
ReadHoldBit->HostClockLowAck	966	Not Covered
ReadHoldBit->Idle	1312	Not Covered
ReadHoldBit->ReadClockLow	970	Not Covered
SetupStart->AcquireStart	1314	Excluded
SetupStart->HoldStart	850	Not Covered
SetupStart->Idle	1312	Excluded
SetupStop->AcquireStart	1314	Excluded
SetupStop->HoldStop	1029	Not Covered
SetupStop->Idle	1312	Excluded
StretchAcqFull->AcquireByte	1279	Not Covered
StretchAcqFull->AcquireStart	1314	Not Covered
StretchAcqFull->Idle	1312	Not Covered
StretchAddr->AcquireByte	1248	Not Covered
StretchAddr->AcquireStart	1314	Not Covered
StretchAddr->Idle	1312	Not Covered
StretchAddr->StretchTx	1248	Not Covered
StretchTx->AcquireStart	1314	Not Covered
StretchTx->Idle	1312	Not Covered
StretchTx->StretchTxSetup	1262	Not Covered
StretchTxSetup->AcquireStart	1314	Not Covered
StretchTxSetup->Idle	1312	Not Covered
StretchTxSetup->TransmitSetup	1272	Not Covered
TransmitAck->AcquireStart	1314	Not Covered
TransmitAck->Idle	1312	Not Covered
TransmitAck->TransmitAckPulse	1179	Not Covered
TransmitAckPulse->AcquireStart	1314	Not Covered
TransmitAckPulse->Idle	1312	Not Covered
TransmitAckPulse->TransmitWait	1189	Not Covered
TransmitAckPulse->WaitForStop	1192	Not Covered
TransmitHold->AcquireStart	1314	Not Covered
TransmitHold->Idle	1312	Not Covered
TransmitHold->TransmitAck	1167	Not Covered
TransmitHold->TransmitSetup	1171	Not Covered
TransmitPulse->AcquireStart	1314	Not Covered
TransmitPulse->Idle	1312	Not Covered
TransmitPulse->TransmitHold	1158	Not Covered
TransmitSetup->AcquireStart	1314	Not Covered
TransmitSetup->Idle	1312	Not Covered
TransmitSetup->TransmitPulse	1153	Not Covered
TransmitWait->AcquireStart	1314	Not Covered
TransmitWait->Idle	1312	Not Covered
TransmitWait->StretchTx	1144	Not Covered
TransmitWait->TransmitSetup	1146	Not Covered
WaitForStop->AcquireStart	1314	Not Covered
WaitForStop->Idle	1312	Not Covered

---

Branch Coverage for Instance : tb.dut.i2c_core.u_i2c_fsm

	Line No.	Total	Covered	Percent
Branches		258	0	0.00
IF	154	14	0	0.00
IF	180	2	0	0.00
IF	193	5	0	0.00
IF	209	4	0	0.00
IF	222	4	0	0.00
IF	233	3	0	0.00
IF	240	4	0	0.00
IF	253	2	0	0.00
IF	267	5	0	0.00
IF	279	5	0	0.00
IF	301	5	0	0.00
IF	322	5	0	0.00
IF	333	4	0	0.00
IF	410	4	0	0.00
IF	433	3	0	0.00
CASE	475	73	0	0.00
IF	795	3	0	0.00
CASE	838	105	0	0.00
IF	1303	4	0	0.00
IF	1322	2	0	0.00
IF	1331	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	154	if (load_tcount)
-2-:	155	case (tcount_sel)
-3-:	169	if (((stretch_idle_cnt == '0) || target_enable_i))

Branches:

-1-	-2-	-3-	Status	Tests
1	tSetupStart	-	Not Covered
1	tHoldStart	-	Not Covered
1	tSetupData	-	Not Covered
1	tClockStart	-	Not Covered
1	tClockLow	-	Not Covered
1	tClockPulse	-	Not Covered
1	tHoldBit	-	Not Covered
1	tClockStop	-	Not Covered
1	tSetupStop	-	Not Covered
1	tHoldStop	-	Not Covered
1	tNoDelay	-	Not Covered
1	default	-	Not Covered
0	-	1	Not Covered
0	-	0	Not Covered

	LineNo.	Expression
-1-:	180	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	193	if ((!rst_ni))
-2-:	195	if (((stretch_en && scl_d) && (!scl_i)))
-3-:	197	if (((!target_idle_o) && event_host_timeout_o))
-4-:	200	if (((!target_idle_o) && scl_i))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	209	if ((!rst_ni))
-2-:	211	if (bit_clr)
-3-:	213	if (bit_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	222	if ((!rst_ni))
-2-:	224	if (read_byte_clr)
-3-:	226	if (shift_data_en)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	233	if ((!fmt_flag_read_bytes_i))
-2-:	234	if ((fmt_byte_i == '0))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	240	if ((!rst_ni))
-2-:	242	if (byte_clr)
-3-:	244	if (byte_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	253	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	267	if ((!rst_ni))
-2-:	269	if ((trans_started && (!host_enable_i)))
-3-:	271	if (log_start)
-4-:	273	if (log_stop)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	279	if ((!rst_ni))
-2-:	281	if ((pend_restart && (!host_enable_i)))
-3-:	283	if (req_restart)
-4-:	285	if (log_start)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	301	if ((!rst_ni))
-2-:	303	if (start_det)
-3-:	305	if ((scl_i_q && (!scl_i)))
-4-:	308	if ((input_byte_clr || bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	322	if ((!rst_ni))
-2-:	324	if (input_byte_clr)
-3-:	326	if (((!scl_i_q) && scl_i))
-4-:	327	if ((!bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	333	if ((!rst_ni))
-2-:	335	if (((!scl_i_q) && scl_i))
-3-:	336	if (bit_ack)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	1	Not Covered
0	1	0	Not Covered
0	0	-	Not Covered

	LineNo.	Expression
-1-:	410	if ((!rst_ni))
-2-:	412	if (((!en_sda_interf_det) && (|sda_rise_cnt)))
-3-:	417	if ((en_sda_interf_det && (sda_rise_cnt < sda_rise_latency)))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	433	if ((!rst_ni))
-2-:	435	if ((bit_ack && address_match))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	475	case (state_q)
-2-:	481	if ((host_enable_i && trans_started))
-3-:	494	if (log_start)
-4-:	510	if (pend_restart)
-5-:	523	if ((scl_i_q && (!scl_i)))
-6-:	524	if ((sda_i_q != sda_i))
-7-:	543	if (((((!scl_i_q) && scl_i) && sda_i) && (!fmt_flag_nak_ok_i)))
-8-:	545	if ((scl_i_q && (!scl_i)))
-9-:	546	if ((sda_i_q != sda_i))
-10-:	565	if ((scl_i_q && (!scl_i)))
-11-:	566	if ((sda_i_q != sda_i))
-12-:	572	if (((bit_index == '0) && (tcount_q == 20'b1)))
-13-:	584	if (fmt_flag_read_continue_i)
-14-:	585	if ((byte_index == 9'b1))
-15-:	591	if (fmt_flag_read_continue_i)
-16-:	592	if ((byte_index == 9'b1))
-17-:	596	if ((scl_i_q && (!scl_i)))
-18-:	597	if ((sda_i_q != sda_i))
-19-:	602	if (fmt_flag_read_continue_i)
-20-:	603	if ((byte_index == 9'b1))
-21-:	639	if (fmt_flag_stop_after_i)
-22-:	672	if ((tcount_q == 20'b1))
-23-:	707	if ((!scl_i))
-24-:	741	if ((tcount_q == 20'b1))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	-21-	-22-	-23-	-24-	Status	Tests
Idle	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldBit	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLowAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldDevAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockLow	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	Not Covered
ClockStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Active	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	Not Covered
AcquireStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	Not Covered
TransmitWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	Not Covered
WaitForStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireByte	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchTx	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchTxSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAcqFull	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	795	if ((start_det || stop_det))
-2-:	798	(start_det) ? 

Branches:

-1-	-2-	Status	Tests
1	1	Not Covered
1	0	Not Covered
0	-	Not Covered

	LineNo.	Expression
-1-:	838	case (state_q)
-2-:	841	if (((!host_enable_i) && (!target_enable_i)))
-3-:	842	if (host_enable_i)
-4-:	843	if (fmt_fifo_rvalid_i)
-5-:	849	if ((tcount_q == 20'b1))
-6-:	858	if ((tcount_q == 20'b1))
-7-:	866	if ((tcount_q == 20'b1))
-8-:	875	if ((tcount_q == 20'b1))
-9-:	877	if (pend_restart)
-10-:	890	if ((tcount_q == 20'b1))
-11-:	899	if ((tcount_q == 20'b1))
-12-:	903	if ((bit_index == '0))
-13-:	915	if ((tcount_q == 20'b1))
-14-:	923	if ((tcount_q == 20'b1))
-15-:	931	if ((tcount_q == 20'b1))
-16-:	932	if (fmt_flag_stop_after_i)
-17-:	945	if ((tcount_q == 20'b1))
-18-:	953	if ((tcount_q == 20'b1))
-19-:	962	if ((tcount_q == 20'b1))
-20-:	965	if ((bit_index == '0))
-21-:	979	if ((tcount_q == 20'b1))
-22-:	988	if ((tcount_q == 20'b1))
-23-:	997	if ((tcount_q == 20'b1))
-24-:	999	if ((byte_index == 9'b1))
-25-:	1000	if (fmt_flag_stop_after_i)
-26-:	1020	if ((tcount_q == 20'b1))
-27-:	1028	if ((tcount_q == 20'b1))
-28-:	1038	if ((tcount_q == 20'b1))
-29-:	1040	if ((!host_enable_i))
-30-:	1054	if (fmt_flag_read_bytes_i)
-31-:	1059	if ((fmt_flag_start_before_i && (!trans_started)))
-32-:	1073	if ((!host_enable_i))
-33-:	1077	if ((fmt_fifo_depth_i == 7'b1))
-34-:	1090	if ((scl_i_q && (!scl_i)))
-35-:	1099	if ((bit_ack && address_match))
-36-:	1103	if ((bit_ack && (!address_match)))
-37-:	1110	if (((tcount_q == 20'b1) && (!scl_i)))
-38-:	1116	if (scl_i)
-39-:	1120	if ((!scl_i))
-40-:	1128	if ((tcount_q == 20'b1))
-41-:	1132	if (stretch_addr)
-42-:	1134	if (rw_bit_q)
-43-:	1136	if ((!rw_bit_q))
-44-:	1143	if (stretch_tx)
-45-:	1153	if (scl_i)
-46-:	1157	if ((!scl_i))
-47-:	1165	if ((tcount_q == 20'b1))
-48-:	1166	if (bit_ack)
-49-:	1178	if (scl_i)
-50-:	1186	if ((!scl_i))
-51-:	1188	if (host_ack)
-52-:	1206	if (bit_ack)
-53-:	1215	if (((tcount_q == 20'b1) && (!scl_i)))
-54-:	1221	if (scl_i)
-55-:	1225	if ((!scl_i))
-56-:	1233	if ((tcount_q == 20'b1))
-57-:	1236	(acq_fifo_wready) ? 
-58-:	1242	if ((!stretch_addr))
-59-:	1248	(rw_bit_q) ? 
-60-:	1255	if ((!stretch_tx))
-61-:	1271	if ((tcount_q == 20'b1))
-62-:	1279	if (acq_fifo_wready)

Branches:

Branch	Status	Tests
(1.Idle )->(2)	Not Covered
(1.Idle )->(!2)->(3)->(4)	Not Covered
(1.Idle )->(!2)->(3)->(!4)	Not Covered
(1.Idle )->(!2)->(!3)	Not Covered
(1.SetupStart )->(5)	Not Covered
(1.SetupStart )->(!5)	Not Covered
(1.HoldStart )->(6)	Not Covered
(1.HoldStart )->(!6)	Not Covered
(1.ClockStart )->(7)	Not Covered
(1.ClockStart )->(!7)	Not Covered
(1.ClockLow )->(8)->(9)	Not Covered
(1.ClockLow )->(8)->(!9)	Not Covered
(1.ClockLow )->(!8)	Not Covered
(1.ClockPulse )->(10)	Not Covered
(1.ClockPulse )->(!10)	Not Covered
(1.HoldBit )->(11)->(12)	Not Covered
(1.HoldBit )->(11)->(!12)	Not Covered
(1.HoldBit )->(!11)	Not Covered
(1.ClockLowAck )->(13)	Not Covered
(1.ClockLowAck )->(!13)	Not Covered
(1.ClockPulseAck )->(14)	Not Covered
(1.ClockPulseAck )->(!14)	Not Covered
(1.HoldDevAck )->(15)->(16)	Not Covered
(1.HoldDevAck )->(15)->(!16)	Not Covered
(1.HoldDevAck )->(!15)	Not Covered
(1.ReadClockLow )->(17)	Not Covered
(1.ReadClockLow )->(!17)	Not Covered
(1.ReadClockPulse )->(18)	Not Covered
(1.ReadClockPulse )->(!18)	Not Covered
(1.ReadHoldBit )->(19)->(20)	Not Covered
(1.ReadHoldBit )->(19)->(!20)	Not Covered
(1.ReadHoldBit )->(!19)	Not Covered
(1.HostClockLowAck )->(21)	Not Covered
(1.HostClockLowAck )->(!21)	Not Covered
(1.HostClockPulseAck )->(22)	Not Covered
(1.HostClockPulseAck )->(!22)	Not Covered
(1.HostHoldBitAck )->(23)->(24)->(25)	Not Covered
(1.HostHoldBitAck )->(23)->(24)->(!25)	Not Covered
(1.HostHoldBitAck )->(23)->(!24)	Not Covered
(1.HostHoldBitAck )->(!23)	Not Covered
(1.ClockStop )->(26)	Not Covered
(1.ClockStop )->(!26)	Not Covered
(1.SetupStop )->(27)	Not Covered
(1.SetupStop )->(!27)	Not Covered
(1.HoldStop )->(28)->(29)	Not Covered
(1.HoldStop )->(28)->(!29)	Not Covered
(1.HoldStop )->(!28)	Not Covered
(1.Active )->(30)	Not Covered
(1.Active )->(!30)->(31)	Not Covered
(1.Active )->(!30)->(!31)	Not Covered
(1.PopFmtFifo )->(32)	Not Covered
(1.PopFmtFifo )->(!32)->(33)	Not Covered
(1.PopFmtFifo )->(!32)->(!33)	Not Covered
(1.AcquireStart )->(34)	Not Covered
(1.AcquireStart )->(!34)	Not Covered
(1.AddrRead )->(35)	Not Covered
(1.AddrRead )->(!35)->(36)	Not Covered
(1.AddrRead )->(!35)->(!36)	Not Covered
(1.AddrAckWait )->(37)	Not Covered
(1.AddrAckWait )->(!37)	Not Covered
(1.AddrAckSetup )->(38)	Not Covered
(1.AddrAckSetup )->(!38)	Not Covered
(1.AddrAckPulse )->(39)	Not Covered
(1.AddrAckPulse )->(!39)	Not Covered
(1.AddrAckHold )->(40)->(41)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(42)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(!42)->(43)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(!42)->(!43)	Not Covered
(1.AddrAckHold )->(!40)	Not Covered
(1.TransmitWait )->(44)	Not Covered
(1.TransmitWait )->(!44)	Not Covered
(1.TransmitSetup )->(45)	Not Covered
(1.TransmitSetup )->(!45)	Not Covered
(1.TransmitPulse )->(46)	Not Covered
(1.TransmitPulse )->(!46)	Not Covered
(1.TransmitHold )->(47)->(48)	Not Covered
(1.TransmitHold )->(47)->(!48)	Not Covered
(1.TransmitHold )->(!47)	Not Covered
(1.TransmitAck )->(49)	Not Covered
(1.TransmitAck )->(!49)	Not Covered
(1.TransmitAckPulse )->(50)->(51)	Not Covered
(1.TransmitAckPulse )->(50)->(!51)	Not Covered
(1.TransmitAckPulse )->(!50)	Not Covered
(1.WaitForStop )	Not Covered
(1.AcquireByte )->(52)	Not Covered
(1.AcquireByte )->(!52)	Not Covered
(1.AcquireAckWait )->(53)	Not Covered
(1.AcquireAckWait )->(!53)	Not Covered
(1.AcquireAckSetup )->(54)	Not Covered
(1.AcquireAckSetup )->(!54)	Not Covered
(1.AcquireAckPulse )->(55)	Not Covered
(1.AcquireAckPulse )->(!55)	Not Covered
(1.AcquireAckHold )->(56)->(57)	Not Covered
(1.AcquireAckHold )->(56)->(!57)	Not Covered
(1.AcquireAckHold )->(!56)	Not Covered
(1.StretchAddr )->(58)->(59)	Not Covered
(1.StretchAddr )->(58)->(!59)	Not Covered
(1.StretchAddr )->(!58)	Not Covered
(1.StretchTx )->(60)	Not Covered
(1.StretchTx )->(!60)	Not Covered
(1.StretchTxSetup )->(61)	Not Covered
(1.StretchTxSetup )->(!61)	Not Covered
(1.StretchAcqFull )->(62)	Not Covered
(1.StretchAcqFull )->(!62)	Not Covered
(1.default)	Not Covered

	LineNo.	Expression
-1-:	1303	if (((!target_idle) && (!target_enable_i)))
-2-:	1313	if (start_det)
-3-:	1315	if (stop_det)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	1322	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	1331	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered